JPH0485487U - - Google Patents
Info
- Publication number
- JPH0485487U JPH0485487U JP12989790U JP12989790U JPH0485487U JP H0485487 U JPH0485487 U JP H0485487U JP 12989790 U JP12989790 U JP 12989790U JP 12989790 U JP12989790 U JP 12989790U JP H0485487 U JPH0485487 U JP H0485487U
- Authority
- JP
- Japan
- Prior art keywords
- dot data
- character
- input
- dot
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 239000011159 matrix material Substances 0.000 claims description 3
- 239000000470 constituent Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Description
第１図は本考案の一実施例に係わるＣＲＴ文字
表示装置の概略構成を示すブロツク図、第２図ａ
〜ｄは同実施例装置におけるＣＲＴ表示部の表示
画面を示す図、第３図ａ，ｂは同実施例装置にお
ける各キヤラクタジエネレータに記憶されたドツ
トマトリツクスを示す図である。
１……主制御部、３……コードバツフア、４…
…ＣＲＴ表示部、５……ＣＲＴ制御部、６ａ，６
ｂ……キヤラクタジエネレータ、７ａ，７ｂ……
ドツトマトリツクス、９……キヤラクタクロツク
信号発生回路、１０……信号切換回路、１１……
並列／直列変換器、１２……ドツトクロツク信号
発生回路、１３……Ｄ／Ａ変換器、１４……水平
同期信号発生器、１５……垂直同期信号発生器、
１６……キーボード。
FIG. 1 is a block diagram showing a schematic configuration of a CRT character display device according to an embodiment of the present invention, and FIG. 2a
-d are diagrams showing the display screen of the CRT display unit in the same embodiment, and FIGS. 3a and 3b are diagrams showing dot matrices stored in each character generator in the same embodiment. 1... Main control unit, 3... Code buffer, 4...
...CRT display unit, 5...CRT control unit, 6a, 6
b...Character generator, 7a, 7b...
dot matrix, 9...Character clock signal generation circuit, 10...Signal switching circuit, 11...
Parallel/serial converter, 12...Dot clock signal generation circuit, 13...D/A converter, 14...Horizontal synchronization signal generator, 15...Vertical synchronization signal generator,
16...Keyboard.
Claims (1)
期信号および垂直同期信号発生器１５から送出さ
れた垂直同期信号に基づき入力されたビデオ信号
に対応する文字パターンを表示するＣＲＴ表示部
４と、このＣＲＴ表示部に表示する文字コードを
記憶するコードバツフア３と、前記各文字パター
ンを構成ドツト数が互いに異なるドツトマトリツ
クスで記憶し、前記コードバツフアから入力され
た文字コードの指定するドツトマトリツクスの水
平方向の各ドツトデータを並列ドツトデータ信号
として送出する一対のキヤラクタジエネレータ６
ａ，６ｂと、ドツトクロツク信号発生回路から出
力されたドツトクロツク信号に基づき入力された
並列ドツトデータ信号を直列ドツトデータ信号へ
変換する並列／直列変換器１１と、この並列／直
列変換器から出力された直列ドツトデータ信号を
ビデオ信号に変換して前記ＣＲＴ表示部へ送出す
るデジタル／アナログ変換器１３と、前記ＣＲＴ
表示部に表示する文字の表示文字数を変更する指
令を入力するための表示文字数変更入力手段１６
と、この表示文字数変更入力手段にて表示文字数
を変更する指令が入力されたとき、前記垂直同期
信号発生器へ周波数変更指令を送出するＣＲＴ制
御部５とを備えたＣＲＴ文字表示装置。 A CRT display unit 4 that displays a character pattern corresponding to an input video signal based on a horizontal synchronization signal sent from a horizontal synchronization signal generator 14 and a vertical synchronization signal sent from a vertical synchronization signal generator 15; A code buffer 3 stores character codes to be displayed on the display section, and stores each character pattern as a dot matrix having a different number of constituent dots, and stores the dot matrix in the horizontal direction specified by the character code input from the code buffer. A pair of character generators 6 that send out each dot data as parallel dot data signals.
a, 6b, a parallel/serial converter 11 that converts the input parallel dot data signal into a serial dot data signal based on the dot clock signal output from the dot clock signal generation circuit, and the parallel/serial converter 11 that converts the input parallel dot data signal into a serial dot data signal, and the a digital/analog converter 13 that converts a serial dot data signal into a video signal and sends it to the CRT display section;
Display character number change input means 16 for inputting a command to change the number of characters displayed on the display unit
and a CRT control unit 5 that sends a frequency change command to the vertical synchronization signal generator when a command to change the number of displayed characters is input by the display character number change input means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12989790U JPH0485487U (en) | 1990-11-30 | 1990-11-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12989790U JPH0485487U (en) | 1990-11-30 | 1990-11-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0485487U true JPH0485487U (en) | 1992-07-24 |
Family
ID=31877275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12989790U Pending JPH0485487U (en) | 1990-11-30 | 1990-11-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0485487U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4934739A (en) * | 1972-08-01 | 1974-03-30 | ||
| JPS4987246A (en) * | 1972-12-22 | 1974-08-21 | ||
| JPS52136530A (en) * | 1976-05-11 | 1977-11-15 | Nippon Telegr & Teleph Corp <Ntt> | Video signal production unit |
-
1990
- 1990-11-30 JP JP12989790U patent/JPH0485487U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4934739A (en) * | 1972-08-01 | 1974-03-30 | ||
| JPS4987246A (en) * | 1972-12-22 | 1974-08-21 | ||
| JPS52136530A (en) * | 1976-05-11 | 1977-11-15 | Nippon Telegr & Teleph Corp <Ntt> | Video signal production unit |
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