JPH0482887U - - Google Patents

Info

Publication number
JPH0482887U
JPH0482887U JP12533090U JP12533090U JPH0482887U JP H0482887 U JPH0482887 U JP H0482887U JP 12533090 U JP12533090 U JP 12533090U JP 12533090 U JP12533090 U JP 12533090U JP H0482887 U JPH0482887 U JP H0482887U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit board
assembly structure
area formed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12533090U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12533090U priority Critical patent/JPH0482887U/ja
Publication of JPH0482887U publication Critical patent/JPH0482887U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Mounting Of Printed Circuit Boards And The Like (AREA)
  • Combinations Of Printed Boards (AREA)
JP12533090U 1990-11-28 1990-11-28 Pending JPH0482887U (US20100170793A1-20100708-C00006.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12533090U JPH0482887U (US20100170793A1-20100708-C00006.png) 1990-11-28 1990-11-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12533090U JPH0482887U (US20100170793A1-20100708-C00006.png) 1990-11-28 1990-11-28

Publications (1)

Publication Number Publication Date
JPH0482887U true JPH0482887U (US20100170793A1-20100708-C00006.png) 1992-07-20

Family

ID=31872931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12533090U Pending JPH0482887U (US20100170793A1-20100708-C00006.png) 1990-11-28 1990-11-28

Country Status (1)

Country Link
JP (1) JPH0482887U (US20100170793A1-20100708-C00006.png)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003022024A1 (fr) * 2001-08-30 2003-03-13 Fujitsu Limited Unite de circuit imprime et appareil electronique
JP2007173668A (ja) * 2005-12-26 2007-07-05 Kyocera Corp 電子部品搭載用絶縁基体および電子装置
JPWO2006082620A1 (ja) * 2005-01-31 2008-08-07 スパンション エルエルシー 積層型半導体装置及び積層型半導体装置の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003022024A1 (fr) * 2001-08-30 2003-03-13 Fujitsu Limited Unite de circuit imprime et appareil electronique
JPWO2006082620A1 (ja) * 2005-01-31 2008-08-07 スパンション エルエルシー 積層型半導体装置及び積層型半導体装置の製造方法
JP4991518B2 (ja) * 2005-01-31 2012-08-01 スパンション エルエルシー 積層型半導体装置及び積層型半導体装置の製造方法
JP2007173668A (ja) * 2005-12-26 2007-07-05 Kyocera Corp 電子部品搭載用絶縁基体および電子装置
JP4688673B2 (ja) * 2005-12-26 2011-05-25 京セラ株式会社 電子部品搭載用絶縁基体および電子装置

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