JPH0482734U - - Google Patents

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Publication number
JPH0482734U
JPH0482734U JP12417990U JP12417990U JPH0482734U JP H0482734 U JPH0482734 U JP H0482734U JP 12417990 U JP12417990 U JP 12417990U JP 12417990 U JP12417990 U JP 12417990U JP H0482734 U JPH0482734 U JP H0482734U
Authority
JP
Japan
Prior art keywords
electronic device
mpus
display
divided
tasks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12417990U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12417990U priority Critical patent/JPH0482734U/ja
Publication of JPH0482734U publication Critical patent/JPH0482734U/ja
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案に係る電子装置におけるＭＰＵ
の状態表示装置の一実施例を示すブロツク図、第
２図はこの装置の動作を説明するフローチヤート
、第３図はこの装置の配置図、第４図はこの装置
を適用したシステムのブロツク図である。 １〜６……基板、１ａ〜６ａ……ＭＰＵ、１ｂ
〜６ｂ……各種回路、１ｃ〜６ｃ，１ｄ〜６ｄ…
…表示器。 Figure 1 shows an MPU in an electronic device according to the present invention.
2 is a flowchart explaining the operation of this device, FIG. 3 is a layout diagram of this device, and FIG. 4 is a block diagram of a system to which this device is applied. It is. 1 to 6... Board, 1a to 6a... MPU, 1b
~6b...Various circuits, 1c~6c, 1d~6d...
…display.

Claims (1)

【実用新案登録請求の範囲】 処理すべき内容を複数の異なるタスクに分割す
るとともに、分割されたタスクを複数のＭＰＵの
それぞれに実行させる電子装置において、 前記複数のＭＰＵのそれぞれに対応して接続さ
れる複数の表示器と、前記分割されたタスクの実
行中にエラーを検出した場合は前記表示器にエラ
ーコードの表示を行う表示制御手段と を備えたことを特徴とする電子装置におけるＭＰ
Ｕの状態表示装置。[Claims for Utility Model Registration] An electronic device that divides the content to be processed into a plurality of different tasks and causes each of the plurality of MPUs to execute the divided tasks, the electronic device being connected to each of the plurality of MPUs in a corresponding manner. MP in an electronic device, comprising: a plurality of displays, and display control means for displaying an error code on the display when an error is detected during execution of the divided task.
U status display device.
JP12417990U 1990-11-28 1990-11-28 Pending JPH0482734U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12417990U JPH0482734U (en) 1990-11-28 1990-11-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12417990U JPH0482734U (en) 1990-11-28 1990-11-28

Publications (1)

Publication Number Publication Date
JPH0482734U true JPH0482734U (en) 1992-07-17

Family

ID=31871841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12417990U Pending JPH0482734U (en) 1990-11-28 1990-11-28

Country Status (1)

Country Link
JP (1) JPH0482734U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55156870A (en) * 1979-04-27 1980-12-06 Fujitsu Ltd Error display system for print panel

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55156870A (en) * 1979-04-27 1980-12-06 Fujitsu Ltd Error display system for print panel

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