JPH0481883B2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention is an SEPP (Single
The present invention relates to a voltage switching type power amplifier having a (Ended Push Pull) configuration, and in particular to a power amplifier that improves the reduction in power efficiency caused by the flow of reverse current.

(Prior art) Conventionally, in voltage switching power amplifiers with an SEPP configuration using MOS FETs, fluctuations in load impedance cause the MOS transistors that make up the circuit to
When a phase difference occurs between the current flowing through the FET and the output voltage, especially when the load impedance becomes capacitive, if the current flowing through the MOS FET advances in phase, the power loss within the MOS FET will suddenly increase. To increase. Increased power loss increases amplifier output fluctuations and MOS FET junction temperatures, leading to a decrease in reliability, so it must be reduced as much as possible. However, when this power amplifier is applied to industrial equipment (mainly for dielectric heating or ultrasonic vibration), the load impedance of the circuit becomes capacitive.
Further, when applied to a radio transmitter, especially in a method in which a carrier wave is directly pulse width modulated with a modulation signal such as voice, the load becomes capacitive depending on the amplitude of the modulation signal. Since there are fields in which capacitive load impedance is actively used in this way, techniques for reducing the increase in power loss caused by capacitive loads are important.

FIG. 1 illustrates a typical circuit for explaining the increase in power loss within a transistor when the load impedance becomes capacitive. TR1 and TR2 are power MOS FETs, TR1
and TR2 are SEPP configurations. The signals input to the input terminal 1 are mutually phase-inverted by the input transformer T1, and drive TR1 and TR2, respectively.

The amplitude of the input signal is a sufficiently large value such that TR1 and TR2 are saturated and have only two values, that is, on and off. A capacitor C ₁ and a coil L ₁ connected to the output terminal 3 constitute a series resonant circuit. Z _L is the load impedance. 2
is the power supply terminal, and _C2 is the power supply bypass capacitor.
In the figure, V ₀ is the output voltage, i ₀ is the output current, i ₁ , i ₂
are the currents flowing through TR1 and TR2, respectively, and
The direction of the arrow is positive. FIG. 2 is a diagram showing the waveforms of each part in FIG. 1, where A is v ₀ and B is i ₀ , and the phase difference is indicated by θ ₊ . Due to the action of the series resonant circuit consisting of C _{1 and} L ₁ , only the fundamental wave component of v ₀ flows to the load. Figure C shows the current i ₁ flowing through TR1 when TR1 is on and TR2 is off.
It is. In figure D, TR1 is off, contrary to the above.
This is the current i ₂ flowing through TR2 when TR2 is on. i ₁ consists of two parts i ₁₁ and i ₁₂ . The positive portion i ₁₁ of i ₁ flows through TR1 in the forward direction, ie from the drain to the source, within the channel of the MOS FET. The negative part i ₁₂ of i ₁ flows in the opposite direction through TR1.

If we consider the structure of a MOS FET, a diode is formed between the drain and source.
Equivalently, the drain is the cathode and the source is the anode. Therefore, i ₁₂ will flow through this diode. The current i ₂ flowing through TR2 is also similar to i ₁ , with the positive part i ₂₁ of i ₂ flowing in the forward direction through TR2 and the negative part i ₂₂ flowing in the opposite direction, ie through the internal diode of TR2. A diode is a minority carrier element, and due to the carriers accumulated in the depletion layer, it does not turn off immediately even if the current flowing through the element is cut off, but remains conductive for the reverse recovery time t _rr . It has a nature. Therefore, when a reverse current such as i ₁₂ or i ₂₂ is flowing through the diode, TR1 changes from on to off, TR2 from off to on, or vice versa, TR1 changes from off to on, and TR2 changes from on to off. Considering the transition of TR1's internal diode and TR2, or TR1 and TR2
A situation occurs in which the internal diodes of both are turned on at the same time. This state will occur for a time t _rr .

Therefore, the power supply is short-circuited for this time, and an excessive spike-like current flows to TR1 and TR.
2, resulting in a significant increase in power dissipation within the transistor. This becomes more noticeable as the operating frequency of the circuit increases.

FIG. 3 illustrates a case where the load impedance is inductive and the output current i ₀ is in a delayed phase. A in the same figure shows the output voltage v ₀ , B in the same figure shows the output current i ₀ , and θ _- represents the phase difference. C in the same figure shows the current i ₁ flowing through TR1, and D in the same figure shows the current i ₂ flowing through TR2.
In this case, as in the capacitive case, TR1,
The current i ₁ , i ₂ flowing through TR2 consists of two parts.

That is, the positive portions i ₁₃ and i ₂₃ of i ₁ and i ₂ flow in the forward direction through the transistor, and the negative portions i ₁₄ and i ₂₄ flow through the internal diode of the transistor. However, the difference from the capacitive case is that when each of TR1 and TR2 transitions from on to off, current flows through the transistor in the forward direction. This means that the reverse recovery time t _rr of the internal diode has no effect on switching.
Therefore, if i ₀ is in a lagging phase, there will be no power loss due to the internal diode.

FIG. 4 is a diagram showing a conventional circuit for avoiding a situation in which the internal diodes of one transistor and the other transistor are turned on at the same time.
D ₁₁ , D ₁₂ , D ₂₁ , and D ₂₂ are diodes newly added to the circuit shown in FIG. 1 for the purpose of avoiding reverse current flowing to the transistors. FIG. 5 is a diagram showing waveforms at various parts in FIG. 4. In Figure 4,
The diode D ₁₁ connected in series with TR1 serves to allow only the positive portion i ₁₁ of the uncompensated current i ₁ shown in FIG. 5A to flow through the transistor. This is shown in Figure B. The negative part i ₁₂ of i ₁ is handled by a diode D ₁₂ connected in parallel with these. This is shown in Figure C. Diode D ₂₁ in TR2,
D ₂₂ also acts in the same way as D ₁₁ and D ₁₂ in TR1. In other words, D ₁₂ and D ₂₂ have MOS FETs
A high-speed diode shorter than the internal diode's t _rr is used to reduce the time that the internal diodes of one transistor and the other transistor are on simultaneously, reducing power loss.

(Problems to be Solved by the Invention) However, this circuit has the following drawbacks.

(1) Even if high-speed diodes are used, the diode
Since t _rr is several times longer than the switching time of the MOS FET, it is inevitable that the added high-speed diode and transistor will turn on at the same time, and this is not a fundamental solution to reducing power loss. Furthermore, the higher the operating frequency of the circuit, the less power loss can be expected to be reduced by high-speed diodes.

(2) As the output of the power amplifier circuit increases,
Since the voltage and current handled are also large, the added diode is also required to be rated for high power. However, especially in the case of high-speed diodes, because of their structure, there are manufacturing limits to the voltage and current, so a plurality of low-power diodes must be connected in series or parallel to use, leading to increased costs. Also,
Conversely, the frequency and power handled by the power amplifier circuit are limited by the diode.

(3) Since the wiring between the diode and the transistor inevitably becomes longer, overshoot or undershoot tends to occur in the drain voltage waveform, and the withstand voltage of the transistor or diode may be exceeded in some cases.

(Means for Solving the Problems) The present invention aims to eliminate the drawbacks of the prior art described above, and provides a voltage switching power amplifier circuit with an SEPP configuration using MOS FETs without adding any high-speed diodes. The current flowing through the coil connected in parallel with the output of the transistor is used to completely cancel out the reverse current flowing through the transistor, eliminating the increase in power loss caused by this reverse current and compensating for the decrease in power efficiency. .

This will be explained in detail below with reference to the drawings.

(Embodiment) Fig. 6 is a circuit diagram showing the first embodiment of the present invention, where TR1 and TR2 are power MOS FETs, and TR1 is a power MOS FET.
and TR2 are SEPP configurations, C is a DC blocking capacitor, and L is a reverse current compensation coil. The same reference numerals as in FIG. 1 indicate the same or corresponding parts. FIG. 7 is a diagram showing waveforms at various parts in FIG. 6.

A in the same figure shows the output voltage v ₀ and B in the same figure shows the waveform of the current flowing through the TR1 described in the circuit configuration of FIG. 1 before compensation.

Since the capacitor C is selected to have a sufficiently low AC impedance, a rectangular waveform output voltage v ₀ is applied to both ends of the compensation coil L. Since the saturation resistance of the transistor is sufficiently small, the current i ₃ flowing through the compensation coil L has a waveform obtained by time-integrating v ₀ in a steady state, and becomes a triangular wave as shown in FIG. 7C.

If the inductance of the coil is selected so that the amplitude of i ₃ and the maximum value of the negative part i ₁₂ of i ₁ are equal, i ₁₂ can be completely canceled by i ₃ . This situation is shown in FIG. 7D. In the end, the compensating coil L improves the impedance seen from the power amplifier to the load so that it does not become capacitive at least. Note that the inductance of the compensation coil L can be calculated as follows.
Now, if the power supply voltage of the circuit is E, the operating frequency is _p , and the amplitude of i ₃ is I ₃ , then I ₃ =E/8 ₀ L (1) is obtained. Therefore, if the maximum value of i ₁₂ is Im, then I ₃ =
From the condition Im, L=E/8 ₀ Im is given by equation (2). Since the maximum value of i ₁₂ is determined at the time of circuit design, the value of L can be calculated using the above formula.

FIG. 8 is a circuit diagram showing a second embodiment of the present invention, which is applied to a bridge connection of an SEPP circuit.

TR1, TR2, TR3 and TR4 are power
MOS FET, T is a composite transformer, and L is a reverse current compensation coil. T _1a and T _1b are input transformers, C _2a and C _2b are power supply bypass capacitors, 1a,
1b is an input terminal, and 3 is an output terminal.

The DC blocking capacitor C shown in FIG. 6 showing the first embodiment is essentially unnecessary because the output voltage of the circuit swings symmetrically in positive and negative directions with respect to zero.

The effect of L is the same as in the first embodiment described above, and its value can be changed by replacing E with 2E in equation (2), assuming that the power supply voltage of the two SEPP circuits is E.

That is, it is given by the following equation: L=E/4 ₀ Im (3). Note that the compensation coil L may be connected in parallel to the secondary side of the composite transformer T.

FIG. 9 is a block diagram showing a third embodiment of the present invention, which is applied to a power combiner. 8 ₁ ,
8 ₂ . . . 8 _o are a plurality of power amplifier circuits, which may be, for example, SEPP circuits or bridge-connected circuits thereof. 9 is a power combiner,
L is a compensation coil. 1 ₁ , 1 ₂ ...1 _o is an input terminal, and 3 is an output terminal. The effect of L is the same as in the first embodiment. In solid-state power amplifiers, a plurality of power amplifier circuits are often combined, so the present embodiment has the advantage that only one compensation coil is required.

(Effects of the Invention) As explained above, according to the present invention, even though the current flowing through the compensation coil connected in parallel with the output end of the power amplifier forms a triangular wave, a simple physical phenomenon is utilized. , it has the advantage of completely canceling out the reverse current flowing inside the transistor. Another advantage is that if you use a coil suitable for the power and frequency to be handled, there are no factors that limit these. On the other hand, compared to the price of high-speed diodes used in conventional circuits, the compensation coil used in the present invention is extremely inexpensive, and fewer coils are needed than the former, resulting in a simpler circuit configuration. This has the advantage of reducing the number of parts.

In terms of circuit configuration, as can be seen from the embodiments of the present invention, there is an advantage that the configuration can be configured with an extremely large degree of freedom.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a voltage switching type power amplifier to explain reverse current, Figures 2 and 3 are diagrams explaining waveforms of each part in Figure 1, and Figure 4 is a circuit diagram of a conventional voltage switching type power amplifier. A circuit diagram showing the amplifier, FIG. 5 is a diagram explaining the waveforms of each part in FIG. 4, FIG. 6 is a circuit diagram showing the first embodiment of the present invention, and FIG. 7 is a waveform of each part in FIG. 6. FIG. 8 is a circuit diagram showing a second embodiment of the invention, and FIG. 9 is a block diagram showing a third embodiment of the invention. 1, 1a, 1b, 1 ₁ , 1 ₂ ...1 _o ... input terminal,
2, 2a, 2b...power terminal, 3...output terminal,
8 ₁ , 8 ₂ ... 8 _o ... Power amplifier, 9 ... Power combiner, C ... DC blocking capacitor, C ₁ ... Tuning capacitor, C ₂ , C _2a , C _2b ... Power supply bypass capacitor , D ₁₁ , D ₁₂ , D ₂₁ , D ₂₂ ... Diode, L
... Compensation coil, L ₁ ... Tuning coil, T ₁ ,
T _1a , T _1b ... Input transformer, T ... Synthesis transformer, TR1, TR2, TR3, TR4 ... MOS
FET, Z _L ...Load impedance.

Claims (1)

[Claims] 1 Single-ended using MOS FET
A voltage switching type power amplifier with a push-pull (SEPP) configuration is characterized in that a compensation coil is provided in parallel at the output terminal of the voltage switching type power amplifier to cancel the reverse current flowing through the MOS FET and improve power efficiency. power amplifier.