JPH048136A - Controlling method for high-speed semiconductor switch - Google Patents

Abstract

PURPOSE:To prevent two power sources to be connected in parallel by supplying an off control signal to a to the first high-speed semiconductor switch at detection of an overcurrent, and supplying an on control signal to the second high-speed semiconductor after passage of the time of the difference between the off time of the first high-speed semiconductor switch and the on time of the second high-speed semiconductor switch from that time. CONSTITUTION:When it detects an overcurrent at time t1, it supplies an off signal to the first high-speed semiconductor switch 5c. Next, at the time t2 when the time Td of the difference between the off time of the switch 5c and on time of a switch 6c has passed, an on signal is supplied to the switch 6c. Next, at t3, the turning-off of the first semiconductor conductor switch 5c completes, and at time t4 immediately after it, the turning-off of the second high-speed semiconductor switch 6c completes. And by the large short-circuit current flowing from a second power source through the switch 6c, an electromagnetic contactor operates and performs shut-off. Hereby, uninterruptive power unit and short-circuit load are quickly separated, and other sound loads are not affected at all.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention is directed to a high-speed semiconductor device that constantly supplies power from a first power source to a plurality of branch loads, and switches the power supply to a second power source at high speed when a short circuit occurs. This invention relates to a method of controlling a switch circuit.

B0 Summary of the Invention The present invention constantly supplies power to a plurality of branch loads from a first power source with a small short-circuit capacity via a first high-speed semiconductor switch, and when a short circuit occurs, the power is supplied from a second power source with a large short-circuit capacity to a second power source with a large short-circuit capacity. In a method for controlling a high-speed semiconductor switch circuit that causes current to flow through a high-speed semiconductor switch to a load on the short-circuit side, when an overcurrent due to a short-circuit accident, etc. is detected, an off control signal is immediately supplied to the first high-speed semiconductor switch, and, By supplying the on control signal to the second high speed semiconductor switch with a delay by the difference between the off time of the first high speed semiconductor switch and the on time of the second high speed semiconductor switch, the first power supply is supplied at the time of switching the switch. and the second power source are connected in parallel to prevent cross current from occurring, and to prevent the withstand capacity of the first high-speed semiconductor switch provided on the first power source side having a small short circuit capacity from being increased more than necessary. This is what I did.

C1 Prior Art Conventionally, a system for supplying power to a large number of loads from a power source with a small short-circuit capacity, such as an uninterruptible power supply, has been configured as shown in FIG. 2, for example. In FIG. 2, electromagnetic contactors 3a, 3b, and 3c are inserted in branch circuits connecting the uninterruptible power supply l and a plurality of loads 2a, 2b, and 2C, respectively. In this power supply system, if a short circuit occurs in some load, for example load 2c, the power supply voltage will drop for a period of time until the short circuit current causes the uninterruptible power supply 1 to stop or the electromagnetic contactor 3c trips. Other loads 2a and 2b are adversely affected. In order to eliminate such inconveniences, the power source is switched using a circuit configuration as shown in FIG. 3, for example. That is, a second power source 4 that is synchronized with the uninterruptible power supply l and has a large short circuit capacity is provided, and the uninterruptible power supply l
A first high-speed semiconductor switch 5a, 5b, 5c is inserted in the electric path connecting the and magnetic contactors 3a, 3b, 3c, respectively, and a second high-speed semiconductor switch is inserted in the electric path connecting the second power source 4 and the magnetic contactor 3a, 3b, 3c. Switches 6a, 6b, and 6c are inserted respectively. In FIG. 3, the second high-speed semiconductor switch 6a is always
6b, 6c off, first high speed semiconductor switch 5a, 5b
, 5c are turned on, and power is supplied from the uninterruptible power supply l to each load 2a, 2b, 2c via the switches 5a, 5b, 5c.

Furthermore, if a short circuit occurs in some load, for example load 2c, as shown in FIG. 4, the first high-speed semiconductor switch 5c is turned off at the time when an overcurrent is detected by a current detection means (not shown) (time 1+). At the same time, the second high-speed semiconductor switch 6c is turned on. Then, instead of the uninterruptible power supply 1, current flows from the second power supply 4 to the short circuit fault point on the load 2C side.

Therefore, the electromagnetic contactor 3c trips and only the load 2c is disconnected. Such power supply switching operation is performed by other loads 2a,
The same process is performed even if a short circuit occurs on the 2b side. Therefore, an excessive current does not flow through the uninterruptible power supply 1 due to a short circuit, and the power supply stoppage or drop in power supply voltage as described above does not occur.

D Problems to be Solved by the Invention However, in the circuit of Fig. 3, the semiconductor switches (5
The following problems arise in a to 5c, 6a to 6C). Since the first high-speed semiconductor switches 5a to 5c require a cutoff function, a gate turn-off thyristor or the like is often used, and since it is expensive, the withstand capacity cannot be increased unnecessarily. Further, since the second high-speed semiconductor switches 6a to 6c need to have a high tolerance, for example, thyristors are used. Therefore, when an overcurrent is detected, as shown at time t1 in FIG.
When ON control signals of C are supplied at the same time, the switch 5
Since the off time (time required for turn-off) of switch 5C is longer, the time from time t when the switch 6C is turned on to time t3 when the switch 5C is turned off is
c and 6c are both turned on. Therefore, a cross current (the shaded area in FIG. 5) occurs between the uninterruptible power supply 1 and the second power supply 4. This increases the responsibility of the first high-speed semiconductor switch 5C (for example, a gate turn-off thyristor), and the withstand capability of the expensive gate turn-off thyristor must be increased more than necessary, which is extremely disadvantageous economically.

The present invention has been made in view of the above points, and its purpose is to:
To provide a control method for a high-speed semiconductor switch circuit capable of preventing two power supplies from being connected in parallel and separating a short-circuit load without unnecessarily increasing the withstand capability of an expensive semiconductor switch.

E8 Means for Solving Problems The present invention provides a first high-speed semiconductor switch that is inserted into each branch circuit connecting a first power source and a plurality of loads, has a current cutoff function, and is always in an on state. , is inserted in each electric path connecting each common connection point of the plurality of first high-speed semiconductor switches and the load and a second power source operated in synchronization with the first power source, and is normally kept in an OFF state. The second
and a high-speed semiconductor switch, wherein an off control signal is supplied to the first high-speed semiconductor switch when an overcurrent is detected, and the off-time of the first high-speed semiconductor switch and the second high-speed semiconductor switch are changed from the overcurrent detection time to approximately the off-time of the first high-speed semiconductor switch and the second high-speed semiconductor switch. The present invention is characterized in that the on-control signal is supplied to the second high-speed semiconductor switch after a time difference from the on-time of the semiconductor switch has elapsed.

During F1 operation, power is supplied from the first power supply to the plurality of loads via the first high-speed semiconductor switch. When an overcurrent at the time of a short circuit accident is detected, an off control signal is first supplied to the first high speed semiconductor switch inserted in the circuit on the side where the short circuit has occurred. Next, approximately the first
The second high speed semiconductor switch on control signal is provided after a time period equal to the difference between the off time of the high speed semiconductor switch and the on time of the second high speed semiconductor switch. Therefore, the second high-speed semiconductor switch will not be turned on at a time before the first high-speed semiconductor switch is turned off.

Next, when the first high-speed semiconductor switch is turned off and the second high-speed semiconductor switch is turned on, the short-circuit current flows from the second power source and is interrupted by, for example, an electromagnetic contactor or the like provided on the short-circuit load side. As a result, the first power source and the short-circuited load are quickly disconnected, and other healthy loads that are being supplied with power by the first power source are not affected at all. In this way, it is possible to prevent the first high-speed semiconductor switch and the second high-speed semiconductor switch from being turned on at the same time.
No cross current occurs between the power supplies. Therefore, it is not necessary to increase the withstand capacity of the first high-speed semiconductor switch more than necessary, and the cost of the device can be reduced.

G. Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a time chart when the control method of the present invention is applied to the power supply circuit of FIG. First, the first high-speed semiconductor switches 5a to 5c are always on, the second high-speed semiconductor switches 6a to 6C are off, and power is supplied from the uninterruptible power supply 1 to each load 2a to 2C. Here, when a short circuit accident occurs on the load 2C side and an overcurrent is detected by a current detection means (not shown) at time t, an OFF control signal is supplied to the first high speed semiconductor switch 5C. Next, at time t, when a time Td, which is the difference between the off time of the switch 5C and the on time of the switch 6C, has elapsed, an on control signal is supplied to the switch 6C. Next, at t3, the first high speed semiconductor switch 5C
The turn-off of the second high-speed semiconductor switch 6C is completed, and immediately after that, the turn-on of the second high-speed semiconductor switch 6C is completed at time t4.

Note that there is a gap between time t3 and time t4, and both the switches 5c and 6c are turned off. In this way, time t3
The load short-circuit current that previously flowed through the switch 5C flows through the switch 6c after time t4. Therefore, the electromagnetic contactor 3C operates due to the large short-circuit current flowing from the second power source 4 through the switch 6C, thereby interrupting the operation.

As a result, the uninterruptible power supply l and the short-circuited load 2C are quickly disconnected, and the other healthy loads 2a and 2b are not affected at all. In this way, the switch 5C and the switch 6
Since C are never turned on at the same time, no cross current occurs between the uninterruptible power supply l and the second power supply 4. Therefore, there is no need to increase the withstand capacity of the switch 5C more than necessary.
It is economically very profitable. Incidentally, the above operation is the same even when a short circuit occurs on the loads 2a and 2b side.

According to the present invention, an off control signal is supplied to the first high-speed semiconductor switch at the time of overcurrent detection, and the off-time of the first high-speed semiconductor switch is approximately equal to the off-time of the first high-speed semiconductor switch from the overcurrent detection time. Since the on-control signal is supplied to the second high-speed semiconductor switch after the time difference between the on-time of the second high-speed semiconductor switch and the second high-speed semiconductor switch has elapsed, the first power supply and the second power supply are not connected in parallel. , no cross current flows. Therefore, the responsibility of the first high-speed semiconductor switch does not increase. This eliminates the need to increase the withstand capability of the first high-speed semiconductor switch more than necessary. Therefore, a high-speed semiconductor switch circuit can be constructed at low cost.

[Brief explanation of the drawing]

FIG. 1 is a time chart showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing an example of a conventional power supply device, FIG. 3 is a circuit diagram showing an example of a power supply device equipped with a semiconductor switch circuit, and FIG. 3 is a time chart showing an outline of the control operation of the circuit shown in FIG. 3, and FIG. 5 is a time chart showing details of the control operation of the circuit shown in FIG. 3. 1... Uninterruptible power supply, 2a, 2b, 2C... Load, 3a, 3b, 3c... Magnetic contactor, 4... Second
power supplies, 5a, 5b, 5c...first high speed semiconductor switches, 6a, 5b, 5c...second high speed semiconductor switches. Figure 1] Color fil's Seiken tie, 5C/I'7't/f+lz (ON)
0FF-111 Figure 4 Time Chart

Claims (1)

[Claims] (1) A first high-speed semiconductor switch that is inserted into each branch circuit connecting a first power source and a plurality of loads, has a current cutoff function, and is always on, and the plurality of first high-speed semiconductor switches. and a second high-speed semiconductor switch that is inserted into each electrical path connecting each common connection point of the load and a second power source operated in synchronization with the first power source, and is normally kept in an OFF state. In the high speed semiconductor switch circuit, an off control signal is supplied to the first high speed semiconductor switch when an overcurrent is detected, and from the overcurrent detection time, the off time of the first high speed semiconductor switch and the on time of the second high speed semiconductor switch are approximately changed. A method for controlling a high-speed semiconductor switch circuit, comprising supplying an ON control signal to a second high-speed semiconductor switch after a time period corresponding to the difference between .