JPH0480549B2 - - Google Patents
Info
- Publication number
- JPH0480549B2 JPH0480549B2 JP57189050A JP18905082A JPH0480549B2 JP H0480549 B2 JPH0480549 B2 JP H0480549B2 JP 57189050 A JP57189050 A JP 57189050A JP 18905082 A JP18905082 A JP 18905082A JP H0480549 B2 JPH0480549 B2 JP H0480549B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- integrated circuit
- film
- etching
- superconducting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000010408 film Substances 0.000 claims description 26
- 238000005530 etching Methods 0.000 claims description 15
- 230000001681 protective effect Effects 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 11
- 239000010409 thin film Substances 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- 239000012212 insulator Substances 0.000 claims description 2
- 229910000765 intermetallic Inorganic materials 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 229910052681 coesite Inorganic materials 0.000 claims 1
- 229910052906 cristobalite Inorganic materials 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 229910052682 stishovite Inorganic materials 0.000 claims 1
- 229910052905 tridymite Inorganic materials 0.000 claims 1
- 239000000463 material Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 239000007789 gas Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 230000009931 harmful effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、ジヨセフソン集積回路に用いる抵抗
の構造に係り、特に抵抗値の再現性と、超電導電
極の加工を容易にするジヨセフソン集積回路用抵
抗に関する。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to the structure of a resistor used in a Josephson integrated circuit, and particularly relates to a resistor for a Josephson integrated circuit that improves the reproducibility of resistance values and facilitates the processing of superconducting electrodes. .
本願で開示される発明のうち代表的なものの概
要は、下記の通りである。 A summary of typical inventions disclosed in this application is as follows.
すなわち、薄膜抵抗３の第１と第２の端部にそ
れぞれ第１と第２の超伝導電極部分５を形成する
ジヨセフソン集積回路用抵抗の製造方法であつ
て、
基板１上に上記薄膜抵抗３を形成する第１の工
程と、
上記第１の工程の後、上記第１と第２の超伝導
電極部分５の間の上記薄膜抵抗３の表面に絶縁物
よりなる保護膜４を形成する第２の工程と、
上記第２の工程の後、超伝導膜５を形成する第
３の工程と、
上記第３の工程で形成された上記超伝導膜５を
少なくとも上記保護膜４中央部の上の部分につい
て反応性イオンエツチング法でエツチすることに
より上記薄膜抵抗３の上記第１と第２の端部にそ
れぞれ上記第１と第２の超伝導電極部分５を形成
する第４の工程とを含むことを特徴とする。 That is, a method for manufacturing a resistor for a Josephson integrated circuit in which first and second superconducting electrode portions 5 are formed at first and second ends of a thin film resistor 3, respectively, the thin film resistor 3 is placed on a substrate 1. After the first step, a protective film 4 made of an insulator is formed on the surface of the thin film resistor 3 between the first and second superconducting electrode portions 5. a third step of forming a superconducting film 5 after the second step; and a step of depositing the superconducting film 5 formed in the third step on at least the central portion of the protective film 4. a fourth step of forming the first and second superconducting electrode portions 5 at the first and second ends of the thin film resistor 3, respectively, by etching the portions using a reactive ion etching method; It is characterized by containing.
かくして、実質的にサイドエツチが極めて少な
く縦方向のエツチングが大きな反応性イオンエツ
チング法によつて第１と第２の超伝導電極部分５
は極めて微細に形成されるとともに、この第１と
第２の超伝導電極部分５の間の薄膜抵抗３の表面
は絶縁物よりなる保護膜４によつて保護され、そ
の結果エツチングされにくくなる。 In this way, the first and second superconducting electrode portions 5 are etched by the reactive ion etching method, which substantially causes very little side etching and large vertical etching.
are formed extremely finely, and the surface of the thin film resistor 3 between the first and second superconducting electrode portions 5 is protected by a protective film 4 made of an insulating material, making it difficult to be etched.
従つて、本発明によれば、ジヨセフソン集積回
路用抵抗の抵抗値の精度を極めて高くすることが
できる。 Therefore, according to the present invention, the accuracy of the resistance value of the Josephson integrated circuit resistor can be made extremely high.
従来、ジヨセフソン集積回路の超電導電極に
NbあるいはNbの金属間化合物を用いた場合、そ
の加工にイオンエツチング等を用いると、エツチ
ングの終点近くで抵抗体がイオン、あるいはプラ
ズマ等にさらされるために抵抗体材料の腐食が生
じ、低抗体の膜厚等が変化してしまい抵抗値の再
現性が非常に悪かつた。
Conventionally, superconducting electrodes for Josephson integrated circuits
When Nb or an intermetallic compound of Nb is used, if ion etching is used for processing, the resistor material is exposed to ions or plasma near the end of the etching process, resulting in corrosion of the resistor material, resulting in low antibody resistance. The reproducibility of the resistance value was extremely poor due to changes in the film thickness, etc.
本発明の目的は、従来技術の欠点を解決し抵抗
値の再現性、精度に優れたジヨセフソン集積回路
用抵抗の製造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a Josephson integrated circuit resistor that overcomes the drawbacks of the prior art and has excellent resistance value reproducibility and accuracy.
本発明のジヨセフソン集積回路用抵抗は、抵抗
体の上部に保護膜を形成し、抵抗体と他の回路の
要とを接続する超電導電極の加工の際に、抵抗体
の材料が腐食等の悪影響を受けることを防止で
き、また、２つの超電導電極部分が薄膜抵抗体の
縁部でそれぞれこの薄膜抵抗体と接続する構成で
あるため、更に抵抗値の再現性、精度を高めるこ
とができる点に特徴がある。
In the Josephson integrated circuit resistor of the present invention, a protective film is formed on the top of the resistor, and the material of the resistor can be damaged by corrosion or other harmful effects during the processing of the superconducting electrode that connects the resistor to other circuit components. In addition, since the two superconducting electrode parts are connected to the thin film resistor at the edges of the thin film resistor, the reproducibility and accuracy of the resistance value can be further improved. It has characteristics.
以下、実施例を参照して本発明を詳細に説明す
る。Si基板１の表面を熱酸化によつて酸化し、厚
さ約700nｍのSiO2より成る絶縁膜２を形成する。
次に電子ビーム蒸着法によつて厚さ約50nｍの
Mo膜を形成する。ホトレジストのパターンをマ
スクとして化学エツチング法により不要なMoを
除き抵抗３を形成する（第１図）。この際のエツ
チング液は50％の硝酸水溶液を用いた。次にスパ
ツタリング法により厚さ約150nｍのSiO2膜を形
成しホトレジストAZ1350J（米国、シプレー社の
商品名）を用いて成るリフトオフステンシルを用
いたリフトオフ法によつて保護膜４を形成する
（第２図）。最後にスパツタリング法によつて厚さ
約200nｍのNb膜を形成し、ホトレジストのパタ
ーンをマスクとしてCF4ガスによる反応性イオン
エツチング法によつて超電導電極５を形成した
（第３図）。
Hereinafter, the present invention will be explained in detail with reference to Examples. The surface of the Si substrate 1 is oxidized by thermal oxidation to form an insulating film 2 made of SiO 2 with a thickness of about 700 nm.
Next, a film with a thickness of about 50 nm was made using electron beam evaporation.
Forms a Mo film. Using the photoresist pattern as a mask, unnecessary Mo is removed by chemical etching to form a resistor 3 (FIG. 1). The etching solution used at this time was a 50% nitric acid aqueous solution. Next, a SiO 2 film with a thickness of about 150 nm is formed by a sputtering method, and a protective film 4 is formed by a lift-off method using a lift-off stencil made of photoresist AZ1350J (trade name of Shipley, Inc., USA). figure). Finally, a Nb film with a thickness of about 200 nm was formed by sputtering, and a superconducting electrode 5 was formed by reactive ion etching using CF 4 gas using the photoresist pattern as a mask (FIG. 3).
以上によつて本発明のジヨセフソン集積回路用
抵抗を実現することができた。第３図から理解さ
れるように、本発明において２つの超電導電極５
は抵抗３の縁部でそれぞれ抵抗と接続をする。こ
のような構成は抵抗値の高精度化、インダクタン
ス低減による集積回路の高速化、更に抵抗の小型
化が可能であることに伴う集積度向上に適してい
る。特に抵抗値の高精度化に優れるため、集積回
路の動作の安定度向上及び歩留り向上が図られ
る。また、このようにして作成されたジヨセフソ
ン集積回路用抵抗は、保護膜４を設けてあるため
Nbのエツチング時に、抵抗体であるMoがCF4等
のガス、イオンにさらされることが無いため、
Moの腐食などのために抵抗値がNbのエツチング
条件によつて変化することがなく、再現性に優れ
ていた。図には示されていないジヨセフソンデバ
イスの負荷としてこの抵抗を用い、集積回路を動
作させたところ、良好な動作を得ることができ
た。またNbのエツチングに際しては、エツチン
グの終点付近で露出して来る材料は、本発明の抵
抗の場合SiO2のみとすることができ、このこと
はエツチング速度の再現性を高める効果があるば
かりでなく、NbとSiO2のエツチング速度の比が
一般に数倍以上とれることから、エツチングの終
点の判定が非常に容易であつた。さらに、保護膜
４は、抵抗３がNbのエツチング時ばかりでなく
全てのプロセス工程において使用される薬品類あ
るいはジヨセフソンデバイスの抵抗以外の要素に
使用されている材料と抵抗材料との相互拡散を防
止する効果があり、このため抵抗値の信頼性を高
めることができた。なお、本実施例では保護膜４
の材料としてSiO2を用いたが、SiOを用いても同
様の効果を得ることができた。 Through the above steps, the Josephson integrated circuit resistor of the present invention could be realized. As understood from FIG. 3, in the present invention, two superconducting electrodes 5
are connected to the resistors at the edges of resistor 3, respectively. Such a configuration is suitable for increasing the accuracy of the resistance value, increasing the speed of the integrated circuit by reducing the inductance, and increasing the degree of integration due to the ability to reduce the size of the resistor. In particular, since it is excellent in increasing the accuracy of resistance values, it is possible to improve the stability of the operation of integrated circuits and improve the yield. In addition, the Josephson integrated circuit resistor created in this way is provided with a protective film 4.
During Nb etching, Mo, which is a resistor, is not exposed to gases such as CF4 or ions, so
The resistance value did not change depending on the Nb etching conditions due to corrosion of Mo, and the reproducibility was excellent. When this resistor was used as a load for a Josefson device (not shown in the figure) and the integrated circuit was operated, good operation was obtained. Furthermore, when etching Nb, the material exposed near the end point of etching can be only SiO 2 in the case of the resistor of the present invention, which not only has the effect of increasing the reproducibility of the etching rate but also Since the etching rate ratio between Nb and SiO 2 was generally several times higher, it was very easy to determine the end point of etching. Furthermore, the protective film 4 is formed by interdiffusion of the resistor material with chemicals used not only during Nb etching but also in all process steps, or with materials used for elements other than the resistor of the Josefson device. This has the effect of preventing this, and as a result, it was possible to increase the reliability of the resistance value. Note that in this embodiment, the protective film 4
Although SiO 2 was used as the material, similar effects could be obtained using SiO.
以上説明したごとく本発明によれば、ジヨセフ
ソン集積回路において、抵抗体の上部に保護膜を
設けたことにより、従来技術の欠点を解決し抵抗
体への接続電極の加工の際に抵抗体材料が影響を
受けることを防止して、精度と再現性に優れたジ
ヨセフソン集積回路用抵抗が実現できた。
As explained above, according to the present invention, in a Josephson integrated circuit, by providing a protective film on the top of the resistor, the drawbacks of the prior art are solved, and the resistor material is removed when processing the connection electrode to the resistor. By preventing this influence, we were able to create a resistor for Josephson integrated circuits with excellent accuracy and reproducibility.
第１図、第２図および第３図は、本発明の一実
施例によるジヨセフソン集積回路用抵抗の製造工
程を示す断面図である。
１……Si基板、２……絶縁膜、３……抵抗、４
……保護膜、５……超電導電極。
1, 2, and 3 are cross-sectional views showing the manufacturing process of a Josephson integrated circuit resistor according to an embodiment of the present invention. 1...Si substrate, 2...Insulating film, 3...Resistance, 4
...Protective film, 5...Superconducting electrode.
Claims (1)
と第２の超伝導電極部分を形成するジヨセフソン
集積回路用抵抗の製造方法であつて、 基板上に上記薄膜抵抗を形成する第１の工程
と、 上記第１の工程の後、上記第１と第２の超伝導
電極部分の間の上記薄膜抵抗の表面に絶縁物より
なる保護膜を形成する第２の工程と、 上記第２の工程の後、超伝導膜を形成する第３
の工程と、 上記第３の工程で形成された上記超伝導膜を少
なくとも上記保護膜中央の上の部分について反応
性イオンエツチング法でエツチすることにより上
記薄膜抵抗の上記第１と第２の端部にそれぞれ上
記第１と第２の超伝導電極部分を形成する第４の
工程とを含むことを特徴とするジヨセフソン集積
回路用抵抗の製造方法。 ２ 上記第１および第２の超電導電極部分はNb
あるいはNbの金属間化合物によりなることを特
徴とする特許請求の範囲第１項に記載のジヨセフ
ソン集積回路用抵抗の製造方法。 ３ 上記保護膜はSiO2あるいはSiOよりなること
を特徴とする特許請求の範囲第１項に記載のジヨ
セフソン集積回路用抵抗の製造方法。 ４ 上記基板は半導体領域とこの半導体領域上に
設けられた絶縁膜よりなることを特徴とする特許
請求の範囲第１項に記載のジヨセフソン集積回路
用抵抗の製造方法。 ５ 上記半導体領域はSiよりなり、かつ上記絶縁
膜はSiO2よりなることを特徴とする特許請求の
範囲第４項に記載のジヨセフソン集積回路用抵抗
の製造方法。 ６ 上記第３の工程の上記反応性イオンエツチン
グはCF4ガスを含む雰囲気で行うことを特徴とす
る特許請求の範囲第１項から第５項のいずれかに
記載のジヨセフソン集積回路用抵抗の製造方法。[Claims] 1. First and second ends of the thin film resistor, respectively.
and a second superconducting electrode portion, the method includes: a first step of forming the thin film resistor on a substrate; a second step of forming a protective film made of an insulator on the surface of the thin film resistor between the second superconducting electrode portions; and a third step of forming a superconducting film after the second step;
and etching the superconducting film formed in the third step using a reactive ion etching method, at least a portion above the center of the protective film, thereby etching the first and second ends of the thin film resistor. and a fourth step of forming the first and second superconducting electrode portions in the first and second superconducting electrode portions, respectively. 2 The first and second superconducting electrode portions are made of Nb.
Alternatively, the method for manufacturing a resistor for a Josephson integrated circuit according to claim 1, wherein the resistor is made of an intermetallic compound of Nb. 3. The method of manufacturing a resistor for a Josephson integrated circuit according to claim 1, wherein the protective film is made of SiO 2 or SiO. 4. The method of manufacturing a resistor for a Josephson integrated circuit according to claim 1, wherein the substrate comprises a semiconductor region and an insulating film provided on the semiconductor region. 5. The method of manufacturing a resistor for a Josephson integrated circuit according to claim 4, wherein the semiconductor region is made of Si and the insulating film is made of SiO2 . 6. Manufacture of a Josephson integrated circuit resistor according to any one of claims 1 to 5, wherein the reactive ion etching in the third step is performed in an atmosphere containing CF 4 gas. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57189050A JPS5979584A (en) | 1982-10-29 | 1982-10-29 | Resistor fot josephson integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57189050A JPS5979584A (en) | 1982-10-29 | 1982-10-29 | Resistor fot josephson integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5979584A JPS5979584A (en) | 1984-05-08 |
| JPH0480549B2 true JPH0480549B2 (en) | 1992-12-18 |
Family
ID=16234447
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57189050A Granted JPS5979584A (en) | 1982-10-29 | 1982-10-29 | Resistor fot josephson integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5979584A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6265487A (en) * | 1985-09-18 | 1987-03-24 | Agency Of Ind Science & Technol | Resistor for cryogenic circuit and manufacture of the same |
| JPH0620110B2 (en) * | 1985-10-07 | 1994-03-16 | 日本電気株式会社 | Semiconductor device |
| JPS63234575A (en) * | 1987-03-24 | 1988-09-29 | Agency Of Ind Science & Technol | Formation of pattern of superconducting circuit |
| US5236857A (en) * | 1991-10-30 | 1993-08-17 | Texas Instruments Incorporated | Resistor structure and process |
| JP4848202B2 (en) * | 2006-04-14 | 2011-12-28 | 三菱重工業株式会社 | Scroll compressor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54116894A (en) * | 1978-03-03 | 1979-09-11 | Nippon Telegr & Teleph Corp <Ntt> | Superconduction circuit device |
| JPS57177581A (en) * | 1981-04-09 | 1982-11-01 | Sperry Rand Corp | Josephoson junction integrated circuit and method of producing same |
-
1982
- 1982-10-29 JP JP57189050A patent/JPS5979584A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54116894A (en) * | 1978-03-03 | 1979-09-11 | Nippon Telegr & Teleph Corp <Ntt> | Superconduction circuit device |
| JPS57177581A (en) * | 1981-04-09 | 1982-11-01 | Sperry Rand Corp | Josephoson junction integrated circuit and method of producing same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5979584A (en) | 1984-05-08 |
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