JPH0479509A - Timing adjustment device - Google Patents

Abstract

PURPOSE:To reduce the time required for convergence at the timing adjustment and to decrease the processing quantity by providing a transversal type digital filter means and a coefficient conversion means to the adjustment device. CONSTITUTION:The adjustment device is provided with a transversal digital filter means 101 being a delay time variable filter adjusting the transmission timing of a signal 105 and whose transfer function has a non-minimum phase shift characteristic and also a coefficient conversion means 102 converting at least one set of timing control information 104 so as to calculate all or part of a tap coefficient 103 of the digital filter means 101. Thus, the signal timing (delay time) is simply adjusted by using the coefficient conversion means 102 so as to have only change a tap coefficient of the same digital filter means 101. Thus, the time required for convergence at the timing adjustment is reduced and the processing quantity is decreased.

Description

[Detailed Description of the Invention] (Summary) Using existing telephone subscriber lines such as metallic bare cables, high-speed data transmission can be performed on both sides, using pulse signals that can take four levels in the amplitude direction, for example. Reducing the time required for timing adjustment to converge, with respect to a timing adjustment device that is installed, for example, in a digital subscriber line transmission interface device (particularly a network side device) for simultaneously adjusting the reception timing at the interface. In a timing adjustment device that uses a filter to adjust the signal reception timing, the purpose of which is to reduce the amount of processing and processing, the delay time variable filter that adjusts the signal reception timing is used. A transversal type digital filter means having a minimum phase shift characteristic, and a coefficient conversion means for calculating all or part of the tap coefficients of the digital filter means by converting at least one timing control information. Configure it as follows.

[Industrial application field]

The present invention is a digital system for simultaneously transmitting and receiving high-speed data in both directions using pulse signals that can have four levels in the amplitude direction using existing telephone subscriber lines such as metallic bare cables. The present invention relates to a timing adjustment device that is provided, for example, in a subscriber line transmission interface device (in particular, a device on the network side) and adjusts the reception timing at the interface.

[Prior Art] Transmission of modulated digital signals using conventional analog telephone lines and the like has become popular. In this case, a digital subscriber line transmission interface device is required to restore the distorted signal waveform due to the lossy frequency characteristics of the metallic cable.

The digital subscriber line transmission interface device has a function of bidirectionally simultaneously transmitting digital data quantized into four values (for example, ±1 and ±3) in the amplitude direction at a transmission rate of, for example, 80 kbaud (kilobaud). . This device is usually a network side device (L T
：Line Terminator (the same applies hereafter) and the terminal side device (NT: Node Terminator)
There are two types:

In order to realize signal transmission, it is essential that the operation timings of the mesh bodies are synchronized.

In this case, the master clock on the network side becomes the reference, and the NT receives a signal from the LT that is issued based on the master clock. Based on this received signal, the timing adjustment circuit of the NT operates, so that the NT side The timing is taken. Since the NT transmits a signal at a timing determined as a result, the frequency at which the signal is received at the LT originally matches the frequency at which the signal is transmitted at the NT, and only the phase changes. .

This phase difference is determined by the delay time determined by the length of the cable, and
It is determined by the difference between the reception timing and transmission timing in the NT. Therefore, in LT, when communication starts, it is necessary to adjust this phase difference and set it to an optimal value.

On the other hand, in a digital subscriber line transmission interface device, in addition to setting the LT timing described above, it is necessary to set the coefficients of the transversal filter in the echo canceller and decision feedback equalizer, and adjust the NT timing.

Although almost all of these coefficients can be adaptively changed according to the line, it is necessary to initialize them. For this setting, generally, before communication between the LT and NT begins, they mutually transmit training signals for a certain period of time, and by mutually receiving these signals, filter coefficients and timing are set.

This adjustment is divided into adjustment of the echo canceller and adjustment of receiving system circuits such as a decision feedback equalizer and reception timing adjustment. That is, the coefficient adjustment of the echo canceller needs to be performed by its own transmission training pulse, while the adjustment of the receiving system circuit needs to be performed by the training pulse of the other party (far end).

Also, adjusting the receiving system circuit and echo canceller at the same time may not go well at the initial pull-in stage, so in reality, first the NT emits a training pulse, and then the NT stops transmitting the training pulse. ShiL
T gives a training pulse. After that, a strategy is taken in which both sides emit training pulses at the same time.

In this case, the NT first uses its own training pulse to adjust the echo canceller at its own clock timing. At this time, the LT can receive training pulses from the NT, but since it is not specified that the number of training pulses be sufficiently large, the LT reception system cannot be adjusted during this period.

Next, during the period when only LT issues training pulses, L
T adjusts the echo canceller using its own clock timing, and NT adjusts the receiving system.

Next, while the LT issues a training pulse, the NT also issues a training pulse. During this period, the LT receiving circuit is adjusted. Regarding the output timing of the training pulse from the NT during this period, the receiving circuit of the NT has already been adjusted using the training pulse from the LT, so the output timing matches the correct frequency, that is, the frequency of the network. Therefore, adjusting the timing in adjusting the receiving system circuit of the LT is a task of matching the phases.

In the case of an NT on the terminal side, it must change its own clock frequency according to the timing of the received pulse.
The transmission frequency changes accordingly, but the time difference between the transmission timing and the reception timing can be set arbitrarily, so by setting the transmission timing so that this difference is the same as when adjusting the NT echo canceller, the echo canceller can be adjusted. No need to readjust.

However, in LT, the clock timing is determined by the network, so the transmission timing cannot be changed to match the received training pulse, and the adjusted echo canceller must be readjusted to match the timing of the received training pulse. Alternatively, processing must be performed to obtain a signal at a timing when the phase of the sampled signal is changed after the echo has been canceled by an echo canceler.

A first conventional example of this timing adjustment method is as follows.

That is, in the LT, after the echo canceller is pulled in by the training pulse emitted by the LT, first,
Pull-in processing is also performed on the received signal at the same timing as the echo canceller. Thereafter, the timing is gradually changed so that this error is minimized. By gradually changing the timing, the tap coefficient in the echo canceller changes in accordance with the change in timing, so that the echo canceller can maintain a retracted state. If the echo canceller maintains the retracted state, other circuits such as judgment feedback can be optimized relatively easily, so if the timing changes, circuits other than the echo canceller, such as the judgment feedback equalizer, will also be optimized. Follow the timing.

As described above, each circuit in the receiving system can observe the output error of the decision feedback equalizer in the best condition, so if the timing at which this error is minimized is found, that is the best receiving timing. Become.

As a second conventional example of the timing adjustment method, there is the following method.

First, after pulling in the echo canceller, the timing is shifted by passing the received signal processed by the echo canceller through a delay filter with a fixed delay time, without changing the state of the echo canceller. . In this case, a plurality of delay filters having different fixed delay times may be prepared, and the combination of delay filters that minimizes the error may be selected while changing their connection combinations.

Here, the relationship between timing and delay time will be briefly explained using FIG. 1O. FIG. 5A shows an example of a digital input signal sequence, which is assumed to be an isolated pulse response waveform. Since the values actually obtained are sampling values, for example, only the values indicated by the bold line at the timings indicated by ↑ in FIG. 2(C) are obtained. In the input signal sequence in (a) of the same figure, multiple times (
Since the amplitude is large at the timing), it is impossible to reduce the code amount interference to zero. If this input signal sequence is passed through a digital filter, it can be delayed according to the delay time characteristics of the digital filter. In the case of a minimum phase shift type filter, the delay time characteristic of the filter is automatically determined when the amplitude characteristic is determined, and the delay time is smaller than that of a non-minimum phase shift type filter. For this reason, a non-minimum phase shift type filter is generally used to shift the time without changing the waveform of the human input signal, as in the case of FIG. 10. FIG. 10(b) shows the input signal sequence of FIG. 10(a) using a non-minimum phase shift type filter, which corresponds to 172 cycles of the zumbling period (period of the determination timing in FIG. 10(C)). This is the output signal sequence when the time is delayed. The output amplitude is almost zero at times other than the specific timing corresponding to (a) in the figure, indicating that the timing adjustment was successful.

We prepared multiple delay filters with flat and different delay time characteristics as described above, corresponding to different fixed delay times, and minimized the error by changing the connection combinations of these delay filters. By selecting the appropriate combination of delay filters, the timing adjustment is completed. In this case, there is no need to readjust the echo canceller, so the time required for timing adjustment can be shortened.

(Problems to be Solved by the Invention) Among the conventional methods for timing adjustment described above, in the first conventional example, the optimal timing of the receiving circuit is not known at the stage of adjusting the echo canceller, so It becomes necessary to adjust the entire receiving system circuit while redoing the adjustment.

However, the timing may be significantly different from the beginning, and the initial adjustment of the LT takes a considerable amount of time, and the processing program becomes complex, resulting in increased power consumption and the need to store large programs. However, there is a problem in that the hardware scale increases.

On the other hand, in the second conventional example, the time required for timing adjustment can be shortened and the processing program is simple, but as a delay filter with a fixed delay time, for example,
/2.1/4. ．． It is necessary to prepare a filter having a delay time of 1/8.1/16.1/32, etc., which increases the size of the filter. When these processes are performed using digital signal processing, the scale of the hardware does not directly increase, but the order of the overall filter increases, and the amount of processing required to perform the calculations certainly increases. Increasing the amount of processing leads to an increase in hardware, and
This has the problem that increasing the processing speed leads to an increase in power consumption.

An object of the present invention is to shorten the time required for convergence during timing adjustment and to reduce the amount of processing.

[Means to solve the problem]

The present invention is based on a timing adjustment device that adjusts signal reception timing using a filter.

This device is provided, for example, in a digital subscriber line transmission interface device that performs simultaneous bidirectional communication using multilevel pulse signals, and is particularly provided in the former of a network side device and a subscriber side device.

First, the digital filter means 101 is a variable delay time filter that adjusts the transmission timing of the signal 105, and has a transversal type digital filter means 101 whose transfer function has a non-minimum phase shift characteristic. The means includes, for example, a 3-tap transversal type delay equalizer in which the two tap coefficient values at both ends are d and -d, where d is a real number, and the tap coefficient value of the center tap is 1. It has a configuration in which one stage or multiple stages are connected in cascade. Alternatively, the two tap coefficient values at both ends are d and -d, and the tap coefficient value of the center tap is (1-d2). It has a configuration in which stages are connected in cascade. Alternatively, it is a transversal type filter having the following transfer characteristics. In this case, the tap coefficient akO value of all or some of the n sections and the tap coefficient a3 of all or some of the m sections may be different values or the same value a. Here, the digital filter means 101 is operated at a speed of two or more sample values per baud rate of the signal 105, for example.

Next, it has coefficient conversion means 102 that calculates all or part of the tap coefficients 103 of the digital filter means 101 described above by converting at least one timing control information 104.

Here, if the decision feedback equalizer 106 is connected to the subsequent stage of the digital filter means 101, the timing control information 104 is a precursor value in the impulse response of the signal 105 obtained from the decision feedback equalizer 106. 107, and the coefficient conversion means 102 adaptively controls all or a negative part of the tap coefficients 103 of the digital filter means 101 so that the value becomes O based on the briscursor value.

[For production]

In the transformer = 17 sparse type digital filter means 101 whose transfer characteristic has a non-minimum phase shift characteristic, by changing the tap coefficient 103 by the coefficient conversion means 102, the delay characteristic can be changed without changing the loss characteristic much. I can do it.

This makes it possible to easily adjust the timing of the signal 105. .

Here, the coefficient conversion means 102 calculates the tap coefficient 103 based on timing control information 104 obtained from another circuit. The timing control information 104 has a tap coefficient of 10
3 itself, or it may be a signal indicating whether to increase or decrease the delay time of the filter relative to the current situation. When the timing control information 104 is the tap coefficient 103 itself, the coefficient conversion means 102 calculates the value of the related tap coefficient 103 other than the designated tap coefficient 103. Also, timing control information 1
When 04 is only a signal of delay time increase/decrease, the coefficient conversion means 102 modifies the tap coefficient 103 so that the delay amount changes according to the signal with respect to the current tap coefficient. Here, when the decision feedback equalizer 106 is provided, the timing control information 104 includes the decision feedback equalizer 106.
6 can be used, and the timing of the signal 105 can be successively optimized without providing a special circuit for generating the timing control information 104.

Note that the coefficient conversion means 102 does not need to update the values of all the tap coefficients 103 every processing cycle, but operates based on the timing control information 104 at least every few cycles.

(Examples) Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram of an embodiment of a digital subscriber line transmission interface device according to the present invention.

A signal from a subscriber that has passed through a transmission/reception cable 201 is separated by a hybrid transformer 202, passes through a level adjustment circuit (not shown), etc., and is filtered by a low-pass filter (RLF) 203 on the receiving side.
/2 frequency band, A/D converter 2
04 into a digital reception signal, and DSP2
Enter 18. This digital received signal is sent to the subtractor 2
After passing through 05, the phase characteristics are equalized by a digital delay time variable equalization section 206 comprising a non-minimum phase shift filter section 207 and a coefficient conversion section 208. This part is
Particularly relevant to the present invention. Furthermore, the output is sent to the amplitude equalizer (
A-EQL) 209 equalizes the loss of frequency amplitude characteristics due to changes in cable length, etc., and converts it to the decision feedback equalizer (DFE)
210 (more on this later), the DS
It is sent out as a received digital signal from P218.

On the other hand, the digital signal input to the DSP 218 is C0
After being subjected to necessary digital signal processing (binary/multilevel conversion, etc.) via D214, it is output as a digital transmission signal. In this way, the transmission signal output from the DSP 21B is converted into an analog signal by the D/A converter 215,
A transmitting side low pass filter (SLF) 216 limits the band to only the in-band components determined by the sampling frequency. The signal is then transmitted from the driver circuit (DRV) 217 via the hybrid transformer 202 and from the analog transmission/reception cable 201 to the subscriber.

Here, a part of the transmission signal directed to the analog transmission/reception cable 201 is transmitted to the hybrid transformer 2 as an echo component.
02 to the reception 4Htl and is included in the digital reception signal and input to the DSP 218, the echo component needs to be canceled on the reception side. To this end, the echo canceller (EC) 211 generates the above component as a pseudo echo component from the digital transmission signal, and the subtracter 205 subtracts this from the digital reception signal, thereby canceling the echo component.

In this case, a decision feedback equalizer 210 is connected to the output of the amplitude equalization section 209 on the reception side, and adaptively controls the generation of the pseudo echo component in the echo canceller section 211 described above based on the digital reception signal. This control is performed by the coefficient correction signal 219. Further, the coefficient correction signal 219 output from the decision feedback equalization section 210 is also supplied to the coefficient conversion section 208 in the digital delay time variable equalization section 206, which will be described later.

Each of the functions of the DSP 218 described above is realized as a combination of the hardware of the DSP 218 and a microprogram that operates it.

In the figure, parts given the same numbers as in the conventional example of FIG. 8 have the same functions, so their operations will be omitted.

Next, the digital delay time variable equalizer 206 in FIG.
The first to third embodiments will be sequentially explained.

FIG. 3 shows the digital delay time variable equalizer 20 of FIG.
FIG. 6 is a configuration diagram of the first embodiment of No. 6;

First, the non-minimum phase shift filter section 207 includes a delay element 303 that delays the filter input by one sample;
Delay element 304 that further delays the output of 03 by one sample.
and a multiplier 3 that multiplies the filter input by the filter coefficient d.
05, a multiplier 306 that multiplies the output of the delay element 304 by a filter coefficient -d, and an adder 307 that adds the outputs of the multipliers 305 and 306 and the delay element 303 and outputs the result as a filter output. As a result, the coefficient of the center tap is a fixed value "1", and the coefficient values of the taps before and after it have the same absolute value and opposite sign, rd, and "-".
A second-order transversal filter is configured with three taps, such as "d".

Further, the coefficient converting section 208 includes a coefficient updating section 301 and an inverting section 302.

The operation of the first embodiment of the digital amplitude variable equalizer 201 described above will be described below.

The transfer function of the non-minimum phase shift filter section 207 in FIG. 3 is given by: In the case of a digital filter, it is operated at twice the baud rate frequency ('A of the baud rate period T) in the frequency band up to 1/4 of the filter's sampling frequency and in the frequency band from 1/4 to 2/4. The delay time characteristics move in the opposite direction, increasing the delay in low frequencies will reduce the delay in high frequency bands, so it is better to increase the operating frequency of the filter and use the delay characteristics in that low frequency band for control. This is because good characteristics can be obtained.

Here, when formula (1) is transformed, if ldl≦0.4, the absolute value of the above formula will not be much larger than 1. Because 2dsin(ω
This is because the term T) is in a quadrature relationship with the previous term 1.

Therefore, the non-minimum phase shift filter section 207 in FIG.
By changing the value of the filter coefficient d, it can be operated as a variable delay time filter.

In this case, strictly speaking, it is necessary to investigate whether the frequency characteristic of the delay time in equation (1) is sufficiently flat, but in digital subscriber line transmission interface equipment that transmits multilevel pulse signals, etc., the amplitude of the sampling point Since we are only concerned with the amplitude direction and have finally narrowed down the amplitude to discrete values of ±1 and ±3, it is not a big problem.

FIG. 4 shows a response waveform when the impulse waveform is passed through the non-minimum phase shift filter section 207 of FIG. 3, which has the delay time frequency characteristic of equation (1). In the figure, ■ is a response waveform when the filter coefficient d=0, and the same waveform as the input waveform is output with a delay of z-1, that is, T/2.

On the other hand, when changing from d-0, 4 to -0, 4, the output waveform changes as shown by ■ to ■ in the figure. Although the peak value fluctuates considerably, it can be seen that good delay characteristics can be obtained in the sense that the pulse position is shifted.

Here, the filter coefficient d is the decision feedback equalizer 2 in FIG.
10 is updated in the coefficient update unit 301 based on the coefficient modification information 219 from 10, and the coefficient −d is obtained as a value obtained by inverting the sign of the coefficient d by the inverter 302. However, regarding the operation of the coefficient update unit 301, This will be explained later.

Next, FIG. 5 is a block diagram of a second embodiment of the digital delay time variable equalizer 206 of FIG. 2.

First, the non-minimum phase shift filter section 207 includes a delay element 5 31 which delays the filter input by one sample, and a delay element 5 which further delays the output of the delay element 5031 by one sample.
041, a multiplier 505+ for multiplying the filter input by the filter coefficient d, and a multiplier 506 for multiplying the output of the delay element 5031 by the filter coefficient 1-d2. , delay element 5o41
Multiplier 5o71 that multiplies the output of filter coefficient ~d
and an adder 508. which adds the outputs of the multipliers 505+, 5061.507+. has. Furthermore, the above 503
1-508. Component 503□~ which is exactly the same as the component of
The output of the adder 5082 is output as a filter output.

Further, the coefficient conversion unit 208 includes a coefficient update unit 501 having the same configuration as 301 and 302 in FIG.
-d2.

The operation of the second embodiment of the digital amplitude variable equalizer 201 described above will be described below.

In the first embodiment, the amplitude of the pulse changes when the delay time is changed (see FIG. 4), so the second embodiment is an improvement on this. The amplitude of the center tap is not set to a constant value, but is set to -d2. FIG. 5 shows a configuration in which two stages of transversal filters having a transfer function are connected in cascade.

Here, the coefficient conversion unit 208 uses the filter coefficient d obtained by the coefficient update unit 501 by the operation q unit 503 to calculate 1−
The value of d2 is also calculated and supplied not only to the first stage center tap but also to the second stage center knob.

FIG. 6 shows a response waveform when the impulse waveform is passed through the non-minimum phase shift filter section 207 of FIG. 5, which has the frequency characteristic of the delay time expressed by equation (2). As shown in the figure, the peak value is constant, and the change in the vertical direction of the bottom portion is also small, which can be said to be a good characteristic. Further, the amount of change in the lateral direction also exceeds T/2, which is sufficient. in this case,
Since the shift of T/2 can be easily delayed by shifting the tap of the transversal filter by 1, it is sufficient to delay the shift by ld, which is the time corresponding to zl.

Note that the coefficient update unit 501 has the same function as 301 in FIG. 3, but its operation will be described later.

Next, FIG. 7 is a block diagram of a third embodiment of the digital delay time variable equalizer 206 of FIG. 2.

First, the non-minimum phase shift filter section 207 includes a constant multiplier 703 that multiplies the filter input by a constant four. Subsequently, delay element 704+, delay element 704., which delays the output by one sample. A delay element 7051 that further delays the output of
a multiplier 706 + that multiplies the output of the delay element 7041 by a constant 707 + '% delay element 70
a multiplier 70 that multiplies the output of 51 by a filter coefficient 2-a;
8, and an adder 7091 that adds the outputs of the multipliers 706+, 707t, and 7081. Furthermore, the above 7
Components 7042 to 7042 that are the same as those of 041 to 7091
It has a portion consisting of 709□, and the output of addition Rrt7oq2 is output as a filter output. However, the multiplier 70
In 6□, the filter coefficient 2a is multiplied, and the multiplier 7o72
The difference is that the multiplier 708□ is multiplied by a constant C, and the multiplier 708□ is multiplied by a filter coefficient a. In addition, the coefficient conversion unit 208
For example, it includes a coefficient update section 701 having the same configuration as 301 in FIG. 3, and a calculation section 702 that calculates the coefficient 2-a.

The operation of the third embodiment of the digital amplitude variable equalizer 201 described above will be described below.

Now, consider the following characteristics as a transfer function of a filter. Here, if T = 12.5μs, this gain characteristic will have a frequency of 11zteodB and a frequency of 40kHz (
It has a characteristic of around 13, minus infinity at 80 k tIz, and the delay characteristic is a constant value because it is a flat delay function, and this characteristic is 80 kbaud (kilobaud).
It shows 100% roll-off characteristics for a transmission system with a speed of . Therefore, even if an impulse response waveform whose band is limited to 80 kHz or less is input into the equation (3), no waveform distortion occurs.

To delay the waveform using this reduced pass filter, do the following: The first () term in equation (3) is z−1−
1 or 0 ktlz and 4 and z -1-1 or 16
O at 0 kHz and is a sensitive function at low frequencies (i.e. it constitutes the low frequency section), while the second () term is z″1-1 or 2.58 at 0 kHz and z −1=j i.e. 4 at 40 kHz
．． 58, and 6.58 at 160 kHz, which increases as the frequency increases, so it is a highly sensitive function at high frequencies (that is, it constitutes a high frequency section).

Therefore, if each term can be delay-adjusted at the same time, it should be possible to shift the entire waveform as it is. From that point of view, looking at each term in equation (3), z
It can be seen that for -l, it is the sum of the constant term, the first-order term, and the second-order term. Based on the first-order term, the constant term means a signal advanced by T/2, and the second-order term is the sum of the constant term, the first-order term, and the second-order term. On the other hand, the term is a delayed signal. If the constant term is made larger and the quadratic term is made smaller, the leading term will become larger, so it can be expected that the delay in output will become smaller. Conversely, if the constant term is made small and the quadratic term is made large, a (relatively) delayed waveform can be expected. In reality, the above matters hold true for the first () term, but the second () term is sensitive to high frequencies, as mentioned above, and has no effect on delay characteristics. The sensitivity of each tap coefficient of is opposite to the sensitivity of the first term.

Therefore, in this embodiment, the non-minimum phase shift filter section 20
7, the variable parameter a is introduced into equation (3), H(z −') −(0,096324(a+2z −
'+(2-a) z -2)X ((a -2) -4
,581z-'+az-2) ]2...(
4) If the transfer characteristic is modified as shown, when a=1, (3
) is the same function as the formula, for example, if the value of a is increased,
The constant term, which is the leading term of the first () term, which is sensitive to low frequencies, becomes larger, and the quadratic term, which is the lagging term, becomes smaller, and the second () term has the opposite relationship. Since there is
Overall, we can expect to be able to advance the waveform. The transfer characteristic expressed by equation (4) above can be realized by the configuration of the non-minimum phase shift filter section 207 shown in FIG.

FIG. 8 shows a response waveform when the impulse waveform is passed through the non-minimum phase shift filter section 207 of FIG. 7 having the delay time frequency characteristic expressed by equation (1). The input waveform is almost the same as the waveform when a=1, and 0.75≦a≦1.
25, it can be seen that a delay equivalent to T/2 can be obtained.

Note that the coefficient update unit 701 is 301 in FIG. 3 and 5 in FIG.
It has the same functions as 01, but its operation will be described later.

The transfer characteristic of the non-minimum phase shift filter section 207 in the third embodiment of the digital delay time variable equalization section 206 described above is expressed by the equation (4) or as shown in FIG. In the case of a two-stage configuration, if this equation (4) is further generalized, the transfer characteristic is expressed by the following equation.

Here, the numbers n and m of filter stages can be arbitrary integers. When n and m are changed, the values of bk and Cj change. However, since the characteristics are required to be close to the roll-off filter characteristics, the value of bl is always close to 2. The transfer characteristic of equation (5) above is configured by the non-minimum phase shift filter section 207 in FIG. By controlling the values of the tap coefficients aj of some sections in the coefficient conversion section 208, desired waveform delay characteristics can be obtained. Also,
In this case, the value of the tap coefficient ak of all or some of the n sections and the value of the tap coefficient a of all or some of the m sections are set to be the same value a, and this a. By controlling the values in the coefficient conversion unit 208, it is possible to avoid reducing the number of variations to be controlled.

Next, the first
~Coefficient updating units 301 (Fig. 3), 501 (Fig. 5), and 701 of the coefficient converting unit 208 in the third embodiment
The operation shown in FIG. 7 will be explained.

The coefficient update unit 301 and the like are the decision feedback equalization unit 210 in FIG.
The value of the coefficient d or a (see FIG. 3.5.7), which is the tap coefficient of the non-minimum phase shift filter section 207, is updated based on the coefficient modification information 219 from the filter section 219.

In this case, as the coefficient correction information 219, the decision feedback equalizer 2
Bricursor values from 10 are used. The cursor is the amplitude value at the timing immediately before the maximum amplitude in the impulse response waveform shown in FIG. 10(b). In a digital subscriber line transmission interface device such as the embodiment shown in FIG. 2, the input signal passes through many circuit networks such as a decimation filter in the A/D converter 204, so its impulse response generally has a maximum value. It has 1.2 ripples before becoming , and changes from negative to positive value near the brissor.

FIG. 9 shows a circuit example of the decision feedback equalizer 210 that generates such a bricursor value. Since this circuit example is for boat fishing, its detailed operation will be omitted, but C-1 in the figure is the precursor value. This value is calculated probabilistically like the tap coefficient of the decision feedback equalizer 210, and when the timing is right, it is a small value close to O, but when the timing is off, it becomes a large positive or negative value. .

Based on such a cursor, the coefficient update unit 301
etc., when the Bricursor value is positive, the coefficient is changed in the direction of increasing the delay time in the non-minimum phase shift filter section 207, and when it is negative, the coefficient is changed in the direction of decreasing the delay time. As for the change rule, the maximum (circle oblique method) is usually used.

[Effects of the Invention] According to the present invention, the timing (delay time) of a signal can be easily adjusted by simply changing the tap coefficients of the same digital filter means using the coefficient conversion means. As a result, when the digital filter means is realized by a digital signal processing processor or the like, since only one type of filter processing is performed, the amount of arithmetic processing can be reduced, and power consumption can also be reduced.

In particular, when the present invention is used on the network side of a digital subscriber line transmission interface device, when the device starts operating, the echo canceller is converged, and then the echo canceller is left as it is and the other receiving system is determined. Since the feedback equalizer, amplitude equalizer, etc. can be adjusted, the initial settings of the network side devices can be processed systematically and simplified.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the present invention, FIG. 2 is a configuration diagram of an embodiment of a timing adjustment circuit using a digital delay time variable equalizer, and FIG. 3 is a block diagram of an embodiment of a timing adjustment circuit using a digital delay time variable equalizer. FIG. 4 is a characteristic diagram of the first embodiment of the digital delay time variable equalizer, and FIG. 5 is a configuration diagram of the second embodiment of the digital delay time variable equalizer. 6 is a characteristic diagram of the second embodiment of the digital delay time variable equalizer, FIG. 7 is a configuration diagram of the third embodiment of the digital delay time variable equalizer, and FIG. , a characteristic diagram of the third embodiment of the digital delay time variable equalizer, FIG. 9 is a diagram showing an example of the configuration of the decision feedback equalizer, and FIG.
The figure is an explanatory diagram of timing adjustment by a delay circuit. 101... Digital filter means, 102... Coefficient conversion means, 103... Tap coefficient, 104... Timing control information, 105... Signal, 106... Decision feedback equalizer, 107... Precursor value.

Claims (1)

[Claims] 1) In a timing adjustment device that adjusts the reception timing of a signal using a filter, the variable delay time filter adjusts the reception timing of the signal (105), and the transfer function has a non-minimum phase shift characteristic. transversal type digital filter means (101) having a transversal type digital filter means (101), and at least one timing control information (
104); and a coefficient converting means (102) that calculates the coefficient by converting the coefficient. 2) The digital filter means is a 3-tap transversal type delay equalization in which the two tap coefficient values at both ends are d and -d, where d is a real number, and the tap coefficient value of the center tap is 1. The coefficient converting means includes a coefficient updating means for updating the coefficient value d based on the timing control information;
2. The timing adjustment device according to claim 1, further comprising an inverting means for inverting the sign of and outputting the inverted sign. 3) The digital filter means is a 3-tap transformer in which the two tap coefficient values at both ends are d and -d, where d is a real number, and the tap coefficient value of the center tap is (1-d^2). It has a configuration in which one or more stages of versatile delay equalizers are connected in cascade, and the coefficient converting means includes a coefficient updating means for updating the coefficient value d based on the timing control information, and a coefficient value d for updating the coefficient value d based on the timing control information. d
The timing adjustment device according to claim 1, comprising an inverting means for inverting the sign of and outputting the inverted sign, and an arithmetic means for calculating a value (1-d^2) from the coefficient value d. 4) The digital filter means H(z^-^1)=[a_k+b_kz^-^1+(2
-a_k)＾-＾2〕^n×[(2-a_j)+c_
For jre^-^1+a_jre^-^2〕^m,re^-^
1=-exp(-jωT) T=baud rate period/2 ω=angular frequency 2n+2m is filter order k=0, 1, 2,..., n-1 j=0, 1, 2,..., m -1, and the coefficient conversion means converts the value of the tap coefficient a_k of all or some of the n sections in the digital filter means based on the timing control information. The timing adjustment device according to claim 1, further comprising: calculating the value of the tap coefficient a_j of all or some of the m sections. 5) The digital filter means has the following formula: H(z^-1)=[a_k+b_kz^-^1+(2-
a_k)＾-＾2〕＾n×[(2-a_j)+c_j
＾−＾1+a_jre＾−＾2〕＾mHowever, ＾−＾1
=exp(-jωT) T=baud rate period/2 ω=angular frequency 2n+2m is filter order k=0, 1, 2,..., n-1 j=0, 1, 2,..., m-1 a transversal type filter having a transfer characteristic, the value of the tap coefficient a_k of all or some of the n sections in the digital filter means;
The values of the tap coefficients a_j of all or part of the m sections are the same value a, and the coefficient conversion means calculates the value a based on the timing control information. The timing adjustment device according to claim 1. 6) The timing adjustment device according to claim 1, wherein the digital filter means is operated at a speed of two or more sample values per baud rate of the signal. 7) A decision feedback equalizer (106) is connected to the downstream of the digital filter means (101), and the timing control information (104) is connected to the decision feedback equalizer (106).
) is a precursor value (107) in the impulse response of the signal (105) obtained from 7. The timing adjustment device according to claim 1, wherein all or part of the tap coefficients (103) of the filter means (101) are adaptively controlled.