JPH0477017A - Synchronous oscillating circuit - Google Patents

Synchronous oscillating circuit

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Publication number
JPH0477017A
JPH0477017A JP2187434A JP18743490A JPH0477017A JP H0477017 A JPH0477017 A JP H0477017A JP 2187434 A JP2187434 A JP 2187434A JP 18743490 A JP18743490 A JP 18743490A JP H0477017 A JPH0477017 A JP H0477017A
Authority
JP
Japan
Prior art keywords
circuit
control signal
delay line
switch control
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2187434A
Other languages
Japanese (ja)
Inventor
Hiroaki Yamamoto
博章 山本
Yasumitsu Tani
谷 康光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2187434A priority Critical patent/JPH0477017A/en
Publication of JPH0477017A publication Critical patent/JPH0477017A/en
Pending legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Radio Relay Systems (AREA)

Abstract

PURPOSE:To reduce the cost and to generate a stable switching control signal by using a delay line as a part of an oscillation means and obtaining the switching control signal having a pulse timing in response to the delay timing of the delay line. CONSTITUTION:The synchronous oscillating circuit consists of a delay line 4, separation circuits 15, 16 and gate circuits 17, 18. Then a microwave component is separated by the separation circuits 15, 16 and fed to a switching circuit 6. On the other hand, the separation circuits 15, 16 separate the synchronous oscillating frequency component of the oscillation circuit being a component of a closed loop, that is, a TTL (transistor transistor logic) signal voltage is detected and fed to the switching circuit 6 as a switching control signal. Then the microwave (received wave) is switched at the switching circuit 6 by using the switching control signal to be an intermittent signal (transmission wave) and it is given to an amplifier 9 and a circulator 2 and the result is radiated from an antenna 1.

Description

【発明の詳細な説明】 〔概要〕 受信したマイクロ波を遅延してこの遅延時間に等しいパ
ルス幅をもつスイッチ制御信号でスイッチングして間欠
信号として送信するデイレート・レピータ方式送受信装
置に用いる同期発振回路に関し、 簡単な回路構成で、温度変動及び製品ばらつきによる遅
延線の遅延時間のばらつきに無関係に安定なスイッチ制
御信号を発生することを目的とし、遅延線をスイッチ制
御信号を発生する発振手段の一部として用い、遅延線の
入力側及び出力側にマイクロ波成分と同期発振周波数成
分とを分離する分離回路を設けて該夫々の分離回路の該
同期発振周波数成分を取出す端子を2つのゲート回路で
接続し、ゲート回路の接続点よりスイッチ制御信号を出
力する構成とする。
[Detailed Description of the Invention] [Summary] A synchronous oscillation circuit used in a day-rate repeater type transmitting/receiving device that delays received microwaves, switches them using a switch control signal having a pulse width equal to the delay time, and transmits the signals as intermittent signals. Regarding this, the aim is to generate a stable switch control signal with a simple circuit configuration, regardless of variations in the delay time of the delay line due to temperature fluctuations and product variations. A separation circuit for separating the microwave component and the synchronous oscillation frequency component is provided on the input side and the output side of the delay line, and the terminal for extracting the synchronous oscillation frequency component of each separation circuit is connected to the terminal using two gate circuits. The configuration is such that the switch control signal is output from the connection point of the gate circuit.

〔産業上の利用分野〕[Industrial application field]

本発明は、受信したマイクロ波を遅延してこの遅延時間
に等しいパルス幅をもつスイッチ制御信号でスイッチン
グして間欠信号として送信するデイレード・レピータ方
式送受信装置に用いる同期発振回路に関する。
The present invention relates to a synchronous oscillation circuit used in a delayed repeater type transmitting/receiving device that delays received microwaves, switches them using a switch control signal having a pulse width equal to the delay time, and transmits the signals as intermittent signals.

上述のようなデイレード・レピータ方式の送受信装置に
おいて、受信マイクロ波を遅延する素子として例えば5
0nsの同軸遅延線等を用いると、この遅延線の遅延時
間は温度変動及び製品ばらつきによって大きくばらつく
。このような遅延時間のばらつきかあると、後述のよう
に送信波と制御信号とにタイミングずれを生じて送信波
か受信波に回り込みを生じ、この結果、発振等の不具合
を生じることになる。そこで、遅延時間のばらつきがあ
っても送信波と制御信号とのタイミングを合わせ、発振
等の不具合を生じないようにすることが必要である。
In the delayed repeater type transmitter/receiver as described above, for example, five elements are used as elements that delay the received microwave.
When a 0 ns coaxial delay line or the like is used, the delay time of this delay line varies greatly due to temperature fluctuations and product variations. If there is such a variation in delay time, a timing difference will occur between the transmitted wave and the control signal, as will be described later, and a wraparound will occur between the transmitted wave and the received wave, resulting in problems such as oscillation. Therefore, even if there are variations in delay time, it is necessary to match the timing of the transmitted wave and the control signal to avoid problems such as oscillation.

〔従来の技術〕[Conventional technology]

第4図は従来の一例の回路図、第3図はその動作タイミ
ングチャートを示す。第4図中、二重線はマイクロ波の
伝送線路を示す。第4図において、アンテナlにて受信
されたマイクロ波(受信波)(第3図(B))はサーキ
ュレータ2.アンプ3を経、遅延時間50nsの遅延線
4にて遅延され、アンプ5を介してスイッチ回路6に供
給される。
FIG. 4 is a circuit diagram of a conventional example, and FIG. 3 is an operation timing chart thereof. In FIG. 4, double lines indicate microwave transmission lines. In FIG. 4, the microwave (received wave) (FIG. 3(B)) received by antenna l is transmitted to circulator 2. The signal passes through an amplifier 3, is delayed by a delay line 4 with a delay time of 50 ns, and is supplied to a switch circuit 6 via an amplifier 5.

一方、水晶振動子等を用いた発振器(スイッチ制御信号
源)7からの発振信号はパルス形成回路8にて例えば分
周され、デユーティサイクル5096゜パルス幅50n
sのスイッチ制御信号(第3図(A))とされる。受信
波はスイッチ回路6においてスイッチ制御信号によって
スイッチングされて第3図(C)に示す間欠信号(送信
波)とされ、アンプ9.サーキュレータ2を経てアンテ
ナlより放射される。このデイレード・レピータ方式の
送受信装置においては、50nsのマイクロ波受信と5
0nsのマイクロ波送信とか交互に繰返し行なわれる。
On the other hand, an oscillation signal from an oscillator (switch control signal source) 7 using a crystal resonator or the like is frequency-divided by a pulse forming circuit 8, and has a duty cycle of 5096 degrees and a pulse width of 50 nm.
s switch control signal (FIG. 3(A)). The received wave is switched by the switch control signal in the switch circuit 6 to become an intermittent signal (transmission wave) shown in FIG. 3(C), and then sent to the amplifier 9. It passes through the circulator 2 and is radiated from the antenna l. This delayed repeater type transmitter/receiver has 50 ns microwave reception and 5 ns microwave reception.
Microwave transmission of 0 ns is alternately repeated.

ここで、遅延線4は一般に温度変動によって遅延時間に
ばらつきを生じ、以下に説明するように送信波と制御信
号とにタイミングずれを生じる。
Here, the delay line 4 generally causes variations in delay time due to temperature fluctuations, causing a timing shift between the transmitted wave and the control signal as described below.

遅延線4の遅延時間か温度変動によって50nsから例
えば55nsに変化したとすると、遅延線4を通る信号
のタイミングは第3図(D)に示す如くとなり、スイッ
チ制御信号(第3図(A))とタイミングずれ(55−
50=5ns)を生じ、このため、閉ループ内において
送信すべき信号(送信波)か受信波に回り込みを生じ、
この結果、発振等の不具合を生じることになる。そこで
、従来、このような不具合を生じないようにするため、
以下に説明するような温度補償手段によって温度補償が
行なわれている。温度検出器lOにて検出された環境温
度情報は温度補償回路11に供給され、ここで、同期用
トリガ検出回路12にて検出されたスイッチ制御信号の
タイミングに同期した温度補償信号か得られる。発振器
7の出力信号の発生タイミングは温度補償回路IIから
の温度補償信号によって制御されてタイミングずれ(5
ns)分だけ遅延され、これにより、温度変動によって
遅延線4の遅延時間かばらついても送信波に対応したタ
イミングのスイッチ制御信号(第3図(E))とされ、
前述のような発振等の不具合を・生じることなく送受信
を行なうことかできる。
If the delay time of the delay line 4 changes from 50 ns to, for example, 55 ns due to temperature fluctuations, the timing of the signal passing through the delay line 4 will be as shown in Fig. 3 (D), and the switch control signal (Fig. 3 (A) ) and timing deviation (55-
50 = 5 ns), and as a result, the signal to be transmitted (transmitted wave) or received wave wraps around in the closed loop,
As a result, problems such as oscillation will occur. Therefore, conventionally, in order to prevent such problems from occurring,
Temperature compensation is performed by temperature compensation means as described below. The environmental temperature information detected by the temperature detector IO is supplied to the temperature compensation circuit 11, where a temperature compensation signal synchronized with the timing of the switch control signal detected by the synchronization trigger detection circuit 12 is obtained. The generation timing of the output signal of the oscillator 7 is controlled by the temperature compensation signal from the temperature compensation circuit II, and the timing deviation (5
As a result, even if the delay time of the delay line 4 varies due to temperature fluctuations, the switch control signal (FIG. 3 (E)) has a timing corresponding to the transmitted wave.
Transmission and reception can be performed without causing problems such as oscillation as described above.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

然るに、第4図に示す従来例は、温度検出器10、温度
補償回路11.同期用トリが検出回路12等からなる温
度補償手段を必要とし、又、スイッチ制御信号を発生さ
せるための発振器7.パルス形成回路8を必要とし、回
路が複雑になり、しかもコスト高になる問題点かあった
。更に、遅延線4の遅延時間は温度変動によるばらつき
の他、製品によるばらつきもあり、従来例のものは製品
による遅延時間のばらつきには対処できない問題点かあ
った。
However, the conventional example shown in FIG. 4 includes a temperature detector 10, a temperature compensation circuit 11. The synchronization trigger requires a temperature compensation means consisting of a detection circuit 12, etc., and an oscillator 7 for generating a switch control signal. The pulse forming circuit 8 is required, which makes the circuit complicated and increases the cost. Furthermore, the delay time of the delay line 4 varies not only due to temperature fluctuations but also due to products, and the conventional example has the problem of not being able to deal with variations in delay time depending on products.

本発明は、簡単な回路構成で、温度変動及び製品ばらつ
きによる遅延線の遅延時間のばらつきに無関係に安定な
スイッチ制御信号を発生てきる同期発振回路を提供する
ことを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a synchronous oscillation circuit that has a simple circuit configuration and can generate a stable switch control signal regardless of variations in delay time of a delay line due to temperature fluctuations and product variations.

〔課題を解決するだめの手段〕[Failure to solve the problem]

第1図は本発明の原理図を示す。同図中、20は遅延線
、2】はスイッチ回路で、マイクロ波を遅延線20て遅
延させた信号をスイッチ回路21てスイッチ制御信号に
てスイッチングして取出す。
FIG. 1 shows a diagram of the principle of the present invention. In the figure, 20 is a delay line, 2 is a switch circuit, and a signal obtained by delaying the microwave by the delay line 20 is switched and extracted by a switch control signal by a switch circuit 21.

本発明は、遅延線20をスイッチ制御信号を発生する発
振手段の一部として用いる。22.23は分離回路で、
遅延線20の入力側及び出力側に設けられ、マイクロ波
成分と同期発振周波数成分とを分離する。24.25は
ゲート回路て、該夫々の分離回路22.23の該同期発
振周波数成分を取出す端子を接続する。ゲート回路24
.25の接続点よりスイッチ制御信号を出力する構成と
する。
The present invention uses delay line 20 as part of an oscillating means for generating switch control signals. 22.23 is a separation circuit,
It is provided on the input side and the output side of the delay line 20, and separates the microwave component and the synchronous oscillation frequency component. Gate circuits 24 and 25 connect terminals for extracting the synchronous oscillation frequency components of the respective separation circuits 22 and 23. Gate circuit 24
.. The configuration is such that a switch control signal is output from 25 connection points.

〔作用〕[Effect]

本発明では、遅延線20を発振手段の一部として用い、
遅延線20の遅延タイミングに対応したパルスタイミン
グをもつスイッチ制御信号を得る。
In the present invention, the delay line 20 is used as part of the oscillation means,
A switch control signal having pulse timing corresponding to the delay timing of the delay line 20 is obtained.

従って、遅延線の遅延時間か温度変動や製品ばらつき等
で変動してもその変動分に応したパルスタイミングをも
つスイッチ制御信号か得られ、温度変動や製品ばらつき
かあっても送信波の受信波への回り込みを防止できる。
Therefore, even if the delay time of the delay line varies due to temperature fluctuations, product variations, etc., a switch control signal with pulse timing corresponding to the variation can be obtained, and even if there are temperature fluctuations or product variations, the received wave of the transmitted wave It is possible to prevent detours to occur.

この場合、本発明では、特に従来例のような温度補償手
段や水晶振動子等を用いた発振器(スイッチ制御信号源
)等を設けないでもよく、従来例に比して回路を簡単に
、低コストに構成できる。
In this case, in the present invention, there is no need to provide a temperature compensation means or an oscillator (switch control signal source) using a crystal oscillator, etc. as in the conventional example, and the circuit can be constructed more easily and at a lower cost than in the conventional example. Can be configured to cost.

〔実施例〕〔Example〕

第2図は本発明の一実施例の回路図を示し、同図中、第
4図と同一構成部分には同一番号を付す。
FIG. 2 shows a circuit diagram of an embodiment of the present invention, in which the same components as in FIG. 4 are given the same numbers.

第2図中、15.16は分離回路で、夫々マイクロ波通
過用のコンデンサとマイクロ波阻止用のインダクタンス
とにて構成されており、遅延線4の入力側及び出力側に
夫々接続されており、マイクロ波成分と同期発振周波数
成分とを分離する。
In Fig. 2, reference numerals 15 and 16 denote separation circuits, each consisting of a capacitor for passing microwaves and an inductance for blocking microwaves, and connected to the input side and output side of the delay line 4, respectively. , to separate the microwave component and the synchronous oscillation frequency component.

17.18は例えばインバータ等のゲート回路で、分離
回路15.16を接続し、ゲート回路17゜18の接続
点からスイッチ制御信号を出力する。
Reference numerals 17 and 18 denote gate circuits such as inverters, which are connected to the separation circuits 15 and 16 and output switch control signals from the connection point of the gate circuits 17 and 18.

19はバッファ(ゲート回路)で、スイッチ制御信号の
タイミングを調整するもので、原理的には設けなくても
よい。
Reference numeral 19 denotes a buffer (gate circuit) that adjusts the timing of the switch control signal, and does not need to be provided in principle.

本発明は、遅延線41分離回路15,16゜ゲート回路
17.18にて同期発振回路を構成し、即ち、遅延線4
を発振回路の一部として用い、遅延線4の遅延時間の変
動(ばらつき)に対応したパルスタイミングをもつスイ
ッチ制御信号を得るものである。
In the present invention, a synchronous oscillation circuit is configured by the delay line 41 separation circuit 15, 16° gate circuit 17, 18, that is, the delay line 41
is used as a part of an oscillation circuit to obtain a switch control signal having a pulse timing that corresponds to variation (dispersion) in the delay time of the delay line 4.

次に、第3図に示す動作タイミングチャートと併せてそ
の動作を説明する。第2図において、アンテナ】にて受
信されたマイクロ波(受信波)(第3図(B))はサー
キュレータ2.アンプ3を経、遅延時間50nsの遅延
線4にて遅延され、アンプ5を介してスイッチ回路6に
供給される。
Next, the operation will be explained in conjunction with the operation timing chart shown in FIG. In FIG. 2, the microwave (received wave) received by antenna 2 (FIG. 3 (B)) is transmitted to circulator 2. The signal passes through an amplifier 3, is delayed by a delay line 4 with a delay time of 50 ns, and is supplied to a switch circuit 6 via an amplifier 5.

ここて、基本的な構成である遅延線4及びゲート回路1
7.18からなる閉ループは周知の発振回路を構成して
おり、ある周期のパルス信号を発生する手段として広く
用いられているものである。
Here, the basic configuration of the delay line 4 and gate circuit 1 is as follows.
A closed loop consisting of 7.18 constitutes a well-known oscillation circuit, and is widely used as a means for generating a pulse signal with a certain period.

分離回路15.16によりマイクロ波成分か分離され、
このマイクロ波成分はスイッチ回路6に供給される。一
方、分離回路15.16により、閉ループを構成する発
振回路の同期発振周波数成分か分離され、即ち、TTL
(トランジスタ・トランジスタ・ロジック)信号電圧か
検出され、スイッチ制御信号(第3図(A))としてス
イッチ回路6に供給される。マイクロ波(受信波)(第
3図(B))はスイッチ回路6においてスイッチ制御信
号(第3図(A))によってスイッチングされて第3図
(C)に示す間欠信号(送信波)とされ、アンプ9.サ
ーキュレータ2を経てアンテナ】より放射される。
Microwave components are separated by separation circuits 15 and 16,
This microwave component is supplied to the switch circuit 6. On the other hand, the separation circuits 15 and 16 separate the synchronous oscillation frequency components of the oscillation circuits constituting the closed loop, that is, TTL
(Transistor-Transistor-Logic) signal voltage is detected and supplied to the switch circuit 6 as a switch control signal (FIG. 3(A)). The microwave (received wave) (Fig. 3 (B)) is switched by the switch control signal (Fig. 3 (A)) in the switch circuit 6 and becomes an intermittent signal (transmission wave) shown in Fig. 3 (C). , amplifier 9. It is radiated from the antenna via circulator 2.

ここて、遅延線4の遅延時間か温度変動によって例えば
55nsになった場合、又は、製品ばらつきによって5
5nsの遅延時間をもつ遅延線4を用いた場合について
説明する。前述したように、遅延線41分離回路15.
16.ゲート回路17゜I8にて構成される発振回路は
、分離回路15゜16て分離される同期発振周波数成分
(TTL信号電圧)をスイッチ制御信号として出力する
構成であるので、このスイッチ制御信号は遅延線4の遅
延タイミングに対応したパルスタイミングをもつ。従っ
て、遅延線4の遅延時間か温度変動や製品ばらつき等に
よって変動してもその変動分に応じたパルスタイミング
をもつスイッチ制御信号(第3図(E))か得られ、温
度変動や製品ばらつきがあっても送信波の受信波への回
り込みを防止できる。この場合、本発明では、特に、従
来例のような温度補償手段や水晶振動子等を用いた発振
器(スイッチ制御信号源)等を設けないでもよく、従来
例に比して回路を簡単に、低コストに構成でき、かつ非
常に広い温度変動範囲においても十分に対処できる。
If the delay time of the delay line 4 becomes, for example, 55 ns due to temperature fluctuations, or if the delay time of the delay line 4 becomes 55 ns due to product variations,
A case will be explained in which a delay line 4 having a delay time of 5 ns is used. As mentioned above, the delay line 41 isolation circuit 15.
16. The oscillation circuit constituted by the gate circuit 17゜I8 is configured to output the synchronous oscillation frequency component (TTL signal voltage) separated by the separation circuit 15゜16 as a switch control signal, so this switch control signal is delayed. It has a pulse timing corresponding to the delay timing of line 4. Therefore, even if the delay time of the delay line 4 fluctuates due to temperature fluctuations, product variations, etc., a switch control signal (Fig. 3 (E)) with a pulse timing corresponding to the fluctuation can be obtained. Even if there is a signal, it is possible to prevent the transmitted wave from going around to the received wave. In this case, in the present invention, there is no need to provide a temperature compensation means or an oscillator (switch control signal source) using a crystal oscillator, etc. as in the conventional example, and the circuit can be simplified compared to the conventional example. It can be configured at low cost and can adequately handle even a very wide range of temperature fluctuations.

なお、スイッチ制御信号のパルスタイミングを遅延線4
の遅延タイミングに完全に合わせるには、バッファ19
のインバータの段数を加減したり、分離回路15.16
のインダクタンスの値を加減すれば、簡単にその微調整
を行なうことかできる。
Note that the pulse timing of the switch control signal is controlled by the delay line 4.
To perfectly match the delay timing of the buffer 19
The number of inverter stages can be increased or decreased, or separation circuits 15.16
You can easily make fine adjustments by adjusting the inductance value.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く、本発明によれは、遅延線をスイッチ
制御信号を発生する発振手段の一部として用いる構成と
したため、デイレード・レピータ方式送受信装置に適用
した場合、簡単な回路で遅延線の遅延時間のばらつきに
適合した安定なスイッチ制ノ諌信号を発生でき、低コス
トに構成でき、又、遅延時間の広い変動範囲においても
十分に対処できる。
As explained above, since the present invention has a configuration in which the delay line is used as a part of the oscillation means that generates the switch control signal, when applied to a delayed repeater type transmitting/receiving device, the delay line can be delayed with a simple circuit. It is possible to generate a stable switch control warning signal that adapts to time variations, it can be constructed at low cost, and it can sufficiently cope with a wide variation range of delay time.

【図面の簡単な説明】 第1図は本発明の原理図、 第2図は本発明の一実施例の回路図、 第3図は本発明及び従来例の動作タイミングチャート、 第4図は従来の一例の回路図である。 図において、 lはアンテナ、 2はサーキュレータ、 4.20は遅延線、 6.2Iはスイッチ回路、 15.16.22.23は分離口′路、17.18,1
9.24,25.26はゲート回路 を示す。 特許出願人 富 士 通 株式会社 本発明及び従来例の動作タイミング−f↑−ト第3図 従来の一例の回路図 第4図
[Brief Description of the Drawings] Figure 1 is a principle diagram of the present invention, Figure 2 is a circuit diagram of an embodiment of the present invention, Figure 3 is an operation timing chart of the present invention and the conventional example, and Figure 4 is the conventional example. It is a circuit diagram of an example. In the figure, l is an antenna, 2 is a circulator, 4.20 is a delay line, 6.2I is a switch circuit, 15.16.22.23 is an isolation path, 17.18, 1
9.24 and 25.26 indicate gate circuits. Patent applicant: Fujitsu Ltd. Operation timing of the present invention and conventional example - f↑ - Fig. 3 Circuit diagram of a conventional example Fig. 4

Claims (2)

【特許請求の範囲】[Claims] (1)マイクロ波を遅延線(20)で遅延させた信号を
スイッチ回路(21)でスイッチ制御信号にてスイッチ
ングして取出す回路において、上記遅延線(20)を上
記スイッチ制御信号を発生する発振手段の一部として用
い、 上記遅延線(20)の入力側及び出力側にマイクロ波成
分と同期発振周波数成分とを分離する分離回路(22、
23)を設けて該夫々の分離回路(22、23)の該同
期発振周波数成分を取出す端子を2つのゲート回路(2
4、25)で接続し、該ゲート回路(24、25)の接
続点より上記スイッチ制御信号を出力する構成としてな
ることを特徴とする同期発振回路。
(1) In a circuit that outputs a signal obtained by delaying a microwave with a delay line (20) by switching it with a switch control signal in a switch circuit (21), the delay line (20) is oscillated to generate the switch control signal. A separation circuit (22,
23), and the terminals for extracting the synchronous oscillation frequency components of the respective separation circuits (22, 23) are connected to two gate circuits (23).
4, 25) and outputs the switch control signal from the connection point of the gate circuit (24, 25).
(2)上記2つのゲート回路(24、25)の接続点と
前記スイッチ回路(21)との間に、上記スイッチ制御
信号のパルスタイミングを調整するためのゲート回路(
26)を接続した構成としてなることを特徴とする請求
項1記載の同期発振回路。
(2) A gate circuit for adjusting the pulse timing of the switch control signal (
26). The synchronous oscillation circuit according to claim 1, wherein the synchronous oscillation circuit has a configuration in which the synchronous oscillation circuit 26) is connected.
JP2187434A 1990-07-16 1990-07-16 Synchronous oscillating circuit Pending JPH0477017A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2187434A JPH0477017A (en) 1990-07-16 1990-07-16 Synchronous oscillating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2187434A JPH0477017A (en) 1990-07-16 1990-07-16 Synchronous oscillating circuit

Publications (1)

Publication Number Publication Date
JPH0477017A true JPH0477017A (en) 1992-03-11

Family

ID=16205994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2187434A Pending JPH0477017A (en) 1990-07-16 1990-07-16 Synchronous oscillating circuit

Country Status (1)

Country Link
JP (1) JPH0477017A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7359673B2 (en) 2002-11-25 2008-04-15 Keio University UWB repeater with pulse delay and UWB communication system
US7753631B2 (en) 2003-04-30 2010-07-13 Nobuyuki Sugimura Pitch diameter displaced screw

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7359673B2 (en) 2002-11-25 2008-04-15 Keio University UWB repeater with pulse delay and UWB communication system
US7753631B2 (en) 2003-04-30 2010-07-13 Nobuyuki Sugimura Pitch diameter displaced screw

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