JPH0473882U - - Google Patents

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Publication number
JPH0473882U
JPH0473882U JP11640890U JP11640890U JPH0473882U JP H0473882 U JPH0473882 U JP H0473882U JP 11640890 U JP11640890 U JP 11640890U JP 11640890 U JP11640890 U JP 11640890U JP H0473882 U JPH0473882 U JP H0473882U
Authority
JP
Japan
Prior art keywords
circuit
pulse
phase difference
indication
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11640890U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11640890U priority Critical patent/JPH0473882U/ja
Publication of JPH0473882U publication Critical patent/JPH0473882U/ja
Pending legal-status Critical Current

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  • Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案のパルス歪率計の構成図、第
2図はこの考案のタイミングチヤート図、第3図
はこの考案の制御信号と差の信号との関係図、第
4図は従来のパルス歪率計の構成図、第5図は従
来のタイミングチヤート図、第6図は従来の制御
信号と差の信号との関係図である。 図中、1は同期信号発生回路、2は差動増巾回
路、3は基準パルス発生回路、4は基準パルス制
御回路、5は切換回路、6は利得調整回路、7は
指示回路、14は位相差検出回路、15は位相補
正回路である。尚、図中同一あるいは相当部分に
は同一符号を付して示してある。
Fig. 1 is a block diagram of the pulse distortion meter of this invention, Fig. 2 is a timing chart of this invention, Fig. 3 is a relationship diagram between the control signal and difference signal of this invention, and Fig. 4 is a diagram of the conventional pulse distortion meter. FIG. 5 is a diagram showing the configuration of a pulse distortion meter, FIG. 5 is a conventional timing chart, and FIG. 6 is a diagram showing the relationship between a conventional control signal and a difference signal. In the figure, 1 is a synchronizing signal generation circuit, 2 is a differential amplifier circuit, 3 is a reference pulse generation circuit, 4 is a reference pulse control circuit, 5 is a switching circuit, 6 is a gain adjustment circuit, 7 is an instruction circuit, and 14 is a The phase difference detection circuit 15 is a phase correction circuit. In the drawings, the same or corresponding parts are designated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力パルスとこの入力パルスに同期した基準パ
ルスとを差動増巾回路によつて比較測定するパル
ス歪率計において、上記差動増巾回路の負入力端
を接地側と基準パルス側に切換る切換回路と、指
示回路の指示が規定値になる様に利得を調整する
利得調整回路と、上記利得調整回路の出力信号に
よりパルスの歪率を指示する指示回路と、上記パ
ルスと基準パルスとの位相の差を検出する位相差
検出回路と、上記位相差検出回路の出力信号によ
り位相差を無くす為の位相補正回路とを有する事
を特徴とするパルス歪率計。
In a pulse distortion meter that compares and measures an input pulse and a reference pulse synchronized with this input pulse using a differential amplification circuit, the negative input terminal of the differential amplification circuit is switched to the ground side and the reference pulse side. a switching circuit, a gain adjustment circuit that adjusts the gain so that the indication of the indication circuit becomes a specified value, an indication circuit that instructs the distortion rate of the pulse by the output signal of the gain adjustment circuit, and a switch between the pulse and the reference pulse. A pulse distortion meter comprising: a phase difference detection circuit for detecting a phase difference; and a phase correction circuit for eliminating the phase difference using an output signal of the phase difference detection circuit.
JP11640890U 1990-11-06 1990-11-06 Pending JPH0473882U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11640890U JPH0473882U (en) 1990-11-06 1990-11-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11640890U JPH0473882U (en) 1990-11-06 1990-11-06

Publications (1)

Publication Number Publication Date
JPH0473882U true JPH0473882U (en) 1992-06-29

Family

ID=31864232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11640890U Pending JPH0473882U (en) 1990-11-06 1990-11-06

Country Status (1)

Country Link
JP (1) JPH0473882U (en)

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