JPH047183Y2 - - Google Patents
Info
- Publication number
- JPH047183Y2 JPH047183Y2 JP6437485U JP6437485U JPH047183Y2 JP H047183 Y2 JPH047183 Y2 JP H047183Y2 JP 6437485 U JP6437485 U JP 6437485U JP 6437485 U JP6437485 U JP 6437485U JP H047183 Y2 JPH047183 Y2 JP H047183Y2
- Authority
- JP
- Japan
- Prior art keywords
- sputtering
- substrate
- substrate holder
- shutter plate
- target
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 34
- 238000004544 sputter deposition Methods 0.000 claims description 24
- 239000000463 material Substances 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- 238000002161 passivation Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Physical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Description
【考案の詳細な説明】
〔産業上の利用分野〕
本考案は半導体レーザーの端面に誘電体膜（反
射膜）を形成し、レーザ素子の高効率化を計るた
めのパツシベーシヨンスパツタ装置に関するもの
である。[Detailed description of the invention] [Industrial application field] The invention is a passivation sputtering device for forming a dielectric film (reflection film) on the end face of a semiconductor laser to improve the efficiency of the laser element. It is related to.
〔従来の技術〕
半導体レーザーの端面パツシベーシヨンは、素
子の光出力端面に誘導体膜（反射膜）を形成する
表面安定化処理であり、レーザーの端面の反射率
を制御するため、また、レーザーの端面を保護す
るために成膜されるものである。[Prior art] Edge passivation of a semiconductor laser is a surface stabilization treatment that forms a dielectric film (reflection film) on the light output end face of the device. A film is formed to protect the
従来のパツシベーシヨンスパツタ装置は第２図
に示すように、真空槽１の上部にカソード電極
（ターゲツト）部２が、、またその対向する下方に
基板ホルダー部５が配置され、その中間位置にス
ライド式又は回転円板式のシヤツター板７が出没
可能に配設されている。 As shown in FIG. 2, the conventional passivation sputtering device has a cathode electrode (target) section 2 on the top of a vacuum chamber 1, a substrate holder section 5 on the opposite lower side, and a substrate holder section 5 in the middle. A sliding or rotating disc type shutter plate 7 is retractably arranged at the position.
上述した従来のパツシベーシヨンスパツタ装置
は第２図に示すように、真空槽内上部にカソード
電極（ターゲツト）２と、それと対向する下方の
基板ホルダー部５との中間位置に、スライド式又
は回転円板式等のフラツトなシヤツター板７を配
設しているため、基板ホルダー部５に載置された
基板（レーザ端面）８へターゲツトをクリーニン
グするためのプリスパツタ時のプラズマがシヤツ
ター板７の周縁より内側に回り込み、本スパツタ
を行う前に、基板８上に酸化層を成長させるとい
う欠点があつた。
As shown in FIG. 2, the conventional passivation sputtering device described above has a slide type device installed at an intermediate position between the cathode electrode (target) 2 in the upper part of the vacuum chamber and the lower substrate holder part 5 facing the cathode electrode (target) 2. Alternatively, since a flat shutter plate 7 such as a rotary disk type is provided, the plasma generated during pre-sputtering for cleaning the target on the substrate (laser end face) 8 placed on the substrate holder part 5 is transferred to the shutter plate 7. There was a drawback that the oxidized layer was grown on the substrate 8 before the main sputtering was performed by going inward from the periphery.
上記のように本スパツタ前にレーザ端面に酸化
層等の薄膜の成長があると、その上からいくら良
質の反射膜（SiO2等）を成長させても、寿命テ
ストで100Hもしないで特性劣化（光出力）が発生
する（通常は1000Hの寿命テスト）という問題点
があつた。 As mentioned above, if a thin film such as an oxide layer is grown on the laser end face before main sputtering, no matter how much a high-quality reflective film (SiO 2 etc.) is grown on top of it, the characteristics will deteriorate in less than 100 hours in a life test. There was a problem that deterioration (light output) occurred (normally 1000 H life test).
本考案は前記問題点を解消した装置を提供する
ものである。 The present invention provides an apparatus that solves the above problems.
上記目的を達成するため、本考案によるパツシ
ベーシヨンスパツタ装置においては、カソード部
と、基板ホルダー部と、シヤツター板とを真空槽
内に有するパツシベーシヨンスパツタ装置であつ
て、
カソード部は、スパツタすべき材料であるター
ゲツトが取付けられたカソード電極であり、
基板ホルダー部は、端面のみをスパツタ面に露
出させた基板を保持し、カソード部のターゲツト
面と向き合せて上下動可能に設置されたものであ
り、
シヤツター板は、カソード部と、基板ホルダー
部との間に出没可能に設置され、プリスパツタ時
にプラズマから基板を隔離するものであり、リン
グ状のつばを有し、
リング状のつばは、シヤツター板の下周縁に取
付けられ、上昇位置に変位させた基板ホルダー部
上の基板の周縁を覆い、プリスパツタ時に基板端
面へのプラズマの回り込みを阻止するものであ
る。
In order to achieve the above object, the passivation sputtering apparatus according to the present invention is a passivation sputtering apparatus having a cathode part, a substrate holder part, and a shutter plate in a vacuum chamber, The part is a cathode electrode to which a target, which is the material to be sputtered, is attached, and the substrate holder part holds a substrate with only the end surface exposed to the sputtering surface, and can be moved up and down to face the target surface of the cathode part. The shutter plate is installed retractably between the cathode part and the substrate holder part, isolates the substrate from plasma during pre-sputtering, and has a ring-shaped flange. The shaped collar is attached to the lower periphery of the shutter plate, covers the periphery of the substrate on the substrate holder moved to the raised position, and prevents plasma from going around to the end surface of the substrate during pre-sputtering.
次に、本考案の一実施例について図面を参照し
て説明する。
Next, an embodiment of the present invention will be described with reference to the drawings.
第１図は本考案の一実施例の縦断面図である。
真空槽１内の上部にカソード電極（ターゲツト）
部２があり、電極部２には複数のスパツタすべき
材料であるターゲツト３，３′が取り付けられて
いる。カソード電極部（ターゲツト）部２と対向
する下方には、基板（半導体レーザ）８の端面の
みをスパツタ面に出すようにセツトされている基
板ホルダー４を複数個載置している基板ホルダー
部５が上下動可能に配設されている。基板ホルダ
ー部５の上部周縁にはリング場につば６が取り付
けられている。カソード電極部２と基板ホルダー
部５との中間にスライド式のシヤツター板７が出
没可能に配設されており、このシヤツター板７の
下部周縁にリング状につば６′が取り付けられて
いる。プリスパツタを行う時には、第１図のよう
にカソード電極部２と基板ホルダー部５との中間
位置にシヤツター板７が位置する。基板ホルダー
部５を上昇させてシヤツター板７のつば６′の内
側に基板ホルダー部５のつば６を同心円上で重な
り合わせ、すきまを最小にし、シヤツター板７に
て基板ホルダー部５の上面を被覆し、プリスパツ
タの際、プラズマが基板（半導体レーザ）８の端
面に回り込まないようにする。プリスパツタの完
了後は、基板ホルダー部５を元の位置迄下降さ
せ、一方シヤツター７を右側へ移動させ、本スパ
ツタを所望の時間行う。 FIG. 1 is a longitudinal sectional view of an embodiment of the present invention.
A cathode electrode (target) is placed at the top of the vacuum chamber 1.
There is a part 2, and a plurality of targets 3, 3', which are materials to be sputtered, are attached to the electrode part 2. At the bottom facing the cathode electrode section (target) section 2, there is a substrate holder section 5 on which a plurality of substrate holders 4 are mounted, which are set so that only the end surface of the substrate (semiconductor laser) 8 is exposed to the sputtering surface. is arranged so that it can move up and down. A collar 6 is attached to the upper peripheral edge of the substrate holder part 5 in a ring field. A sliding shutter plate 7 is provided between the cathode electrode part 2 and the substrate holder part 5 so as to be retractable, and a ring-shaped collar 6' is attached to the lower peripheral edge of the shutter plate 7. When performing pre-sputtering, the shutter plate 7 is positioned at an intermediate position between the cathode electrode section 2 and the substrate holder section 5, as shown in FIG. Raise the board holder part 5 and overlap the brim 6 of the board holder part 5 concentrically with the inside of the brim 6' of the shutter plate 7, minimizing the gap, and cover the upper surface of the board holder part 5 with the shutter plate 7. However, during pre-sputtering, the plasma is prevented from going around to the end face of the substrate (semiconductor laser) 8. After the pre-sputtering is completed, the substrate holder part 5 is lowered to its original position, while the shutter 7 is moved to the right, and the main sputtering is performed for a desired time.
以上説明したように本考案によれば、プリスパ
ツタの際に、プラズマが基板（半導体レーザ）の
端面へ回り込むのを防止でき、したがつて、基板
の端面に酸化層等が成長するのを防止して、半導
体レーザ素子の高効率化、キンクレベルの向上を
図ることができ、さらに（70℃、30mW程度）の
寿命テストでも（1000H程度）良好な寿命特性を
得ることができる効果を有するものである。
As explained above, according to the present invention, it is possible to prevent plasma from going around to the end face of the substrate (semiconductor laser) during pre-sputtering, thereby preventing the growth of an oxide layer, etc. on the end face of the substrate. It is possible to improve the efficiency and kink level of the semiconductor laser element, and also has the effect of obtaining good life characteristics (about 1000 H ) even in a life test (at 70°C, about 30 mW). It is.
第１図は本考案によるパツシベーシヨンスパツ
タ装置の縦断面図、第２図は従来のパツシベーシ
ヨンスパツタ装置の縦断面図である。
１……真空槽、２……カソード電極部、３，
３′……ターゲツト（スパツタ材）４……基板ホ
ルダー、５……基板ホルダー部、６……基板ホル
ダー部のつば、６′……シヤツター板のつば、７
……シヤツター板、８……基板（半導体レーザ）。
FIG. 1 is a longitudinal sectional view of a patissivation sputter device according to the present invention, and FIG. 2 is a longitudinal sectional view of a conventional patissivation sputter device. 1... Vacuum chamber, 2... Cathode electrode section, 3,
3'...Target (sputter material) 4...Substrate holder, 5...Substrate holder part, 6...Brim of board holder part, 6'...Brim of shutter plate, 7
...Shutter plate, 8...Substrate (semiconductor laser).
Claims (1)
板とを真空槽内に有するパツシベーシヨンスパツ
タ装置であつて、 カソード部は、スパツタすべき材料であるター
ゲツトが取付けられたカソード電極であり、 基板ホルダー部は、端面のみをスパツタ面に露
出させた基板を保持し、カソード部のターゲツト
面と向き合せて上下動可能に設置されたものであ
り、 シヤツター板は、カソード部と、基板ホルダー
部との間に出没可能に設置され、プリスパツタ時
にプラズマから基板を隔離するものであり、リン
グ状のつばを有し、 リング状のつばは、シヤツター板の下周縁に取
付けられ、上昇位置に変位させた基板ホルダー部
上の基板の周縁を覆い、プリスパツタ時に基板端
面へのプラズマの回り込みを阻止するものである
ことを特徴とするパツシベーシヨンスパツタ装
置。[Scope of Claim for Utility Model Registration] A sputtering sputtering device having a cathode part, a substrate holder part, and a shutter plate in a vacuum chamber, the cathode part being attached to a target, which is the material to be sputtered. The substrate holder part holds the substrate with only the end surface exposed to the sputtering surface, and is installed so as to be movable up and down facing the target surface of the cathode part.The shutter plate is It is installed retractably between the cathode part and the substrate holder part, and isolates the board from plasma during pre-sputtering. It has a ring-shaped flange, and the ring-shaped flange is attached to the lower periphery of the shutter plate. What is claimed is: 1. A sputtering device for sputtering, which covers the peripheral edge of a substrate on a substrate holder portion displaced to a raised position to prevent plasma from flowing around to an end surface of the substrate during pre-sputtering.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6437485U JPH047183Y2 (en) | 1985-04-30 | 1985-04-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6437485U JPH047183Y2 (en) | 1985-04-30 | 1985-04-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61179745U JPS61179745U (en) | 1986-11-10 |
| JPH047183Y2 true JPH047183Y2 (en) | 1992-02-26 |
Family
ID=30595400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6437485U Expired JPH047183Y2 (en) | 1985-04-30 | 1985-04-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH047183Y2 (en) |
-
1985
- 1985-04-30 JP JP6437485U patent/JPH047183Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61179745U (en) | 1986-11-10 |
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