JPH0471353B2 - - Google Patents

Info

Publication number
JPH0471353B2
JPH0471353B2 JP16072885A JP16072885A JPH0471353B2 JP H0471353 B2 JPH0471353 B2 JP H0471353B2 JP 16072885 A JP16072885 A JP 16072885A JP 16072885 A JP16072885 A JP 16072885A JP H0471353 B2 JPH0471353 B2 JP H0471353B2
Authority
JP
Japan
Prior art keywords
electrode
magnetoresistive element
substrate
magnetoresistive
magnetic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP16072885A
Other languages
Japanese (ja)
Other versions
JPS6221235A (en
Inventor
Yukio Sekine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP60160728A priority Critical patent/JPS6221235A/en
Publication of JPS6221235A publication Critical patent/JPS6221235A/en
Publication of JPH0471353B2 publication Critical patent/JPH0471353B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]

Landscapes

  • Wire Bonding (AREA)
  • Hall/Mr Elements (AREA)

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明はホール素子、磁気抵抗素子等の化合物
半導体装置に関し、特にこの磁気抵抗素子を使つ
た磁気抵抗装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a compound semiconductor device such as a Hall element or a magnetoresistive element, and particularly to a magnetoresistive device using this magnetoresistive element.

(ロ) 従来の技術 インジウムアンチモナイド(InSb)、インジウ
ムアーセナイド(InAs)の様にキヤリア移動度
の高い化合物半導体は、磁気を作用させると抵抗
値が変化するという性質を有しており、この種の
化合物半導体装置を用いた磁気検出器が実用化さ
れている。
(b) Conventional technology Compound semiconductors with high carrier mobility, such as indium antimonide (InSb) and indium arsenide (InAs), have the property that their resistance value changes when magnetism is applied to them. Magnetic detectors using this type of compound semiconductor device have been put into practical use.

特願昭59−134788号公報に示す如く磁気抵抗素
子を用いた磁気検出器の一般的な構成を第4図・
第5図に示す。筐体はプラスチツク成形品であつ
て、上面に形成した開口部はベリリウム−銅製の
薄膜よりなる保護板45にて閉鎖されている。保
護板45は筐体に一体にモールドされており、そ
の外面には耐摩耗性向上のために必要に応じてク
ロムメツキが施される。
The general configuration of a magnetic detector using a magnetoresistive element as shown in Japanese Patent Application No. 59-134788 is shown in Figure 4.
It is shown in FIG. The housing is a plastic molded product, and the opening formed on the top surface is closed with a protective plate 45 made of a thin film made of beryllium-copper. The protection plate 45 is integrally molded with the housing, and its outer surface is chrome plated as necessary to improve wear resistance.

筐体内にはこの保護板45と適当な間隔を隔て
て磁気抵抗素子を用いた磁気検出器31が配設さ
れている。この検出器本体31はセンサユニツト
32、マウント基板33及び永久磁石34等にて
構成されている。センサユニツト32はフエライ
ト製の厚肉の磁性体基板35上に相互に電気的に
接続したインジウムアンチモナイド等の化合物半
導体素子からなる磁気抵抗素子36を接着用樹脂
37を用いて並設したものか、また第5図の如く
絶縁膜37′を介して並設されたものであり、こ
の磁性体基板35はこれよりも薄肉のプラスチツ
ク製のマウント基板33に穿設した穴42に嵌合
させてある。この状態では磁性体基板35の下面
はマウント基板33下面のリン青銅製の底板43
を隔てて、底板43下面に一磁極端面を固定した
円柱状のバイアス用永久磁石34に対向し、また
両側の両磁気抵抗素子36はマウント基板33の
上面よりも所要寸法上方に高く位置した状態とな
つている。「マウント基板33上にはセンサユニ
ツト32を囲繞し、且つ上面を磁気抵抗素子36
表面よりも高くした環状スペーサが設けられてお
り、保護板45の周縁に該スペーサの上面を当接
させて保護板45と磁気抵抗素子36との間隔が
所定値になるようにしてある。そして各磁気抵抗
素子36の電極とマウント基板33上のプリント
配線44の一端部とは金線製の複数の導線41
(図面には1本のみ表われている)を用いて接続
され、またプリント配線44の他端部はマウント
基板33の周縁部においてリード線41の一端に
接続されている。これらリード線41の他端はプ
ラスチツク製の蓋部材に貫設したリード板41に
接続されていた。
A magnetic detector 31 using a magnetic resistance element is disposed within the housing at an appropriate distance from the protective plate 45. The detector main body 31 is composed of a sensor unit 32, a mount board 33, a permanent magnet 34, and the like. The sensor unit 32 has magnetoresistive elements 36 made of compound semiconductor elements such as indium antimonide that are electrically connected to each other and arranged in parallel on a thick magnetic substrate 35 made of ferrite using an adhesive resin 37. Moreover, as shown in FIG. 5, they are arranged in parallel with an insulating film 37' interposed therebetween, and this magnetic substrate 35 is fitted into a hole 42 made in a thinner plastic mount substrate 33. There is. In this state, the lower surface of the magnetic substrate 35 is connected to the phosphor bronze bottom plate 43 on the lower surface of the mount substrate 33.
, and faces a cylindrical bias permanent magnet 34 with one magnetic end face fixed to the lower surface of the bottom plate 43, and both magnetic resistance elements 36 on both sides are positioned higher than the upper surface of the mount substrate 33 by a required dimension. It is becoming. ``On the mount substrate 33, the sensor unit 32 is surrounded, and the upper surface is covered with a magnetoresistive element 36.''
An annular spacer is provided which is higher than the surface, and the upper surface of the spacer is brought into contact with the periphery of the protection plate 45 so that the distance between the protection plate 45 and the magnetoresistive element 36 becomes a predetermined value. The electrodes of each magnetoresistive element 36 and one end of the printed wiring 44 on the mount board 33 are connected to a plurality of conductive wires 41 made of gold wire.
(only one is shown in the drawing), and the other end of the printed wiring 44 is connected to one end of the lead wire 41 at the peripheral edge of the mount board 33. The other ends of these lead wires 41 were connected to a lead plate 41 extending through the plastic lid member.

ところで、従来各種トランジスタ、IC製品に
おけるペレツト、即ち素子側の電極と、ステム、
即ち基板側のリード板との接続には金線を用いて
ペレツト側に対しては金属の端末を溶融して玉状
とし、これを電極に押圧して釘頭形状に接着す
る、所謂ネイルヘツドボンドをし、また基板側の
リード板に対しては金線の端末を加熱しつつ圧着
する、所謂ステイツチボンドをするのが一般的で
あり、磁気検出器においてもリード線はペレツト
側である磁気抵抗素子の電極または磁気抵抗素子
に直接ネイルヘツドボンドし、また基板側である
プリント配線に対してはステイツチボンドをする
ことが行なわれている。
By the way, in conventional various transistors and IC products, pellets, that is, electrodes on the element side, stems,
In other words, a gold wire is used to connect the lead plate on the board side, and a metal end is melted into a bead shape for the pellet side, and this is pressed to the electrode and glued in the shape of a nail head, making a so-called nail head. In addition, it is common to heat and press the end of the gold wire to the lead plate on the board side, so-called static bonding, and in magnetic detectors, the lead wire is also on the pellet side. Nail head bonding is performed directly to the electrodes of the magnetoresistive element or the magnetoresistive element, and stitch bonding is performed to the printed wiring on the substrate side.

(ハ) 発明が解決しようとする問題点 前述の如く磁気抵抗素子上に形成された電極ま
たは直接磁気抵抗素子にワイヤボンドする方式で
は、磁気抵抗素子36がもろい化合物半導体で形
成されているという性質上、磁気抵抗素子36内
部に亀裂が生じ易く、断線による不良やノイズ発
生等の問題が生じていた。
(c) Problems to be Solved by the Invention As mentioned above, in the method of wire bonding to the electrode formed on the magnetoresistive element or directly to the magnetoresistive element, the property that the magnetoresistive element 36 is formed of a brittle compound semiconductor. Moreover, cracks are likely to occur inside the magnetoresistive element 36, causing problems such as failure due to disconnection and generation of noise.

(ニ) 問題点を解決するための手段 本発明は斯上の問題点に鑑みてなされ、前記第
1電極8上に形成され前記化合物半導体装置6上
面に露出している第2電極10と、該第2電極1
0と電気的に接続される金属線11とにより構成
することで解決するものである。
(d) Means for solving the problems The present invention was made in view of the above problems, and includes a second electrode 10 formed on the first electrode 8 and exposed on the upper surface of the compound semiconductor device 6; The second electrode 1
This problem can be solved by constructing the metal wire 11 electrically connected to the metal wire 11.

(ホ) 作用 前記金属線11は前記第1電極8上に形成され
前記磁気抵抗素子6上面に露出している第2電極
10にワイヤボンドされるため、直接前記化合物
半導体装置6に直接ストレスが加わらないため亀
裂が生じにくくなる。また第2電極10と金属線
11が直接接合されるため強固に行うことができ
る。
(E) Effect Since the metal wire 11 is wire-bonded to the second electrode 10 formed on the first electrode 8 and exposed on the upper surface of the magnetoresistive element 6, stress is not directly applied to the compound semiconductor device 6. Since it is not added, cracks are less likely to occur. Further, since the second electrode 10 and the metal wire 11 are directly joined, it can be strongly performed.

(ヘ) 実施例 以下、本発明をその実施例を示す図面に基いて
説明する。
(f) Examples The present invention will be explained below based on drawings showing examples thereof.

第1図は本発明による磁気抵抗素子を用いた磁
気抵抗装置の検出器本体部分の拡大断面図であ
る。検出器本体1は化合物半導体装置からなるセ
ンサユニツト2、マウント基板3、永久磁石4等
にて構成されている。センサユニツト2はフエラ
イト製の厚肉の磁性体基板5上に相互に電気的に
接続されたインジウムアンチモナイドなどの化合
物半導体素子からなる磁気抵抗素子6を接続用樹
脂7を用いて並設される。または第2図の如く絶
縁膜7′を介して磁気抵抗素子6を接着樹脂7を
用いて並設されても良い。一方磁気抵抗素子6の
下面にはラスタ9と同時に形成される第1電極8
が形成されている。本発明は前記第1電極8上に
形成され前記磁気抵抗素子6上面に露出している
第2電極ここでは銅10が形成され、そして第2
電極10と電気的に接続されている金属線11が
形成されている。
FIG. 1 is an enlarged cross-sectional view of a detector main body portion of a magnetoresistive device using a magnetoresistive element according to the present invention. The detector main body 1 is composed of a sensor unit 2 made of a compound semiconductor device, a mount substrate 3, a permanent magnet 4, and the like. The sensor unit 2 includes magnetoresistive elements 6 made of compound semiconductor elements such as indium antimonide that are electrically connected to each other and arranged in parallel on a thick magnetic substrate 5 made of ferrite using a connecting resin 7. Ru. Alternatively, as shown in FIG. 2, the magnetoresistive elements 6 may be arranged in parallel using an adhesive resin 7 with an insulating film 7' interposed therebetween. On the other hand, a first electrode 8 is formed on the lower surface of the magnetoresistive element 6 at the same time as the raster 9.
is formed. The present invention provides a second electrode formed on the first electrode 8 and exposed on the upper surface of the magnetoresistive element 6, in which copper 10 is formed, and a second
A metal wire 11 is formed which is electrically connected to the electrode 10.

このように構成したセンサユニツト2の磁性体
基板5をこれよりも薄肉のプラスチツク製のマウ
ント基板3に穿設した穴12に嵌合して固定す
る。この状態では磁性体基板5の下面はマウント
基板3下面のリン青銅製の底板13を介して、バ
イアス用の永久磁石4に対向し、また上面の磁気
抵抗素子6はマウント基板3上面より所要寸法高
く位置している。マウント基板3上には穴12の
周りにプリント配線14が設けられ、また周縁部
にはセンサユニツト2を囲繞し、且つ周縁部上面
を磁気抵抗素子6よりも高くした環状スペーサが
設けられており、保護板15の周縁に該スペーサ
の上面を当接させることにより保護板15と磁気
抵抗素子6との間隔が所定値になるようにしてあ
る。
The magnetic substrate 5 of the sensor unit 2 constructed in this manner is fitted into a hole 12 formed in a thinner plastic mount substrate 3 and fixed. In this state, the lower surface of the magnetic substrate 5 faces the permanent magnet 4 for bias via the phosphor bronze bottom plate 13 on the lower surface of the mount substrate 3, and the magnetoresistive element 6 on the upper surface faces the required dimension from the upper surface of the mount substrate 3. It is located high. A printed wiring 14 is provided around the hole 12 on the mount board 3, and an annular spacer is provided at the periphery to surround the sensor unit 2 and whose upper surface is higher than the magnetoresistive element 6. By bringing the upper surface of the spacer into contact with the periphery of the protection plate 15, the distance between the protection plate 15 and the magnetoresistive element 6 is set to a predetermined value.

そして各磁気抵抗素子6、の第2電極10とマ
ウント基板3上面のプリント配線14の一端部と
を接続する金属線11はボールボンドやステイツ
チボンド又は半田付け等で接続されている。
The metal wire 11 connecting the second electrode 10 of each magnetoresistive element 6 and one end of the printed wiring 14 on the upper surface of the mount substrate 3 is connected by ball bond, stitch bond, soldering, or the like.

このように前記第1電極8上に形成された前記
磁気抵抗素子6の上面に露出している第2電極1
0が形成され、この第2電極10に金属線11を
接続するため、直接磁気抵抗素子6にストレスを
加えることがないため亀裂等が生じるおそれがな
い。また第2電極10は銅等で形成されるためボ
ンデイング時に強固に接合する。
The second electrode 1 is exposed on the upper surface of the magnetoresistive element 6 formed on the first electrode 8 in this way.
0 is formed and the metal wire 11 is connected to this second electrode 10, stress is not directly applied to the magnetoresistive element 6, so there is no risk of cracking or the like. Further, since the second electrode 10 is made of copper or the like, it is firmly joined during bonding.

次に、本発明による磁気抵抗素子6の製造方法
の一列を第3図イ乃至第3図トを参照しながら説
明する。
Next, a method for manufacturing the magnetoresistive element 6 according to the present invention will be explained with reference to FIGS. 3A to 3G.

InSbのインゴツトをダイヤモンドソー等を用
いて約300μmの厚さのウエハーにスライスした後
前記ウエハの歪みを取除くためにミラーポリツシ
ユを行う。次に前記ウエハに第3図イに示す如く
第2電極10となる銅を積層する領域を溝17に
形成するため蝕刻を行う。ここではフオトレジス
ト18を所望のパターンに形成し蝕刻する。
After slicing the InSb ingot into wafers approximately 300 μm thick using a diamond saw or the like, mirror polishing is performed to remove distortion of the wafers. Next, the wafer is etched to form a region in the groove 17 in which copper is to be laminated, which will become the second electrode 10, as shown in FIG. 3A. Here, the photoresist 18 is formed into a desired pattern and etched.

次に第3図ロに示す如く前記ウエハ内の溝17
内に第2電極10となる銅を積層する。ここでは
硫酸銅を用いて電界メツキを行い所定の厚さに形
成する。
Next, as shown in FIG. 3B, the groove 17 in the wafer is
Copper that will become the second electrode 10 is laminated inside. Here, electroplating is performed using copper sulfate to form a predetermined thickness.

次に第3図ハに示す如く、フオトレジストを除
去し、更に前記ラスタとなる銅を積層する領域と
前記第1電極8となる銅を積層する領域とを溝形
成するために蝕刻を行う。
Next, as shown in FIG. 3C, the photoresist is removed, and etching is performed to form grooves in the area where copper is laminated to form the raster and the area where copper is laminated to form the first electrode 8.

続いて第3図ニに示す如く、硫酸銅を用いて電
界メツキを行い、前記第2電極10上の第1電極
8と前記ラスタ部9に銅を積層する。
Subsequently, as shown in FIG. 3D, electroplating is performed using copper sulfate to laminate copper on the first electrode 8 on the second electrode 10 and the raster part 9.

続いて第3図ホに示す如くフオトレジストを除
去し、磁気抵抗素子の形状に抜くために、前記溝
より深く蝕刻をする。そして基板上に第1電極8
が下方に形成されるように、接着剤等を使用して
固着する。
Subsequently, as shown in FIG. 3E, the photoresist is removed, and etching is performed deeper than the groove in order to cut out the shape of the magnetoresistive element. Then, a first electrode 8 is placed on the substrate.
Use adhesive or the like to fix it so that it is formed at the bottom.

更に第3図ヘに示す如く、前記磁気抵抗素子6
の第2電極10が露出するまで研磨する。
Furthermore, as shown in FIG.
Polishing is performed until the second electrode 10 is exposed.

最後に第3図トに示す如く、前記第2電極10
の表面に金属線11を電気的に接合する。
Finally, as shown in FIG.
A metal wire 11 is electrically connected to the surface of the metal wire 11 .

(ト) 発明の効果 以上説明した如く、本発明は、前記第1電極8
上に形成され前記磁気抵抗素子6上面に露出して
いる第2電極10が形成され、該第2電極10に
金属線11を接続するため、直接磁気抵抗素子6
にストレスを加えることがないため亀裂等が生じ
るおそれがない。また第2電極10は銅等の金属
で形成されているため化合物半導体と違いボンデ
イングが強固となる。そのため不良やノイズの発
生等が無くなつた。
(g) Effects of the invention As explained above, the present invention provides the first electrode 8
A second electrode 10 is formed on the magnetoresistive element 6 and is exposed on the upper surface of the magnetoresistive element 6. In order to connect the metal wire 11 to the second electrode 10, the metal wire 11 is directly connected to the magnetoresistive element 6.
Since no stress is applied to the material, there is no risk of cracks occurring. Further, since the second electrode 10 is made of a metal such as copper, bonding is strong unlike a compound semiconductor. As a result, defects and noise generation are eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は、本発明の磁気抵抗素子を用
いた磁気抵抗装置の要部拡大断面図、第3図イ乃
至第3図トは、本発明の磁気抵抗装置の製造方法
の一例を示す工程図、第4図、第5図は、従来の
磁気抵抗素子を用いた磁気抵抗装置の要部拡大断
面図である。 主な図番の説明 1は磁気検出器、2はセンサ
ユニツト、3はマウント基板、4は永久磁石、5
は磁性体基板、6は磁気抵抗素子、7は樹脂、8
は第1電極、9はラスタ、10は第2電極、11
は金属線、12は穴、13は底板、14はプリン
ト配線、15は保護板である。
1 and 2 are enlarged sectional views of main parts of a magnetoresistive device using the magnetoresistive element of the present invention, and FIGS. 3A to 3G are an example of a method for manufacturing the magnetoresistive device of the present invention 4 and 5 are enlarged sectional views of main parts of a magnetoresistive device using a conventional magnetoresistive element. Explanation of main drawing numbers 1 is the magnetic detector, 2 is the sensor unit, 3 is the mount board, 4 is the permanent magnet, 5
is a magnetic substrate, 6 is a magnetoresistive element, 7 is a resin, 8
is the first electrode, 9 is the raster, 10 is the second electrode, 11
12 is a metal wire, 12 is a hole, 13 is a bottom plate, 14 is a printed wiring, and 15 is a protection plate.

Claims (1)

【特許請求の範囲】 1 基板に嵌合された磁性体基板上に、この基板
の上面よりも高く成るように接着されたウエハか
ら加工した磁気抵抗素子と、 この磁気抵抗素子の周囲に対応する前記基板に
設けられた基板電極と、 前記磁気抵抗素子領域上でこの磁気抵抗素子と
電気的に接続された素子電極と、 前記基板電極と前記素子電極の間を電気的に接
続した金属細線とを少なくとも有する磁気抵抗装
置に於て、 前記素子電極の下層には、前記磁気抵抗素子裏
面まで電極が設けられていることを特徴とした磁
気抵抗装置。
[Scope of Claims] 1. A magnetoresistive element fabricated from a wafer that is bonded onto a magnetic substrate fitted to a substrate so as to be higher than the upper surface of this substrate, and a magnetic resistance element that corresponds to the periphery of this magnetic resistance element. a substrate electrode provided on the substrate; an element electrode electrically connected to the magnetoresistive element on the magnetoresistive element region; and a thin metal wire electrically connected between the substrate electrode and the element electrode. A magnetoresistive device having at least the following: An electrode is provided below the element electrode up to the back surface of the magnetoresistive element.
JP60160728A 1985-07-19 1985-07-19 Compound semiconductor device Granted JPS6221235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60160728A JPS6221235A (en) 1985-07-19 1985-07-19 Compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60160728A JPS6221235A (en) 1985-07-19 1985-07-19 Compound semiconductor device

Publications (2)

Publication Number Publication Date
JPS6221235A JPS6221235A (en) 1987-01-29
JPH0471353B2 true JPH0471353B2 (en) 1992-11-13

Family

ID=15721176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60160728A Granted JPS6221235A (en) 1985-07-19 1985-07-19 Compound semiconductor device

Country Status (1)

Country Link
JP (1) JPS6221235A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4960485A (en) * 1972-10-12 1974-06-12

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4960485A (en) * 1972-10-12 1974-06-12

Also Published As

Publication number Publication date
JPS6221235A (en) 1987-01-29

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