JPH0467346U - - Google Patents
Info
- Publication number
- JPH0467346U JPH0467346U JP11099390U JP11099390U JPH0467346U JP H0467346 U JPH0467346 U JP H0467346U JP 11099390 U JP11099390 U JP 11099390U JP 11099390 U JP11099390 U JP 11099390U JP H0467346 U JPH0467346 U JP H0467346U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- integrated circuit
- semiconductor integrated
- resin
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11099390U JPH0467346U (US06174465-20010116-C00003.png) | 1990-10-23 | 1990-10-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11099390U JPH0467346U (US06174465-20010116-C00003.png) | 1990-10-23 | 1990-10-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0467346U true JPH0467346U (US06174465-20010116-C00003.png) | 1992-06-15 |
Family
ID=31858404
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11099390U Pending JPH0467346U (US06174465-20010116-C00003.png) | 1990-10-23 | 1990-10-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0467346U (US06174465-20010116-C00003.png) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012004179A (ja) * | 2010-06-14 | 2012-01-05 | Mitsubishi Electric Corp | 半導体装置、半導体装置の実装方法、および実装用治具 |
-
1990
- 1990-10-23 JP JP11099390U patent/JPH0467346U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012004179A (ja) * | 2010-06-14 | 2012-01-05 | Mitsubishi Electric Corp | 半導体装置、半導体装置の実装方法、および実装用治具 |
