JPH0466130B2 - - Google Patents

Info

Publication number
JPH0466130B2
JPH0466130B2 JP24212583A JP24212583A JPH0466130B2 JP H0466130 B2 JPH0466130 B2 JP H0466130B2 JP 24212583 A JP24212583 A JP 24212583A JP 24212583 A JP24212583 A JP 24212583A JP H0466130 B2 JPH0466130 B2 JP H0466130B2
Authority
JP
Japan
Prior art keywords
inductance
circuit
josephson
delay circuit
long line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP24212583A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60134626A (ja
Inventor
Yasuo Tazo
Katsuhiko Aoki
Haruo Yoshikyo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP24212583A priority Critical patent/JPS60134626A/ja
Publication of JPS60134626A publication Critical patent/JPS60134626A/ja
Publication of JPH0466130B2 publication Critical patent/JPH0466130B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • H03K19/1952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with electro-magnetic coupling of the control current

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP24212583A 1983-12-23 1983-12-23 ジョセフソンレシ−バ回路 Granted JPS60134626A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24212583A JPS60134626A (ja) 1983-12-23 1983-12-23 ジョセフソンレシ−バ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24212583A JPS60134626A (ja) 1983-12-23 1983-12-23 ジョセフソンレシ−バ回路

Publications (2)

Publication Number Publication Date
JPS60134626A JPS60134626A (ja) 1985-07-17
JPH0466130B2 true JPH0466130B2 (cg-RX-API-DMAC10.html) 1992-10-22

Family

ID=17084668

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24212583A Granted JPS60134626A (ja) 1983-12-23 1983-12-23 ジョセフソンレシ−バ回路

Country Status (1)

Country Link
JP (1) JPS60134626A (cg-RX-API-DMAC10.html)

Also Published As

Publication number Publication date
JPS60134626A (ja) 1985-07-17

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term