JPH0465709A - Coordinate reader - Google Patents

Abstract

PURPOSE:To improve the resolution of phases by providing the coordinate reader with a data conversion part for outputting two phase binarizing signals obtained by multiplying two phase sinusoidal signal periods by N while holding their phase difference based upon phase angle information. CONSTITUTION:Two phase sinusoidal signals 1a, 1b consisting of (a) and (b) phases are outputted from an incremental encoder 1. The data conversion part 3 for outputting two phase binarizing signals 6a, 6b obtained by multiplying two phase sinusoidal signal periods by ten while holding their phase difference based upon phase angle information obtained from two outputs 4a, 4b outputted from respective A/D conversion parts 4A, 4B are constituted of a ten fold table ROM 5 constituting a memory part for arraying data in order to output N = 10 multiplied two-phase binarizing signals while holding their phase difference and J-K flip flops 6A, 6B. These signals 6a, 6b are inputted and counted up to/by an inserting circuit 7 to obtain 1/40 resolution of the (a) and (b) phases. Thus, the resolution can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a coordinate reading device for reading the coordinates of each point on a figure and inputting the coordinates to a computer or the like.

[Prior Art] A coordinate reading device has a horizontal cursor movably mounted on a horizontal rail fixed to the upper edge of the drawing board, and a vertical rail whose upper end is fixed to the horizontal cursor is movably mounted on the horizontal rail directly on the drawing board. This device is equipped with a reading head that specifies the coordinate position of a vertical cursor that is movable on a vertical rail, and sequentially reads the coordinates of points on a figure on the drawing board based on the amount of movement of the horizontal and vertical cursors. .

Currently, the coordinate reading mechanism of coordinate reading devices (digitizers) with a resolution of about 0.1-1 uses a steel or film scale, and has a reading structure that sandwiches the scale. Under the slab F'ly, the two-phase signal is applied to detect the C hyperactive step, and the counter section integrates 1-1 to 41Ii. #l17 Function (resolution O, 01am or less) ζ Mouth that can be seen - tally
Compared to the case where an encoder is used, there is no need for a whip to convert linear motion into rotational motion, making it easier to reduce costs.

It is also characterized by the fact that errors associated with linear/rotational motion conversion must be avoided.

[Solution of the Invention 1) To improve the accuracy and resolution of the scale, however, in order to improve the degree and resolution, it is necessary to improve the accuracy and resolution of the direct scale. Long, high-precision, high-resolution scales are extremely difficult to produce, and the cost increases significantly. is also required.

[Means for solving the problem] In the invention, the scale and sensor system are left as they are, and the resolution is improved by processing the signal output from the seven pins. From the point of view 1. −? 9 Conventionally, the output signal from an incremental encoder in a coordinate reading device is a two-phase signal R with an iE chord σV shape and a 90° phase. , and the first f is the a phase. 1
) phase, as shown in Figure 6, the A phase, 1] phase (No. A-phase. By synthesizing the rising or falling changes of each of the b-phases and creating a count pulse ( ) (4 interpolation circuits), and counting this digitally, the a-phase, 1) 1/4 of the phase pulse resolution has already been achieved. In this case, only the portion where the a-phase and b-phase borrowings intersect the threshold value is used.

The object of the present invention is to obtain a phase a, as shown in FIG.

The b-phase signal is converted into a multi-value digital signal, and based on the phase information obtained from the digital conversion value of 52-), the a-phase, b-phase
Each and every one of them is 1. The purpose of this is to obtain a binarized 1 signal by dividing the signal frequency by 1/N (to 1B), and convert these signals to the conventional 4
With one hand in the interpolation circuit and one hand in digital counting,
The purpose is to obtain f with a resolution of 1/4φN of the a phase and l) phase.

That is, specifically, an incremental encoder section outputs two mutually chordal liquid signals having a phase difference, and a two-phase output level from the incremental encoder section is expressed as -T.
: Analog-digital (A/
D) converter and the two outputs from the A/I) converter generate a mutual sinusoidal signal +1i
11rl, while maintaining the phase difference, multiply by N to 2-phase 2-value 4
1- a memory section arranged in a data/data arrangement for outputting signals;
Based on the phase angle information obtained from the two outputs from the A/D converter of the device ζ, the two-phase sinusoidal waveform 2-phase 2 with the signal frequency multiplied by N while maintaining phase 4
It provides a data converter that outputs a digitized signal, and a seat and a handle that are characterized by being able to output a digitized signal.

The iron, a phase, and b phase signals are a=A-cos(wf,) ・ ・ (+)b=:
B-5in(ult,) ・ ・ (2)A
HA phase signal amplitude B: B phase signal (raw 1 vibration G country W; angle FEI wave number and change. Equation (1), (2) J: Sjan(tet) = sin(wft,)/cos( v
No. t)=A/B ・1)/a, Therefore, the phase angle θ is f3=w-↑= tan-' (8/B-b/a)
-(3), and if A=B, θ=t, an-'(b/a) -.(4).

1.? Once upon a time, the wave of a4Lb phase IMM! [From this, by deleting the arctangent by 1v, it becomes possible to find the current (υ phase angle θ)7 By the way, this θ changes to 0 every time the scale progresses by 1 pitch.
-・2・π, and when the a-phase horizontal axis and b IK4 vertical axis are taken, the a-phase and b-phase are out of phase by 90″, so the locus P draws a circle as shown in FIG.

Considering using the 81st set of a-b planes, the conventional 2W signal has the following characteristics for the region of phase angle θ: Phase angle A-phase binarization B-phase binarization (1 )0≦θkuπ/2 l 1(2)
π12≦θ〈π φ 1(3) π
≦θ〈3/2・π φ φ(4) 3/2・
π≦θ〈2・π l “φ” as in φ, ′
It can be thought of as having allocated "l".

Now, for the binary evolution of the A phase, divide the a-b plane into radial 2·N regions, and calculate the proportions of "φ" and 'l" in each gI region as shown in Figure 10. Then, as the point P moves on the circle, the corresponding value repeats "φ", "1", etc. When P goes around once, the a-phase 2111 signal is "1" N times.
Since φ'' and '1'' are taken, the conventional binary signal is multiplied by N.

Similarly, the b-phase binarization is divided into 2·N regions, but as shown in FIG. 11, the a-phase divided region and π/2
- By shifting the N phase, it is possible to create a phase difference of λ''/4 with respect to λ'', as shown in FIG.

By counting the N-multiplied binary signal obtained in this way through a conventional 4-interpolation circuit, the final result is π/4
・H resolution can be achieved.

[Example] Using a ROM table for 211 value conversion, multiplication number N = 1
An example in which it is set to 0 will be described below using FIG.

Phase a, b output from incremental encoder l
The two mutual sinusoidal signals 1a, lb of phase are 2A, respectively.
2B amplifier AMP, each amplitude is equal, and the center voltage of the amplitude is A/D converter 4A,
It is adjusted to match the midpoint voltage of the reference voltage applied to 4B.

The outputs 2 a T 2 b of the amplifiers 2A and 2B are 6 bits each with a conversion speed of 20M5ps of the multiplier circuit section 3) D
/A converters 4A and 4B are connected to analog input terminals.

In order to obtain a resolution of 1/n of the scale pitch, D/A
The resolution W of the converter itself must be W=1082(n) (5) bits or more, and when n=40, the decimal value is rounded up to get W=6 bits.

Here, if the a-phase and b-phase are digitized with the same number of bits, 3 bits will be sufficient for each, but if a quantization error of ±1 bit is taken into account, at least 4 bits are required.

Also, the conversion rate R of the A/D converter is R≧2””
・yc・S/P=(6) W: Resolution of the A/D converter S: Maximum speed of the cursor P: Defined by the pitch of the scale, in the example, W=6 bits, P=0.4
+u+, S = 2000mw+/sec i
T! ! ! If R≧2. The conversion speed of the D/A:ff converters 4A and 4B and the clock frequency of the oscillator 12 are set to satisfy this requirement.

Digital 11 [(φ~3
The data converted to F') is sent to the address terminal of the 4-byte lO multiplication table ROM5 as the a-phase digital [4a is the lower (AO to A5)] and the b-phase digital [4b is the upper (A0 to A5)].
6 to A11).

The state of the table data stored in the ROM is shown in FIGS. 2 and 3.

AIC)+ap (Figure 2) and 810map (Figure 3), each with 10 "J" areas.

Ten "K" areas are arranged radially from the center address of the ROM, and according to the areas ``J'', 7K'', .
, the 211 value conversion level shown in (b) is output. Here, the area indicated by "." on the map is a dead area, which is provided to prevent the output value from becoming unstable due to slight vibrations of the encoder. Also, lO multiplication 2
In order to set the phase difference between the 11-valued outputs 6λ and 6b to be 90”, the area dividing lines in Figures 2 and 38!I are 90” centered at the center of the figure.
8 l with a phase difference of ° (π12·IO radians)
Output of O multiplication table ROM5 00, 0 + sequence Oko 02
, 03 are D/A from the clock ζ of the oscillator 12, respectively.
Converter 4A.

Flip-flops 6A and 6 are connected to J- which operates synchronously with 4B.
Connected to B.

Table 1 (a) and (1)) respectively show the output terminals 00.01. Table 2 shows the truth table of JI (flip-flop).

Table 1(a) A 1 0 m a p Table 1 (b) B 10rna p 1- is the output 6a of the flip-flops 6A and 6B.

As shown in the truth table, 6b is a 10-fold binary output with a phase difference of 90''. Comparing the output waveform 2a of the amplifier 2A observed in the embodiment with the waveform 6a of the flip-flop 6A, the fourth waveform 6a is obtained. As shown in the diagram, flip-flop 6A.

A comparison of the waveforms 6a and 6b of 6B is as shown in FIG.

After the outputs 6a and 6a are subjected to 4 interpolation (multiplying) pulse generation and direction discrimination by the 4 internal phase pulse generation/direction discrimination circuit 8 as in the conventional case, they are passed through the polarity switching circuit 9 to the U/D (up/down) counter. By counting 10ζ, it is possible to achieve a resolution of 1/71-0 of the scale pitch. In IfV1, lO multiplication table RO
M5 is addressed by the two outputs from the A/D converter, and the two mutual sinusoidal signals are arranged in a data array to output an N-multiplied two-phase binary signal while maintaining the phase difference. (C) The 10 multiplication table ROM 5 and the J-K flip-flop 6 constitute an A/D
Based on the phase angle information obtained from the two outputs from the converter, the two mutual sinusoidal signal periods are changed while maintaining the phase difference,
This constitutes a data conversion section that outputs a two-phase binary signal multiplied by N.

[Effects] As described above, the IM reader ζ according to the present invention includes an incremental encoder section that outputs two mutually sinusoidal signals having a phase difference, and a two-phase output level digital signal from the incremental encoder section. an analog-to-digital (A/D) converter for converting into a value;
Addressed by two outputs from the D converter, the two mutually sinusoidal signal periods are multiplied by N (
) and a memory section in which data is arranged to output a two-phase binary signal. From the value, the signal period of each phase a and b is 1/N (N1
Based on the two sets of phase angle signal outputs from the A/D converter in the device, the two mutual sinusoidal signal periods can be converted into N With a configuration equipped with a data converter that outputs a multiplied two-phase 2!11 signal, these N-multiplied signals are manually input to the conventional 4-interpolation@path and counted digitally.
It is possible to obtain a resolution of 1/4 N for the a-phase and b-phase, and currently we use a steel or film scale for the coordinate reading mechanism of a digitizer with a resolution of about 0.1-1, and the scale and sensor system remain the same. While it is possible to improve the resolution by processing the signal output from the sensor, compared to the rotary encoder used in high resolution m < resolution #: 0.01 m steel or less). There is no need for a mechanism to convert linear motion to rotational motion, and
Directly trying to improve the accuracy and resolution of the scale would be difficult to produce, resulting in a significant increase in cost;
A high-resolution scale requires careful consideration of its material, etc., but it has the effect of significantly reducing costs, and it also has the effect of avoiding errors associated with conversion between linear and co-rotating motion. be.

Further, according to the present invention, when a memory or other programmable device is used in a circuit that converts phase angle information into an N-multiplied binary signal, the data table can be changed only by software, and as long as accuracy allows. So, it has the effect of being able to set any resolution.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the device of the present invention, FIGS. 2 and 3 are explanatory diagrams showing table data stored in the IO multiplication table ROM in the circuit, and FIG. An explanatory diagram showing the output waveforms of the flip-flop 6a for the amplifiers 2a and J-, respectively, and FIG. 5 is for J-K.
FIG. 6 is an explanatory diagram showing the output waveforms of the flip-flops 6a and 6b, respectively. FIG. 6 is an explanatory diagram showing count pulses in a conventional four-internal phase circuit. FIG. 7 is an explanatory diagram showing count pulses in the circuit of the present invention. I is a phase of a sine wave from the incremental encoder with 901 different phases;
An explanatory diagram showing how the locus P of the b-phase two-phase output signal changes from 0 to 2·π every time the scale advances by one pitch, as the a-phase horizontal axis and the b-phase vertical axis, FIG. 9(a), b) is an explanatory diagram showing a state in which a conventional binarized signal is binarized for a region of phase angle θ.
Divide the plane b into 2·N radial regions, and each region has a ratio of "φ", l, and as the point P moves around the circle, the corresponding values become "φ"Ml", ・11, which is an explanatory diagram showing a state in which .
FIG. 7 is an explanatory diagram showing a state in which a phase difference of λ'74 is created with respect to the wavelength λ2, as shown in FIG. 7, by shifting the phase by /2·N. ! ...Incremental encoders 2A, 2B...Warning amplifier 3...Multiplier circuit section 4A, 4B-φ・A/D converter 5...10 multiplication table ROM 6A, 6B...Flip-flop 7 in J-・ 8 ・ ◆ 9 ・ ・ 10 ・ 1 l ・ l 2 ・ ・Counter times wIM ・4 interpolation pulse generation direction discrimination circuit ・polarity switching circuit ・up/down counter circuit ・zero detection circuit ・oscillator patent application People Asahi Seimitsu Co., Ltd. Azudai? Figure Figure Figure Figure Color> F Nogorus Figure Figure Figure (H) (Sh) Figure Entry - Person/N Figure

Claims (2)

[Claims] (1) An incremental encoder unit that outputs two-phase sinusoidal signals having a phase difference, and an analog-digital (analog-digital) unit that converts the two-phase output levels from the incremental encoder unit into digital values.
A/D) converter, and the two-phase sinusoidal signal period is addressed by two sets of outputs from the A/D converter, while maintaining the phase difference.
A coordinate reading device comprising: a memory section in which data is arranged to output a multiplied two-phase binary signal; (2) An incremental encoder section that outputs a two-phase sinusoidal signal having a phase difference, and an analog-digital (
A/D) converter, and based on two sets of phase angle information output from the A/D converter,
A coordinate reading device comprising: a data converter that outputs a two-phase binary signal obtained by multiplying the two-phase sinusoidal signal period by N while maintaining a phase difference.