JPH0464831U - - Google Patents
Info
- Publication number
- JPH0464831U JPH0464831U JP10635490U JP10635490U JPH0464831U JP H0464831 U JPH0464831 U JP H0464831U JP 10635490 U JP10635490 U JP 10635490U JP 10635490 U JP10635490 U JP 10635490U JP H0464831 U JPH0464831 U JP H0464831U
- Authority
- JP
- Japan
- Prior art keywords
- inductance
- interstage
- double
- primary side
- secondary side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 8
- 238000013016 damping Methods 0.000 description 3
- 230000001939 inductive effect Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
第１図は本考案の一実施例であるチユーナ回路
の回路図、第２図は従来のチユーナ回路の回路図
、第３図ａは誘導結合による複同調回路の等価回
路図、同図ｂは段間複同調回路の等価回路図、第
４図は共に並列共振回路の回路図であり、同図ａ
はコイルに並列にダンピング抵抗を接続した場合
の回路図、同図ｂはコイルに直列にダンピング抵
抗を接続した場合の回路図、第５図はローバンド
選択時の周波数に対するイメージ周波数による妨
害を示したグラフである。
Ｑ１……高周波増幅用デユアルゲートＮ−ＭＯ
Ｓ ＦＥＴ、ＭＩＸ……ミキシング端子、ＢＬ…
…ローバンド選択端子、ＢＨ……ハイバンド選択
端子、ＶＴ……チユーニング電圧端子、Ｒ１……
ソースバイアス抵抗、Ｒ７……ダンピング抵抗、
Ｃ２，Ｃ３……一次側／二次側同調コンデンサ、
Ｌ１，Ｌ２……一次側／二次側ハイバンド同調用
コイル、Ｌ３，Ｌ４……一次側／二次側ローバン
ド同調用コイル、Ｌ５……ローバンド結合コイル
、Ｄ１，Ｄ２……一次側／二次側バラクタダイオ
ード、Ｄ３，Ｄ４……一次側／二次側スイツチン
グダイオード。
Fig. 1 is a circuit diagram of a tuner circuit that is an embodiment of the present invention, Fig. 2 is a circuit diagram of a conventional tuner circuit, Fig. 3a is an equivalent circuit diagram of a double-tuned circuit using inductive coupling, and Fig. 3b is an equivalent circuit diagram of a double-tuned circuit using inductive coupling. The equivalent circuit diagram of the interstage double-tuned circuit and Figure 4 are both circuit diagrams of the parallel resonant circuit.
is a circuit diagram when a damping resistor is connected in parallel to the coil, Figure b is a circuit diagram when a damping resistor is connected in series to the coil, and Figure 5 shows interference due to image frequency with respect to frequency when low band is selected. It is a graph. Q1...Dual gate N-MO for high frequency amplification
S FET, MIX...Mixing terminal, BL...
...Low band selection terminal, BH...High band selection terminal, VT...Tuning voltage terminal, R1...
Source bias resistance, R7...damping resistance,
C2, C3...Primary side/secondary side tuning capacitor,
L1, L2...Primary side/secondary side high band tuning coil, L3, L4...Primary side/secondary side low band tuning coil, L5...Low band coupling coil, D1, D2...Primary side/secondary side Side varactor diodes, D3, D4...Primary side/secondary side switching diodes.
Claims (1)
変容量並びに相互に切換可能なハイバンド同調用
インダクタンス及びローバンド同調用インダクタ
ンスと、一次側と二次側を結合する結合インダク
タンスとを備えた段間複同調回路において、結合
インダクタンスに直列に抵抗を接続したことを特
徴とする段間複同調回路。 An interstage interstage provided with a tuning variable capacitor provided on the primary side and the secondary side, a mutually switchable high band tuning inductance and a low band tuning inductance, and a coupling inductance that couples the primary side and the secondary side. An interstage double-tuned circuit characterized in that a resistor is connected in series to a coupled inductance in the double-tuned circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10635490U JPH0464831U (en) | 1990-10-09 | 1990-10-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10635490U JPH0464831U (en) | 1990-10-09 | 1990-10-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0464831U true JPH0464831U (en) | 1992-06-04 |
Family
ID=31852416
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10635490U Pending JPH0464831U (en) | 1990-10-09 | 1990-10-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0464831U (en) |
-
1990
- 1990-10-09 JP JP10635490U patent/JPH0464831U/ja active Pending
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