JPH0463037A - Transmission circuit - Google Patents

Abstract

PURPOSE:To easily miniaturize communication equipment of ISDN system by transmitting an AMI code safe and with small amount of jitter component to the transmission line of the full duplex four wire line of ISDN system by using a CMOS circuit network easy to make into integration on an LSI. CONSTITUTION:When a binary value 0 is sent out, a change-over switch 5 is connected to a reference voltage 1, and a change-over switch 6 to a source voltage. A constant current source 100 supplies a constant current to the input terminal 15 of a pulse transformer 17, and a constant current source 101 is cut off. When a change-over switch 7 is connected to a reference voltage source 21, a constant voltage source 102 generates a constant voltage Va at the input terminal 15. Similarly, when a change-over switch 8 is connected to a reference voltage source 20, a constant voltage source 103 generates a voltage Vb less than the voltage Va at the input terminal 16 of the pulse transformer 17. When integration on the LSI is performed, the parameters of circuit elements can be almost conformed to each other, therefore, dispersion in the pulse waveforms of positive polarity and negative polarity can be minimized.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an AMI code transmission circuit for an ISDN system S-bus interface circuit. J
? 2-B-I, No, 10 pp, 838-847
This is an ISDN type AMI code transmission circuit disclosed on page 843 of the literature [lco] (October 1989). 31～
32 is an input terminal, 33.34 is a p-n p transistor, 35.36 is an npn transistor, 37 to 42 are resistive elements, and 45 is a pulse transformer for output. 43.44
is a capacitor.Next, we will explain the operation of this transmitting circuit.One terminal 46 on the input side of the pulse transformer 45 is always connected to a resistor 37.3.
Even if the voltage is fixed at half the power supply voltage by 8 and capacitors 43 and 44, here input terminal 31 is connected to HighL3.
If there is a high digital input on 2, then 4;Lpn
p) Constant current circuit consisting of transistors 33, 34 and resistor 39 is off L, npn transistor 35, 36 and resistor 40
The constant current circuit is turned on, and the current determined by the constant current circuit flows from terminal 46 to terminal 47 into the constant current circuit, and a pressure pulse of 111 is generated at the output of pulse transformer 45. If you want to send out reversed pulses, add a Low input to input terminal 32 and a Low input to 31 (Hight5 to one terminal 31, Low input to terminal 32).
When there is an input of w, both of the above two constant current circuits are cut off, so the output is in a high impedance state a.Problem to be Solved by the InventionRegarding the electrical characteristics of the ISDN S-bus interface 4; It is stipulated in Recommendation 1.430 of the LCCITT, and the transmission circuit must satisfy extremely strict conditions regarding maximum line voltage, induced voltage (crosstalk), supply voltage tolerance, etc.

According to the above-mentioned document [1], as a circuit system to satisfy the regulation, a voltage is generated on the input side of the pulse transformer using a constant voltage drive circuit, and a current exceeding the allowable range attempts to flow through the pulse transformer. It is said that the method of limiting the current by providing a current limiting circuit is advantageous in that it can reduce the circuit size and the power consumed by the circuit, and if you just want to realize that circuit method, the method described above will not work. However, if this circuit is used as an LSI, the characteristics of the constant current circuit made of PNP transistors and the constant current circuit made of NPN transistors must be made to match, since the circuit is not symmetrical. It is difficult to send out a stable binary value "0"< LXo The characteristics of the output pulse transformer itself are defined by the characteristics of the transmitting circuit.There is no degree of freedom regarding the characteristics of the output pulse transformer.
Furthermore, even though the voltage generated on the primary side of the pulse transformer is limited to less than one-half of the power supply voltage, it must be integrated using a bipolar process.
If an attempt is made to create an LSI having upper layer functions of ISDN and simultaneously construct these transmitter circuits on the LSI, there are problems such as the inability to sufficiently increase the degree of integration of the logic circuit portion.

The present invention ζ was made in view of the above-mentioned problems, and provides an IS system that allows the parameters of the pulse transformer to be freely selected and that can be simultaneously integrated on an LSI having upper layer functions of ISDN.
The purpose of this invention is to provide a DN system AMI code transmission circuit.

Means for Solving the Problems The AMI code transmitting circuit of the present invention includes a first constant current source and a first constant voltage source connected to a first terminal of the input side terminal of the output pulse transformer, and A second constant current source and a second constant voltage source are connected to the second terminal.
When sending a binary value "0", the first constant voltage source generates a voltage higher than the second constant voltage source, and at the same time the second constant current source is cut off; When generating a voltage higher than the first voltage source and simultaneously cutting off the first constant current source and sending the binary value "l", the first constant current source and the second constant current source The present invention is characterized in that the first voltage source and the second voltage source are shut off.The present invention has the above-described configuration and uses the CMO3 circuit technology to perform the function of the upper layer of the ISDN system. It can be easily integrated on the same crystal substrate as a logic circuit, and it becomes easy to miniaturize the ISDN communication device. Furthermore, since the circuit configuration is completely symmetrical, it is possible to send out a highly accurate binary value "0" signal pulse. Furthermore, since the current flowing through the output pulse transformer and the voltage applied to the output pulse transformer can be controlled, the electrical parameters of the output pulse transformer can be selected with some degree of freedom, increasing the versatility of the circuit.

Embodiment (Example 1) FIG. 1 is a circuit diagram showing an AMI code transmitting circuit according to a first embodiment of the present invention.a In FIG. 1, 1.2 are reference voltage 1 and reference voltage 2, respectively. .

Although the reference voltage 1 is connected to one end of the input terminal of the changeover switch 5 and the reference voltage 2 is connected to one end of the input terminal of the changeover switch 6, the other input terminals of the changeover switch 5 and the changeover switch 6 are both connected to the power supply voltage. Also, the outputs of changeover switch 5 and changeover switch 6 are each pM
OS transistor 3 and pMO8) are connected to the gate terminal of transistor 4 & pMO8) transistor 3 and pMO
The drain terminal of the S transistor 4 is connected to the input terminals 15 and 16 of the output pulse transformer 17, respectively. Furthermore, even if the positive input terminal of the differential amplifier 9 and the drain terminal of the transistor 11 are connected to the positive input terminal of the differential amplifier 10 and the drain terminal of the transistor 12, the input terminal 16 is connected to the positive input terminal of the differential amplifier 10 and the drain terminal of the transistor 12. A changeover switch 7 is connected to the input terminal, and the constant voltage source 19 and the constant voltage source 21 become reference voltages for the differential amplifier 9 via the changeover switch 7 of the differential amplifier. Similarly, the changeover switch 8 is connected to the negative input terminal of the differential amplifier 10, and the constant voltage source 20 and the constant voltage source 22 are set to the reference voltage of the differential amplifier 10 via the changeover switch 8.The above configuration provides a constant voltage. The switch 13 and the switch 14 are connected between the gate and source terminals of the transistor 11 (nMO3) and between the gate and source terminals of the transistor 12 (nMO8), respectively. Although the resistive load 18 is connected between the output terminals of the pulse transformer 17, the operation of the AMI code transmitter of the present invention will be explained next.
”, connect the selector switch 5 to the reference voltage l and connect the selector switch 6 to the power supply voltage. Then, the pMO3 transistor 3 is in the off state pMO3
The h transistor 4 is turned off. Therefore, constant current source 1
00 supplies a constant current to the input terminal 15 of the pulse transformer 17, and the constant current source 101 is in a cut-off state. Simultaneously with the above operation, the 4Q changeover switch 7 is connected to the reference voltage source 21 (the voltage of the reference voltage source 21 is set to va). ), the negative feedback loop consisting of the differential amplifier 9 and nMO8) transistor 11 connects the voltage at the input terminal 15 of the pulse transformer 17 and V
・Work to match. Therefore, the constant voltage source 102 generates a constant voltage V at the input terminal 15. Similarly, when the changeover switch 8 is connected to the reference voltage source 20 (assuming the voltage of the reference voltage source 20 as Vb<Ve), the constant voltage source 103 A voltage Vb lower than Ve is applied to the input terminal 16 of the pulse transformer 17.
to occur. Therefore, a voltage of V − − V b is generated between the input terminals 15 and 16 of the pulse transformer 17, L
In the AMI code, it is necessary to switch the polarity of the pulse each time when transmitting the binary value "0". When switching the polarity of the pulse in the circuit described above, connect the changeover switch 5 to the power supply voltage and make the switch. The switch 6 is connected to the reference voltage 2, and the changeover switch 7 and the changeover switch 8 are changed over to connect the reference voltage source 19 (the voltage of the reference voltage source 19 is Vb) and the reference voltage source 22 (the voltage of the reference voltage source 22 is V), respectively. If the voltage of constant voltage source 102 is set to Vb and the voltage of constant voltage source 103 is set to V, then
Similarly to the above operation, voltages Vb and V are generated at the input terminals 15 and 16 of the pulse transformer 17, respectively, and pulses of opposite polarity are sent out. At this time, since the above-mentioned circuit is a completely symmetrical circuit, when it is integrated on an LSI, the parameters of the circuit elements can be almost matched, so that variations in the pulse waveforms of forward polarity and reverse polarity can be minimized. When sending out the binary value "0", constant current source 100
．． 101 may be operated together, and the switches 7.8 inside the constant voltage sources 102 and 103 may be switched.If the method of alternately shutting off the constant current sources 10.0.101 is used, the power consumption will be reduced. In order to continuously transmit the binary value ``0'''', it is necessary to instantaneously reverse the polarity of the voltage applied to both ends of the pulse transformer. However, in general, when the direction of current flowing through an element having an inductance component such as a pulse transformer is reversed, a step function current flows into the element as shown in Figure 4(a).Step function Since this current contains high frequency components, a high voltage is generated across the element due to the inductance component of the element (see Figure 4 (b)).If an excessive voltage is generated across the pulse transformer, it is natural that the ISDN In the circuit of the present invention, the pulse transformer 17
A constant voltage source 102 and a constant voltage source 103 are provided at input terminals 15 and 16, respectively. Constant voltage source 102 and constant voltage source 1
If the AC impedance of 03 is made sufficiently low, as shown in FIG. Only the components flow into the pulse transformer. Similarly, when the constant current source 101 is switched, a step function current flows through the constant voltage source 103. In the circuit of the present invention, a current with a high frequency component flows into the pulse transformer 17, so that no excessive voltage is generated between the input terminals 15 and 16. Therefore, always stable binary value "0" pulses can be continuously sent out.

Next, when sending out the binary value 11111, connect the changeover switches 5 and 6 to the power supply voltage. Constant current source 100
The constant current source 101 is cut off, and the voltages generated by the constant voltage sources 102 and 103 are made to have the same potential. For example, the constant voltage source 102 is switched to the reference voltage source 19, and the constant voltage source 103 is switched to the reference voltage source 20. Then, the voltage applied between input terminals 15 and 16 of the pulse transformer becomes O.
Therefore, when the switching element 13 and the switching element 14 are made conductive, the nMO5 transistor 11 and the nMO5 transistor 11 and n
The MO8'p transistor 12 is in a cut-off state and its output is in a high impedance state. Therefore, the binary value "BI'" can be transmitted.Furthermore, if all the power supplies related to the transmitting circuit are turned off in this state, the power consumption can be reduced to 0 while the binary value 11111 is being transmitted. When transmitting an AMI code, the expected resistance load on the output side of the output pulse transformer 17 is usually 50
When signals are sent from multiple transmitting circuits on a transmission line, the force fork is 5.6Ω to 4Ω as a resistive load.
It is necessary to assume a load up to 00Ω. In the above transmission circuit (above), even if the resistance value fluctuates, the differential amplifier at both ends of the pulse transformer compares the input terminal voltage of the pulse transformer with the reference voltage, and outputs nMO3 so that the voltages match.
Since the current flowing through the transistor is controlled, the output voltage can be kept constant within a certain resistance load range, that is, the output impedance can be lowered. In addition, when the value of the resistive load is too small and excessive current attempts to flow through the pulse transformer, the J&pMOS transistor works as a constant current source, so current exceeding a certain value will not flow through the pulse transformer, and the output pulse voltage The amplitude of CCITT Recommendation 1.
The amplitude can be suppressed within the amplitude value determined in step 430.

Figures 6(a) and (b) show a resistive load of 5.6Ω, respectively.
The results of a computer analysis of the circuit configuration of the present invention with a resistance load of 50Ω and a resistance load of 400Ω are shown. The circuit configuration of the present invention is CCI'r
It can be seen that it is possible to output a waveform that satisfies the pulse mask defined in Recommendations ① and 4a.

Even if the winding ratio of the pulse transformer changes, the voltage amplitude of the output pulse can be easily adjusted by simply changing the reference voltage setting without changing the parameters of other circuit elements.

(Embodiment 2) FIG. 2 is a circuit diagram showing an AMI code transmission circuit according to a second embodiment of the present invention. FIG. 2 shows the circuits indicated by changeover switch 7 and constant voltage sources 19 and 21 in FIG. It is replaced with voltage sources 23 and 24 that can be controlled. Here, differentiating circuits are used as the control voltage sources 23 and 24.

When transmitting the binary value "0" of the AMI code, the time constant of the rise of the waveform is determined by the inductance of the pulse transformer and the output impedance of the circuit. Therefore, in the first embodiment, the voltage of V- or Vb was generated in the control voltage source, but in the second embodiment, ii,
V, is △v-e-τ1+V1, Vb is Vb-△V-e-
Replace with r' (choose appropriate values for ΔV and τ). Then, the time constant of the rise of the waveform can be reduced,
It is possible to reduce the jitter that occurs when receiving a waveform in the receiving circuit. Fig. 7 shows the results of actual computer analysis of the second embodiment and comparison with the first embodiment.

Is the present invention more effective than the effects of the invention? Using a CMO8 circuit network that is easy to integrate on one LSI, stable AMI codes with low jitter components can be transmitted to an ISDN full-duplex 4-line transmission line, and the parameters of the output pulse transformer used can be set to a certain degree. This has the effect that it can be set to

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an AMI code transmission circuit according to a first embodiment of the present invention. FIG. 2 is a circuit diagram showing an AMI code transmission circuit according to a second embodiment of the present invention. FIG. 3 is a circuit diagram showing a conventional AMI code transmission circuit.
A circuit diagram showing a code transmission circuit. FIG. 4 shows a schematic diagram of voltage changes when a step function current flows through an element having an inductance component. FIG. Fig. 6 is a diagram showing the pulse output waveform in the first embodiment of the present invention. Fig. 7 is a schematic diagram showing the pulse output waveform in the second embodiment of the present invention and the first embodiment. 1.2...Reference voltage #5-8...Changing switch, 9.10...Differential amplifier 13.14...Switching S element, 15 .16... Pulse transformer input side terminal, 17... Output pulse transformer terminal 19-22
...Reference voltage edge of differential amplifier 100, 101...
Constant current #102.103...Constant voltage wind 23,24
...Name of control voltage agent Patent attorney Shigetaka Awano and one other person

Claims (1)

[Claims] A transmission circuit for an ISDN S-bus interface circuit that transmits digital signals to one or more subscriber telephones via a full-duplex four-line transmission line, the first terminal of the input side terminal of an output pulse transformer. a first constant current source and a first constant voltage source connected to the pulse transformer, and a second constant current source and a second constant voltage source connected to the second terminal of the pulse transformer, When transmitting the lead value "0", the first constant voltage source generates a voltage higher than the second constant voltage source, and at the same time the second constant current source is cut off, and the second constant voltage source When generating a voltage higher than the first voltage source and simultaneously cutting off the first constant current source and sending a binary value "1", the first constant current source and the second constant current source A transmitting circuit characterized in that the first voltage source and the second voltage source are shut off after the first voltage source and the second voltage source are shut off.