JPH04629Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field The present invention relates to a color killer signal generating circuit used in color television receivers and the like.

(B) Prior art As a color killer signal generating circuit for a color television receiver, for example, there is a circuit described in Japanese Patent Application Laid-open No. 118489/1989, which is B-
Compare the amplitudes of the color burst period outputs of the Y demodulation circuit and the R-Y demodulation circuit (or G-Y demodulation circuit), and use the fact that the amplitude difference is different when receiving color broadcasts and when receiving monochrome broadcasts. I am trying to create a color killer signal.

According to such a conventional circuit, it is thought that noise appears approximately equally in each output of the color demodulator, so it has the advantage that malfunctions due to noise are less likely to occur. There was a risk of malfunction when the DC level fluctuated.

(c) Problems to be solved by the invention The invention is a color killer that can reliably obtain a predetermined color killer signal without malfunction even if the DC level of the output of the color demodulation circuit changes slightly due to some reason. The present invention aims to provide a signal generation circuit.

(d) Means for solving the problem The circuit of the present invention has a first circuit that compares the level of the pedestal period of the color demodulated output with a first reference level.
a comparator circuit; a second comparator circuit that compares the color burst period of the color demodulated output with a second reference level; The present invention includes a charging/discharging capacitor that is discharged during the period in which the output appears, and a third comparing circuit that generates a color killer signal by comparing the voltage of this capacitor with a constant voltage.

(E) Effect According to the above configuration, when receiving color broadcasting, charging and discharging are performed alternately during each of the predetermined output periods of the first and second comparison circuits, so the voltage of the charging/discharging capacitor is sufficiently low; Therefore, a color killer signal is not generated from the third comparator circuit, but when receiving black and white broadcasting, charging is performed only during the period of the output of the first comparator circuit, and the voltage of the capacitor increases, which causes the third comparator circuit to A color killer signal will be obtained from this.

(F) Embodiment Figure 1 shows an embodiment of the present invention, in which the output of a BY demodulation circuit (not shown) is applied to one base through the terminal T1, and the output of the BY demodulation circuit (not shown) is applied to the other base. Differential pair transistors T8 and T9 to which the first reference voltage V1 is applied and their constant current source transistor T1
0, and transistors T5 to T8 are connected to one side of the differential pair transistor T8.
A first current mirror circuit 2 consisting of 7, etc. is connected. 3 is a second transistor consisting of a differential pair of transistors T17 and T18 and a constant current source transistor T19, to which the BY demodulated output is applied to one base and a second reference voltage V2 to the other base.
This is a comparison circuit, and a second current mirror circuit 4 including transistors T14 to T16 and the like is connected to one side of the differential pair transistor T17.

Further, 5 indicates the first and second current mirror circuits 2 and 4.
This is a third current mirror circuit consisting of transistors T11 to T13 etc. provided between the third current mirror circuit 5 and the first current mirror circuit 2. discharge capacitor C
0 and its discharge resistor R0 are connected in parallel. Then, the voltage appearing at the point A is applied to the base of one transistor T3 of the differential pair through the emitter follower transistor T4 in the third comparator circuit 6, and is applied to the base of one transistor T3 of the differential pair.
A constant voltage V3 is applied to the base of 2. Note that this constant voltage V3 also applies a constant bias to the base of the emitter follower transistor T4 via the diode D1 and resistor R4.

Here, in the first comparator circuit 1, the base of the constant current source transistor T10 is compared to the BY demodulated output (FIG. 2B, when receiving color broadcasting) applied to the base of the transistor T8 The first gate pulse (c in the figure) located at the front porch portion of the horizontal pedestal period of the demodulated output is applied via the terminal T2.
Further, as shown in the figure, the above-mentioned first reference voltage V1 is set sufficiently lower than the pedestal level in consideration of fluctuations in the DC level of the demodulated output B.

On the other hand, in the second comparison circuit 3, a second gate pulse (D in FIG. 2) corresponding to the color burst period of the BY demodulation output B is applied to the base of the constant current source transistor T19 at the terminal T3. In addition, the aforementioned second reference voltage V2 is also applied to the demodulated output voltage as shown in the figure, taking into account fluctuations in the DC level due to variations in the B-Y demodulating circuit, temperature changes, etc. pedestal level and the color burst period signal level. Note that FIG. 2A shows a carrier color signal before BY demodulation, H is a horizontal synchronizing signal, and B is a color burst signal.

In the embodiment shown in FIG. 1, when receiving a color broadcast, the BY demodulation output input to the terminal T1 becomes as shown in FIG. It is designed to exhibit a constant peak value of opposite polarity to the color signal period. This is the carrier color signal (second
The burst signal B in Figure A) is made to have a constant amplitude by ACC control, and the burst signal B
-The phase is 180° from the color subcarrier for Y demodulation.
This is because they are different. Therefore, in the normal reception state of color broadcasting, the transistor T8 of the first comparison circuit 1 is turned on (saturated) during the period of the first gate pulse, and the transistor T17 of the second comparison circuit 3 is turned on (saturated) during the period of the first gate pulse. It turns on (saturated) during the gate pulse period.

When the transistor T8 of the first comparison circuit 1 is turned on, a current equal to its collector current I1 flows from the power supply (+VCC) to the charging/discharging capacitor C0 through the output side transistor T5 of the first current mirror circuit 2 (R5=R7). flows. Furthermore, when the transistor T17 of the second comparator circuit 3 is turned on, a current equal to the collector current I2 is transferred to the output side transistor T of the second current mirror circuit 4 (R12=R=14).
14, and this current, i.e. a current equal to I2, flows through the third current mirror circuit 5 (R9=R=1
1) flows from the charge/discharge capacitor C0 to the output side transistor T11. Therefore, the characteristics of each transistor are equal, and the resistors R8,
R8=R=1 regarding R15, R7, and R14
5. Assuming that R7=R14, the above-mentioned current I
1, I2 becomes I1=I2, and the capacitor C
The magnitude of the charging current and the discharging current of 0 become equal.
Therefore, the voltage at point A hardly changes, and is kept lower than the base voltage V3 of the transistor T2 of the third comparison circuit 6 by a voltage approximately equal to the rising voltage VD of the diode D1. Therefore, since the transistor T2 of the third comparison circuit 6 is on and the other transistor T3 is off, the transistor T1 is also off and the terminal T4 is at a low level, that is, no color killer signal is generated.

On the other hand, when receiving a black-and-white broadcast (E in Figure 2 shows the signal input to the BY demodulation circuit), the BY demodulated output appearing at terminal T1 is abbreviated as the pedestal of the demodulated output when receiving a color broadcast. A constant signal (FIG. 2) of the same level is obtained. Therefore, in this case, the transistor T8 of the first comparison circuit 1 is turned on as in the case of color broadcast reception, but in the second comparison circuit 3, the transistor T17 is turned off and the other transistor T18 is turned on. Therefore, charging of the charging/discharging capacitor C0 takes place in the same manner as described above, but its discharging takes place only through the resistor R0. As a result, the voltage at point A increases and the third comparison circuit 6
2 than the base voltage V3 of transistor T2 of
Since the voltage becomes higher than VD, the transistor T2 is turned off and the other transistor T3 is turned on. As a result, the transistor T1 is also turned on and the terminal T
4 is a high level, that is, a color killer signal can be obtained.

Note that when obtaining an output from the B-Y demodulation circuit with a polarity opposite to that of the above embodiment and using this output, the first
The second reference voltages V1 and V2 may be set to have a relationship opposite to that described above. Furthermore, by appropriately setting the second reference voltage V2, R-Y or G-Y
Demodulated output can also be used.

(G) Effect of the invention According to the color killer signal generation circuit of the invention,
Since the color killer signal is created by detecting the signal levels of both the pedestal period and the color burst period of the color demodulation output, the DC level of the demodulation output will fluctuate slightly due to variations in the color demodulation circuit, temperature changes, etc. It can always achieve accurate operation without malfunction.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a diagram showing signal waveforms at each part. 1...First comparison circuit, 3...Second comparison circuit, 6
...Third comparison circuit, C...charging/discharging capacitor.

Claims (1)

[Scope of utility model registration request] a first comparator circuit that provides a predetermined output when the level of the color demodulated output during the pedestal period exceeds a first reference level in a first direction; and the level of the color demodulated output during the color burst period is a second reference level. a second comparator circuit that exhibits a predetermined output when the voltage is exceeded in a direction opposite to the first direction; comprising a charging/discharging capacitor that is discharged during a period, and a third comparison circuit that compares the voltage appearing on the capacitor with a constant voltage,
A color killer signal generation circuit that uses the output of the third comparison circuit as a color killer signal.