JPH0462591A - Tube surface display system - Google Patents

Abstract

PURPOSE:To restore a character wrong display to a proper display in a short period of time even when characters are displayed in large quantities by supplying character display control data to a CRT control part newly when the character wrong display is detected. CONSTITUTION:A necessary character display control data group is sent to a CRT control part 21 and stored in a RAM 21. Consequently, output operation and check sum operation for a character video signal composed of a character readout and an RGB signal are started. When sum check data generated by an adder 40 and a latch circuit 41 is received from the RAM 21, it is compared with the total of data sent first and their match or unmatch is decided. When the match is obtained, the operation is held ready until next sum check data is received. When the unmatch is obtained, on the other hand, the character display control data group is sent again and data refreshing operation for writing to the RAM 21 is performed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to televisions, video tape recorders (VT
R) This relates to a screen display system that is installed in a computer display device or the like and executes a screen display control operation for a predetermined character.

[Summary of the Invention] The screen display system of the present invention includes a system control means and a character display control data group supplied from the system control means that is temporarily held in an internal memory, and a character display system that is read out sequentially and continuously from the internal memory. CRT control means for displaying a predetermined character image on the screen based on the unit data of the display control data group;
The RT system sub-means creates check data for a group of character display control data that is sequentially read out as unit data from the internal memory and sends it back to the system control means, and the system control means performs check data based on the returned check data. Then, it is detected whether or not the data held in the internal memory of the CRT display means has been destroyed, and when the destruction is detected, the character display control data group is again supplied to the CRT control means. .

BACKGROUND OF THE INVENTION For example, in a television receiver, it is common practice to display a character image indicating the channel, volume, operation information, etc. on the screen of the television receiver, superimposed on the video signal.

A screen display system for this purpose includes, for example, a CRT control means (character generator section) capable of outputting R, G, and B video signals for character display, and a character generator for this CRT control means. It is formed from system control means that supplies various data for the system.

An example in which such a screen display system is mounted on a television receiver will be explained with reference to FIGS. 4 and 5.

Figure 4 shows a schematic block diagram of a television receiver.
is a TV tuner, 2 is an intermediate frequency amplification section, 3 is a manual switching circuit section, T1 to T3 are external input terminals, 4 is an audio signal processing section, 5R, 5L are speakers, 6 is a video signal processing section, 7 is C
RT, 8 is a deflection circuit section.

The video signal and audio signal selected by the manual switching circuit 3 are output from the CRT 7 and the speakers 5R and 5L as video or audio. That is, a broadcast signal received by the TV tuner 1 or a signal from an external device such as a VTR, satellite broadcast tuner, laser disc, etc. connected to external input terminals T1 to T3 is selectively output.

Reference numeral 9 denotes a system control unit (CPU), which receives user operation signals manually inputted from an operation unit IO such as a panel switch or remote commander, and operates programs and controls stored in a memory (e.g. non-volatile memory) 11. supplying control signals to each circuit section via bus B based on the data;
Performs various operational controls such as tuning, input switching, volume control, and video signal effects.

In addition to the above-mentioned circuit sections, the C, RT control section (character generator) 12 and software means for displaying characters on the CPU 9 are added, so that characters, symbols, etc. can be displayed superimposed on images. It is possible to perform surface display.

The CRT control section 12 is configured as shown in FIG. 5, for example.

20 is an interface unit for the CPU 9, and when displaying on the screen, the display position (vertical line position and horizontal dot position on the rask), content specification of the display character, color and size of the N character, etc. are input from the CPLI 9. , various character display control data Dt are input.

21 is a data RAM, and the contents of display characters and display position data are stored in a write control signal W and an address signal Ad manually inputted via the address multiplexer 22.
is written into the data RAM 21 based on the . Additional controls such as color and size are displayed in screen display control register 2.
3, and predetermined processing is performed on the character output signal.

24 is a vertical synchronization circuit, 25 is a horizontal synchronization circuit, 26 is an oscillation circuit, 27 is a vertical position counter, and 28 is a horizontal position counter. The oscillation circuit 26 is triggered by the horizontal synchronization signal supplied from the horizontal synchronization circuit 25, and starts clock oscillation at a frequency n times that of the horizontal synchronization signal. and,
The output clock signal is synchronized with the system clock by, for example, a PLL circuit outside the CRT control section 12, and is supplied to the horizontal position counter 28 as a dot clock.

The horizontal position counter 28 is reset by the horizontal synchronization signal, counts the dot clock, and grasps the position (dot) on the horizontal line of the video signal on which the character is superimposed. Further, the vertical position counter 27 is reset by the vertical synchronizing signal and counts the horizontal synchronizing signal to grasp the vertical position (line).

The character display control data stored in the data RAM 21 is data held sequentially based on the dot position and line position information of the video signal supplied via the address multiplexer 22, that is, the data for each line position of the character to be displayed. Read out the dot position information sequentially,
The line display controller 1 is supplied to the roll register 29, and the shape data of the character to be displayed is read out from the character generator ROM 31 in line position units obtained by the vertical position counter 27 via the address multiplexer 30. The read character data is supplied to the output circuit 33 via the shift register 32, and the R,
It is output as G and B signals.

The output R, G, and B signals are mixed with TV broadcast video and the like in the video signal processing section 6 by the switching operation of a high-speed switch circuit, and characters such as a channel display are displayed on the CRT 7.

For example, in the case of a television device or the like that is equipped with the CRT control section 12 and a screen display system using the CPU 9, the CPU is periodically
From 9 onwards, a refresh operation for reloading character display data to the data RAM 21 is performed. This may occur due to some reason such as discharge or noise inside the receiver.
Even if the character display control data held in 21 changes to another data value and an incorrect character is displayed due to data destruction, the data is refreshed at regular intervals so that it can be quickly resolved. This is so that the correct display can be restored.

[Problems to be Solved by the Invention] However, when displaying a large number of characters, the amount of character display control data to be supplied from the CPU 9 to the data RAM 21 becomes enormous, and the refresh interval also becomes long.

For example, when the amount of character display control data required to display one character is 1 byte, and when 20 lines of 24 characters are displayed on the screen, the amount of data that should be supplied from the CPU 9 to the data RAM 21 is 480 bytes. becomes. Further, data transmission must be performed only within the vertical retrace period so that the data transmission due to the refresh operation does not adversely affect the image. Therefore, only about 8 bytes can be transmitted in one field cycle, and it takes about 60 fields (≠1 second) to refresh all display control data.

Naturally, refresh operations cannot be performed at shorter intervals, so data changes in the data RAM 21 (
If the wrong character is displayed on the screen, the wrong character will continue to be displayed for about 1 second in the worst case, and on average it will take 0.5 seconds to restore the proper display. It will take a while.

In other words, in conventional screen display systems, even though refresh operations are performed continuously at predetermined intervals, when an incorrect display occurs, it takes time to recover, and the viewer may not notice the incorrect display. The problem was that it often happened.

[Means for Solving the Problems 1] In view of the above problems, the present invention provides a screen display system that can restore proper display in a shorter time when a character is displayed incorrectly.

That is, in a screen display system using a system control means and a CRT control means, the CRT control means creates check data for a group of character display control data that is sequentially read out as unit data from an internal memory (data RAM) and transmits the check data to the system control means. At the same time, the system control means detects whether or not there is a change in the data held in the internal memory based on the check data, and once a data change is detected, the system control means again sends the character display control data group to the CRT control means. It is configured so that it is supplied and stored in the internal memory.

[Function] As described above, in the present invention, instead of performing a periodic refresh operation, new appropriate data is supplied (i.e. refresh operation). At this time, if a data change is detected, it is clear that there is an erroneous display on the screen. Data transmission may also be performed.

[Example] Hereinafter, a case where the screen display system of the present invention is implemented in a television receiver will be described as an example.

Since the schematic block diagram of the television receiver is the same as that shown in FIG. 4 of 0-1, the explanation thereof will be omitted. However, in this embodiment, the CRT control section 12 is configured as shown in FIG. 1, and software for executing the operations shown in FIG. 2 in the CPU 9 is added.

FIG. 1 is a block diagram of the CRT control section 12 in this embodiment, and the same reference numerals as in FIG. 5 indicate the same parts.

40 is an adder, and 41 is a latch circuit. data RAM
The data sequentially read from the character generator ROM 31 is read out from the character generator ROM 31 as explained in FIG.
and RGB output operations, and is input to the adder 40 and added to the data held in the latch circuit 41, that is, the previously added data.

This addition operation is reset at the stage (ie, one vertical cycle) when the reading of - character display control data from the data RAM 21 is completed. In other words, addition is performed for each group of character display control data supplied from the CPU 9 for displaying a character, and the total amount of unit data for displaying that character is calculated.

At the stage when - reading from the data RAM 21 is completed, the total data held in the latch circuit 41 is transmitted from the microcomputer interface section 20 to the CPU 9. After the transmission, the latch circuit 41 is reset, and as data is read from the data RAM 21 which is subsequently executed for character display in the next field,
Addition is performed.

In the CRT control unit 12 of FIG. 1 in this embodiment, the refresh flag is not normally sent from the CPU 9, and the total amount of character display control data (so-called sum check data) is sent in I vertical cycles as described above. It is generated and sent to the CPU 9.

On the other hand, the CPU 9 in this embodiment executes the operation shown in FIG. 2 when displaying a character.

First, when displaying some kind of character, the character display control data group necessary for displaying that character is
fFloo and FIOI are transmitted to the RT control unit 21 and stored in the RAM 21).Thereby, the CRT control unit 12 starts the above-described character readout and output operations of character video signals based on RGB signals, as well as the thumb check operation.

When the sum check data formed by the adder 40 and the latch circuit 41 is received from the CRT control unit 12 (F
2O3), this is compared with the total amount of data initially transmitted in step FlH, and a match or mismatch is determined. If they match, the data changes in the data RAM 21 (
Determine that there is no damage (destruction) and wait until the next sum check data is received fF103→F105→F102)
However, if there is a mismatch, data RAM2
1, the data has changed for some reason, and it is therefore determined that the character is incorrectly displayed on the screen. Therefore, the character display control data group is transmitted again and a data refresh operation is performed to write it into the data RAM 21 fF103-F2O3) This operation is executed until the end of character display.

In this manner, the screen display system of this embodiment performs thumb-checking of character display control data and stores data in the data RAM.
It is detected whether the character display control data in 21 has changed due to discharge or the like. Refresh data is supplied from the CPU 9 to the CRT control unit 12 only when there is a data change.

In this way, when transmitting refresh data, it is not necessary to consider the influence of data transmission on video. This is because refresh data is sent only when there is an incorrect display on the screen, that is, only when the screen is not correct. No consideration is necessary. Therefore, all refresh data can be transmitted in a short time.

For example, as mentioned above, even if the amount of data is relatively large at 480 bytes, it is possible to send a pig of about 80 bytes if the L field period is fully used.
Therefore, the time required for data refresh is approximately 6 vertical periods (≠96 msec). In other words, it is possible to recover the proper display in about 1 second after detecting the character misdisplay, and it is almost impossible for the viewer to notice the misdisplay.

Furthermore, in this embodiment, it is not necessary to constantly transmit the character display control button (because no complicated control is required,
Another advantage is that software can be designed easily.

Figure 3 shows a CRT control unit applied to a bit map display type (graphic display type) display device, which does not use a character generator ROM and controls the display on the screen based on character display control data. Characters are expressed directly by dot control.

Even in this case, the CPU controlling the CRT control section performs the operations shown in FIG. 2, thereby making it possible to recover from the character misdisplay in a short time.

In the above embodiments, the data check method is a sum check method using an adder, but for example, EX-O
This is also possible by detecting a 1-bit change by addition using an R circuit. Further, it is not necessary to use a thumb check as long as it can detect changes in data in the data RAM.

[Effects of the Invention] As explained above, in the screen display system of the present invention, new character display control data is supplied to the CRT control unit at the time when it is detected that a character is displayed incorrectly. Even when a large number of characters are displayed, there is an effect that incorrect display can be restored to proper display in a short time.

FIG. 2 is a flowchart showing the operation of the CPU in one embodiment of the present invention. FIG. 3 is a block diagram of the CRT control section in another embodiment of the present invention. FIG. 4 is a screen display system. A schematic block diagram of a television receiver equipped with the following. FIG. 5 is a block diagram of a conventional screen display system.

6 is a video signal processing section, 9 is a CPU, 12 is a CRT control section, 21 is a data RAM, 31 is a character generator ROM, 40 is an adder, and 41 is a latch circuit.

[Brief explanation of the drawing]

Claims (1)

[Scope of Claims] System control means capable of outputting a group of character display control data for displaying a predetermined character on a screen, and storing the group of character display control data supplied from the system control means in an internal memory. a CRT control means for displaying a predetermined character image on a screen based on unit data in the character display control data group that is held and sequentially and continuously read from the internal memory; creates check data for the character display control data group sequentially read out as unit data from the internal memory and supplies it to the system control means, and the system control means controls the internal control data based on the check data. A screen display system characterized by detecting destruction of data held in a memory and supplying a group of character display control data to the CRT control means again at the time when data destruction is detected.