JPH0458591A - Manufacture of multi-layer printed wiring board - Google Patents
Manufacture of multi-layer printed wiring boardInfo
- Publication number
- JPH0458591A JPH0458591A JP17076890A JP17076890A JPH0458591A JP H0458591 A JPH0458591 A JP H0458591A JP 17076890 A JP17076890 A JP 17076890A JP 17076890 A JP17076890 A JP 17076890A JP H0458591 A JPH0458591 A JP H0458591A
- Authority
- JP
- Japan
- Prior art keywords
- layer circuit
- inner layer
- circuit board
- resin
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229920005989 resin Polymers 0.000 claims abstract description 22
- 239000011347 resin Substances 0.000 claims abstract description 22
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 5
- 239000011888 foil Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 238000000465 moulding Methods 0.000 claims description 4
- 230000010354 integration Effects 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 9
- 239000011889 copper foil Substances 0.000 abstract description 8
- 239000003822 epoxy resin Substances 0.000 abstract description 8
- 229920000647 polyepoxide Polymers 0.000 abstract description 8
- 239000003365 glass fiber Substances 0.000 abstract 2
- 239000004593 Epoxy Substances 0.000 abstract 1
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 229910052708 sodium Inorganic materials 0.000 abstract 1
- 239000011734 sodium Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 23
- 239000011521 glass Substances 0.000 description 8
- 239000000463 material Substances 0.000 description 5
- 239000004745 nonwoven fabric Substances 0.000 description 4
- 239000002759 woven fabric Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- WNROFYMDJYEPJX-UHFFFAOYSA-K aluminium hydroxide Chemical compound [OH-].[OH-].[OH-].[Al+3] WNROFYMDJYEPJX-UHFFFAOYSA-K 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000012792 core layer Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、多層印刷配線板の製造法に関し、殊に、内層
回路板には、絶縁基板を介して対向している回路を接続
するインターステイシャルバイヤホールが設けられてい
る多層印刷配線板を製造する方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a multilayer printed wiring board, and in particular, an interstitial layer for connecting opposing circuits via an insulating substrate to an inner layer circuit board. The present invention relates to a method of manufacturing a multilayer printed wiring board provided with via holes.
従来の技術
多層印刷配線板は、予め用意した内層回路板と表面の回
路となる金属箔との間、または、予め用意した複数の内
層回路板と表面の回路となる金属箔との間および内層回
路板同士の間にプリプレグを介在させて、これらを加熱
加圧成形により一体化することにより製造される。内層
回路板の絶縁基板を介して対向している回路同士をスル
ホールにより接続する場合があり、このスルホールは、
インターステイシャルバイヤホール（ＩＶＨ）と呼ばれ
ている。Conventional technology A multilayer printed wiring board is manufactured by forming a circuit between an inner layer circuit board prepared in advance and a metal foil forming a surface circuit, or between a plurality of inner layer circuit boards prepared in advance and a metal foil forming a surface circuit. It is manufactured by interposing a prepreg between circuit boards and integrating them by heat and pressure molding. In some cases, circuits that are facing each other are connected through the insulating substrate of the inner layer circuit board, and these through holes are
It is called an interstitial buyer hole (IVH).
ＩＶＨは、前記プリプレグによる一体化のときに、プリ
プレグから流出した樹脂によって埋められ、補強される
。プリプレグから流出した樹脂によってＩＶＨを十分に
埋めるために、プリプレグの樹脂付着量、ゲルタイム、
レジンフロー等きめ細かな管理を行なっている。When the IVH is integrated with the prepreg, it is filled and reinforced by the resin flowing out from the prepreg. In order to sufficiently fill the IVH with the resin flowing out from the prepreg, the amount of resin attached to the prepreg, the gel time,
We perform detailed management such as resin flow.
発明が解決しようとする課題
上記のような管理によっても、ＩＶＨを樹脂で確実に埋
めることは難しく、ＩＶＨにボイドが残留して耐熱性を
低いものにしていた。Problems to be Solved by the Invention Even with the above management, it is difficult to reliably fill the IVH with resin, and voids remain in the IVH, resulting in low heat resistance.
本発明が解決しようとする課題は、ＩＶＨのボイドをな
くして耐熱性を高めることである。The problem to be solved by the present invention is to eliminate voids in IVH and improve heat resistance.
課題を解決するための手段
本発明に係る方法は、内層回路板の表面に熱硬化性樹脂
を塗布すると共にＩＶＨにも熱硬化性樹脂を充填する。Means for Solving the Problems The method according to the present invention applies a thermosetting resin to the surface of an inner layer circuit board and also fills the IVH with the thermosetting resin.
そして、これら熱硬化性樹脂をＢステージの状態とした
後、プリプレグを介在させることによる一体化を行なう
ことにより、多層印刷配線板を製造するものである。After bringing these thermosetting resins to a B-stage state, they are integrated by interposing a prepreg to produce a multilayer printed wiring board.
作用
ＩＶＨに充填されＢステージ状態となっている熱硬化性
樹脂は、プリプレグを用いる一体化のときの熱と圧力で
流動し、プリプレグから流出した樹脂も補充されて、Ｉ
ＶＨを確実に埋めることができる６また。内層回路板の
表面に塗布されているＢステージ状態の樹脂も流動して
、層間の接着強度を高める働きをし、耐熱性の向上につ
ながるものである。The thermosetting resin that has been filled into the working IVH and is in the B stage state flows due to the heat and pressure during integration using the prepreg, and the resin that has flowed out from the prepreg is also replenished and the I
6 also can definitely fill VH. The B-stage resin applied to the surface of the inner layer circuit board also flows, serving to increase the adhesive strength between the layers, leading to improved heat resistance.
実施例 次に、本発明に係る実施例を説明する。Example Next, embodiments according to the present invention will be described.
実施例１
ガラス不織布基材のエポキシ樹脂積層板を絶縁基板とす
る０、８ｍｍ厚の両面印刷配線板を用意し、これを内層
回路板１とした。その銅箔回路表面には、黒化処理を施
しておく。Example 1 A double-sided printed wiring board having a thickness of 0.8 mm and having an epoxy resin laminate with a glass nonwoven fabric base material as an insulating substrate was prepared, and this was used as the inner layer circuit board 1. The surface of the copper foil circuit is subjected to blackening treatment.
水酸化アルミニウムを配合したエポキシ樹脂を内層回路
板１の表面にロールで塗布し、ｌＶＨ２にも併せて充填
した。そして、加熱乾燥し、Ｂステージ状態の樹脂層３
を形成した。An epoxy resin blended with aluminum hydroxide was applied with a roll onto the surface of the inner layer circuit board 1, and was also filled into the lVH2. Then, the resin layer 3 in the B stage state is heated and dried.
was formed.
上記内層回路板１の両面に、エポキシ樹脂のガラス不織
布プリプレグ４、ガラス織布プリプレグ５、銅Ｎ６をこ
の順序で構成し、加熱加圧成形により一体化した。そし
て、表面の銅箔６をエツチング加工して回路を形成し、
スルホールｔｒ 設ケて４層の回路をもつ配線板とした
。Glass nonwoven fabric prepreg 4 made of epoxy resin, glass woven fabric prepreg 5, and copper N6 were formed in this order on both sides of the inner layer circuit board 1, and were integrated by heating and pressure molding. Then, the copper foil 6 on the surface is etched to form a circuit,
Through-hole TR was installed to create a wiring board with a four-layer circuit.
特性を評価した結果を第１表に示す。Table 1 shows the results of evaluating the characteristics.
実施例２
表面層がガラス織布基材、芯層がガラス不織布基材のエ
ポキシ樹脂積層板を１１１！！縁基板とする０、８ｒＢ
厚の両面印刷配線板を用意し、これを内層回路板とした
。以下、実施例１と同様にして４層の回路をもつ配線板
とした。Example 2 An epoxy resin laminate whose surface layer is a glass woven fabric base material and whose core layer is a glass nonwoven fabric base material is 111! ! 0,8rB as edge board
A thick double-sided printed wiring board was prepared and used as an inner layer circuit board. Thereafter, a wiring board having a four-layer circuit was prepared in the same manner as in Example 1.
特性を評価した結果を第１表に示す。Table 1 shows the results of evaluating the characteristics.
従来例１
ガラス織布基材のエポキシ樹脂積層板を絶縁基板とする
０、８ｍ＋厚の両面印刷配線板を用意し、これを内層回
路板１とした。その銅箔回路表面には、黒化処理を施し
ておく。Conventional Example 1 A double-sided printed wiring board with a thickness of 0.8 m+ was prepared, and the inner layer circuit board 1 was prepared using an epoxy resin laminate with a glass woven fabric base material as an insulating substrate. The surface of the copper foil circuit is subjected to blackening treatment.
この内層回路板の両面に、エポキシ樹脂のガラス織布プ
リプレグ２枚、銅箔をこの順序で構成し。On both sides of this inner layer circuit board, two sheets of epoxy resin glass woven prepreg and copper foil were constructed in this order.
加熱加圧成形により一体化した。そして、表面の銅箔を
エツチング加工して回路を形成し、スルホールを設けて
４層の回路をもつ配線板とした。It was integrated by heat and pressure molding. Then, the copper foil on the surface was etched to form a circuit, and through holes were provided to create a wiring board with a four-layer circuit.
特性を評価した結果を第１表に示す。Table 1 shows the results of evaluating the characteristics.
従来例２
ガラス不織布基材のエポキシ樹脂積層板を絶縁基板とす
る０、８［ＩＴｌ厚の両面印刷配線板を用意し、これを
内層回路板１とした。以下、従来例１と同様にして４層
の回路をもつ配線板とした。Conventional Example 2 A double-sided printed wiring board with a thickness of 0.8 [ITl] was prepared, and the inner layer circuit board 1 was prepared using an epoxy resin laminate with a glass nonwoven fabric base material as an insulating substrate. Thereafter, a wiring board having a four-layer circuit was prepared in the same manner as in Conventional Example 1.
特性を評価した結果を第１表に示す。Table 1 shows the results of evaluating the characteristics.
第１表
ＰＣＴ：プレッシャークツカー処理
発明の効果
本発明に係る方法によれば、ＩＶＨが樹脂で確実に埋め
られ、また層間の接着強度も上がることから耐熱性を高
めることができる。Table 1 PCT: Effects of the Invention on Pressure Packer Treatment According to the method of the present invention, the IVH is reliably filled with resin, and the adhesive strength between the layers is also increased, so that heat resistance can be improved.
第１図は本発明に係る方法の工程を示す断面説明図であ
る。
１は内層回路板、２はＩＶＨ
３はＢステージ状態の樹脂層、
４．５はプリプレグ、６は銅箔FIG. 1 is an explanatory cross-sectional view showing the steps of the method according to the present invention. 1 is inner layer circuit board, 2 is IVH, 3 is resin layer in B stage state, 4.5 is prepreg, 6 is copper foil
Claims (1)
間、または、予め用意した複数の内層回路板と表面の回
路となる金属箔との間および内層回路板同士の間にプリ
プレグを介在させてこれらを加熱加圧成形により一体化
するものであって、内層回路板には、絶縁基板を介して
対向している回路を接続するインターステイシャルバイ
ヤホールが設けられている多層印刷配線板を製造する方
法において、 内層回路板の表面に熱硬化性樹脂を塗布すると共にイン
ターステイシャルバイヤホールにも熱硬化性樹脂を充填
して、これら熱硬化性樹脂をＢステージの状態とした後
、前記プリプレグを介在させることによる一体化を行な
うことを特徴とする多層印刷配線板の製造法。[Claims] Between an inner layer circuit board prepared in advance and a metal foil forming a surface circuit, or between a plurality of inner layer circuit boards prepared in advance and a metal foil forming a surface circuit, or between inner layer circuit boards. These are integrated by heat and pressure molding with a prepreg interposed between them, and the inner layer circuit board is provided with interstitial via holes that connect opposing circuits via an insulating substrate. In the method of manufacturing a multilayer printed wiring board, a thermosetting resin is applied to the surface of the inner layer circuit board, and the interstitial via holes are also filled with the thermosetting resin, and these thermosetting resins are applied to the B stage. 1. A method for manufacturing a multilayer printed wiring board, characterized in that after the above state is obtained, integration is performed by interposing the prepreg.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17076890A JPH0458591A (en) | 1990-06-28 | 1990-06-28 | Manufacture of multi-layer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17076890A JPH0458591A (en) | 1990-06-28 | 1990-06-28 | Manufacture of multi-layer printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0458591A true JPH0458591A (en) | 1992-02-25 |
Family
ID=15911020
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17076890A Pending JPH0458591A (en) | 1990-06-28 | 1990-06-28 | Manufacture of multi-layer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0458591A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5610958A (en) * | 1994-10-18 | 1997-03-11 | Kabushiki Kaisha Toshiba | Reactor circulating pump system |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5122065A (en) * | 1974-08-19 | 1976-02-21 | Fujitsu Ltd | Tasopurintobanno sakuseihoho |
| JPS5155953A (en) * | 1974-11-11 | 1976-05-17 | Hitachi Ltd | KANTSUSETSUZOKUKONAIGA JUTEN SARETA TASOPURINTOKAIROBANTOSONO SEIHO |
| JPS53123868A (en) * | 1977-04-04 | 1978-10-28 | Hitachi Ltd | Method of producing multilayer printed circuit board provided with multiple through holes |
| JPS58215094A (en) * | 1982-06-08 | 1983-12-14 | 三菱電機株式会社 | Method of producing multilayer printed circuit board |
| JPS6062194A (en) * | 1983-09-14 | 1985-04-10 | 松下電工株式会社 | Method of producing multilayer printed circuit board |
| JPS6062193A (en) * | 1983-09-14 | 1985-04-10 | 松下電工株式会社 | Method of producing multilayer printed circuit board |
| JPS61154096A (en) * | 1984-12-26 | 1986-07-12 | 住友ベークライト株式会社 | Manufacture of multilayer printed wiring board |
-
1990
- 1990-06-28 JP JP17076890A patent/JPH0458591A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5122065A (en) * | 1974-08-19 | 1976-02-21 | Fujitsu Ltd | Tasopurintobanno sakuseihoho |
| JPS5155953A (en) * | 1974-11-11 | 1976-05-17 | Hitachi Ltd | KANTSUSETSUZOKUKONAIGA JUTEN SARETA TASOPURINTOKAIROBANTOSONO SEIHO |
| JPS53123868A (en) * | 1977-04-04 | 1978-10-28 | Hitachi Ltd | Method of producing multilayer printed circuit board provided with multiple through holes |
| JPS58215094A (en) * | 1982-06-08 | 1983-12-14 | 三菱電機株式会社 | Method of producing multilayer printed circuit board |
| JPS6062194A (en) * | 1983-09-14 | 1985-04-10 | 松下電工株式会社 | Method of producing multilayer printed circuit board |
| JPS6062193A (en) * | 1983-09-14 | 1985-04-10 | 松下電工株式会社 | Method of producing multilayer printed circuit board |
| JPS61154096A (en) * | 1984-12-26 | 1986-07-12 | 住友ベークライト株式会社 | Manufacture of multilayer printed wiring board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5610958A (en) * | 1994-10-18 | 1997-03-11 | Kabushiki Kaisha Toshiba | Reactor circulating pump system |
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