JPH0457987B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a type of scintillation camera that digitally performs position calculation processing.

This type of scintillation camera is provided with an AD converter for AD converting each output of a large number of photoelectric converters, and the position calculation circuit has a digital configuration. In this case, the resolution of the image depends on the number of bits of digital position information. However, the output of a photoelectric converter increases as the energy of the incident radiation increases.

Therefore, if the number of bits of the AD converter and position calculation circuit is determined to obtain the necessary spatial resolution at high energy, the number of data bits will not be sufficient at low energy and the necessary spatial resolution will not be obtained. Therefore, conventionally, with the understanding that the number of bits is too large for high energy and is wasted,
In order to obtain the required number of bits of data even with low energy, the number of bits in the AD converter and position calculation circuit was increased, which inevitably led to higher prices.

This invention reduces the number of bits of the ADH converter and position calculation circuit compared to conventional ones by reducing the number of bits required to obtain a predetermined spatial resolution regardless of the energy, thereby reducing the cost. The purpose of the present invention is to provide a scintillation camera that achieves this.

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, a scintillator 1 generates scintillation in response to incident radiation, and is made of, for example, NaI (Tl) crystal. This scintillation light is light guide 2
is led to a large number of photo multipliers 3,
converted into an electrical signal. Each output of these photo multipliers 3 passes through each preamplifier 4,
After being integrated by the respective integrating circuits 5, the signals are taken into each of the sample and hold circuits 6, held, and input to each AD converter 7. On the other hand, all the outputs of each preamplifier 4 are summed by an adder circuit 8, then integrated by an integrator circuit 9, and further passed through a sample and hold circuit 10 to form an energy signal Z.
is obtained. This energy signal Z is sent to the pulse height analyzer 1
If the energy signal Z falls within the window set by the window setting device 20 according to the energy of the nuclide used, the brightness signal is sent to
UNBLANK is generated from the pulse height analyzer 11. This energy signal Z is also sent to the amplifier circuit 12,
A voltage proportional to the energy signal Z is supplied from this amplifier circuit 12 to each AD converter 7 as a reference voltage V _REF .

The digital output of each AD converter 7 is weighted according to the coordinates of the corresponding photo multiplier 3 in X and Y weighted accumulation circuits 13 and 14, and then added in addition circuits 15 and 16, respectively. to obtain digital position signals X and Y.
In order to simplify the explanation, the timing control of each circuit such as the integrating circuit, the sample hold circuit, and the AD converter is omitted, but it is assumed that the timing of each circuit is controlled by an appropriate signal.

Although the AD converter 7 may be of any type, the description here assumes that a successive approximation type AD converter 71 shown in FIG. 2 is used. The input V _IN is compared with the output V _OUT of the DA converter 18 by the comparator 17, and the comparison output is sent to the successive approximation processing register 19. This register 19 initially outputs an output D _IN in which only the MSB (largest bit) is "1" and all others are "0", and the corresponding analog output V _OUT is compared by the comparator 17, and the MSB is determined. A similar comparison and determination is then made for the second bit starting from the MSB, and this is repeated sequentially up to the LSB (least bit) to determine all bits from the MSB to the LSB to obtain the digital output D _OUT .
Here, if this AD converter 71 is n-bit, the code of D _IN is (b _o1 , b _o2 , ..., b ₁ , b ₀ )
You can put it as At this time, V _OUT =k・V _REF・(1/2)・(b _o-1・2 ⁰ +b _o-2・2
^-1 +...+b ₁・2 ^-(n-2) +b ₀・2 ^-(n-1) ) (where k is a constant of proportionality). In other words, the reference voltage V _REF is
This determines the input voltage when the digital output of 1 is assumed to be the full bit (all bits are ``1'') LSB plus 1 bit. (corresponds to a voltage twice the input voltage when all bits of are "0", that is, bo _-1 = 1, _bo-2 , ... b ₁ , b ₀ = 0). A.D.
After conversion, V _OUT ≒ V _IN D _OUR = D _IN . However, V _REF ∝Z. Therefore (b _o-1・2 ⁰ +b _o-2・2 ^-1 +...+b ₁・2 ^-(n-2) +b ₀
・2 ^-(n-1) )=2・V _IN /k・V _REF ∝V _IN /Z Therefore, if the energy signal Z is large, the reference voltage
Since V _REF also becomes large, it is possible to always obtain data with the same number of bits regardless of the energy, and standardization using the energy signal Z is also performed at the same time. Therefore, the division circuit that was conventionally necessary for standardization using the energy signal Z becomes unnecessary. Since this reference voltage V _REF is changed each time the radiation is incident in accordance with the energy of the incident radiation, it can be used even when measuring multiple spectra or multiple nuclides.

Note that AD converters of other types than the successive approximation type (for example, parallel comparison type) can also be used for the same reason because the relationship with respect to the reference voltage is exactly the same.

Furthermore, in the circuit shown in FIG. 1, it is possible to adopt a configuration in which each output of the preamplifier 4 has an integral characteristic, or a configuration in which a peak hold circuit is used in place of the integral circuits 5 and 9 and the sample and hold circuits 6 and 10. You can also do it.

Furthermore, the reference voltage V _{REF is} input from the input of the AD converter 7.
It is also desirable to insert a delay circuit on the input side or the output side of the integrating circuit 5 in order to improve the count rate characteristics by supplying the signal first.

In the above embodiment, the AD converter 7 is
However, as shown by the dotted line, the window setting signal given from the window setting device 20 to the pulse height analyzer 11 is given to the amplifier circuit 12 instead of the energy signal Z, and the reference voltage V _{REF is} changed. It may be made to correspond to the window for which .
In this way, the energy signal Z for each individual radiation incident
Since the reference voltage V _REF proportional to is not given, a division circuit is required for normalization by energy, but the reference voltage V _REF of the AD converter 7 is proportional to the energy setting window. Therefore, regardless of whether the energy is high or low, you can always obtain the same number of bits of data.
There is no need to use an expensive AD converter with a large number of bits or a position calculation circuit. In this case, multiple spectra and multi-nuclide measurements are also performed using the reference voltage V _REF using the highest of several set energy windows.
If it is determined, the accuracy will deteriorate for low energy, but it is possible to implement.

As described above in the embodiments, according to the present invention, the bit precision can be made the same regardless of the energy within the range of precision required to obtain the necessary spatial resolution, so the number of bits in the AD converter and position calculation circuit can be reduced. It can be done at a low price.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram showing an example of the configuration of an AD converter. 1...Scintillator, 2...Light guide, 3
...Photo multiplier, 4...Preamplifier,
5, 9... Integration circuit, 6, 10... Sample hold circuit, 7... AD converter, 8, 15, 16...
... Addition circuit, 11 ... Pulse height analyzer, 12 ... Amplification circuit, 13, 14 ... Weighted integration circuit, 17 ...
Comparator, 18...DA converter, 19...Successive approximation processing register, 20...Window setter,
71...Successive approximation type AD converter.

Claims (1)

[Scope of Claims] 1. A scintillator that generates scintillation in response to incident radiation, a number of photoelectric converters to which scintillation light is guided and generates electrical signals, and the output of each of these photoelectric converters is inputted, respectively. A.D.
In a scintillation camera equipped with a converter and a position calculation circuit into which the digital outputs of these AD converters are input, a voltage proportional to the energy of the radiation is generated, and this voltage is applied to the full bit output of the AD converter. 1. A scintillation camera comprising a reference voltage supply circuit that supplies a reference voltage that determines an input voltage that is assumed to be the sum of the minimum bit of 1 and 1. 2. The reference voltage supply circuit is characterized by comprising an adder circuit that adds all the outputs of the plurality of photoelectric converters, and a voltage generator circuit that generates a voltage proportional to the output of the adder circuit. A scintillation camera according to claim 1. 3. Claim 1, wherein the reference voltage supply circuit is constituted by a voltage generation circuit that generates a voltage according to a window setting signal applied to a pulse height analyzer for analyzing the pulse height of an energy signal. Scintillation camera as described.