JPH0457928U - - Google Patents

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Publication number
JPH0457928U
JPH0457928U JP9981590U JP9981590U JPH0457928U JP H0457928 U JPH0457928 U JP H0457928U JP 9981590 U JP9981590 U JP 9981590U JP 9981590 U JP9981590 U JP 9981590U JP H0457928 U JPH0457928 U JP H0457928U
Authority
JP
Japan
Prior art keywords
high frequency
gain
varying
amplification section
frequency amplification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9981590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9981590U priority Critical patent/JPH0457928U/ja
Publication of JPH0457928U publication Critical patent/JPH0457928U/ja
Pending legal-status Critical Current

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  • Noise Elimination (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案に係る受信機の実施例を示す
ブロツク図、第2図は従来例を示すブロツク図で
ある。 主な符号の説明、1……アンテナ、2……高周
波増幅部、3,4,12……スイツチ、5……ミ
キサ、6……オーデイオアンプ、7……ゲート、
8……ノイズブランカ回路、9……バツフアアン
プ。
FIG. 1 is a block diagram showing an embodiment of a receiver according to this invention, and FIG. 2 is a block diagram showing a conventional example. Explanation of main symbols, 1...Antenna, 2...High frequency amplification section, 3, 4, 12...Switch, 5...Mixer, 6...Audio amplifier, 7...Gate,
8...Noise blanker circuit, 9...Buffer amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 高周波増幅部と、前記高周波増幅部の利得を可
変させる第1の可変手段と、ノイズブランカ回路
と、前記ノイズブランカ回路に入力する信号レベ
ルを増幅する増幅器と、前記可変手段に同期して
前記増幅器の利得を可変せしめる第2の可変手段
とで構成したことを特徴とする受信機。
a high frequency amplification section, a first variable means for varying the gain of the high frequency amplification section, a noise blanker circuit, an amplifier for amplifying the signal level input to the noise blanker circuit, and a first variable means for varying the gain of the high frequency amplification section; and second variable means for varying the gain of the receiver.
JP9981590U 1990-09-26 1990-09-26 Pending JPH0457928U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9981590U JPH0457928U (en) 1990-09-26 1990-09-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9981590U JPH0457928U (en) 1990-09-26 1990-09-26

Publications (1)

Publication Number Publication Date
JPH0457928U true JPH0457928U (en) 1992-05-19

Family

ID=31842013

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9981590U Pending JPH0457928U (en) 1990-09-26 1990-09-26

Country Status (1)

Country Link
JP (1) JPH0457928U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54158110A (en) * 1978-06-02 1979-12-13 Matsushita Electric Ind Co Ltd Noise blanker circuit for receiver
JPS604334A (en) * 1983-06-23 1985-01-10 Fujitsu Ltd Radio receiver of frequency conversion type

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54158110A (en) * 1978-06-02 1979-12-13 Matsushita Electric Ind Co Ltd Noise blanker circuit for receiver
JPS604334A (en) * 1983-06-23 1985-01-10 Fujitsu Ltd Radio receiver of frequency conversion type

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