JPH0454395B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device having a double layer of a silicon nitride film or a silicon oxide film and a silicon nitride film. The present invention relates to a semiconductor device and its integrated circuit that can control the current/voltage characteristics between the two regions or extract a voltage or current with a polarity opposite to the polarity of a bias applied to an opposing region.

As shown in FIG. 1, the present invention includes an opposing region 10, a semiconductor region 100, and a silicon nitride film or a double layer 1 of a silicon oxide film and a silicon nitride film between these two regions. This is an improvement to a semiconductor device having a component configured such that it is in contact with a semiconductor region. However, such a conventional semiconductor device can exhibit current-controlled negative resistance characteristics (or switch characteristics having a conducting state and a cutoff state) as shown in FIG. 2 due to the above-mentioned components. Since the present invention inherits this feature as it is, we will begin by explaining the same structural parts as those found in such conventional semiconductor devices.

The components shown in Figure 1 use an Al vapor deposited film as the opposing region, and the silicon nitride film has a thickness of approximately 90 Å.
A thermal nitride film is grown on an n-type silicon substrate as a semiconductor region. Note that the opposing region may be made of other metal film, as long as it forms a conductive region.
A semiconductor film or the like may also be used.

The semiconductor region is not limited to silicon, but also GaP,
Compound semiconductors such as InP and GaAs can be used. In the case of GaP, when an n-type 1 Ω-cm substrate was used as a semiconductor region, light emission at the surface was observed in the "conductive state". In this case, the components of FIG. 1 can be used as light emitting semiconductor devices.

If the semiconductor region is silicon, a silicon nitride film can be obtained by heating (thermal nitriding) for 10 minutes to several hours in a nitrogen or ammonia gas atmosphere with a particularly low oxygen content at a temperature of 900°C to 1200°C. It will be done. If the semiconductor region is made of a material other than silicon, it can be obtained by chemical vapor deposition using silane and ammonia as raw materials at 600° C. to 800° C. This chemical vapor deposition method can also be applied to silicon. Although a silicon oxide film may grow on the silicon nitride film due to the incorporation of a small amount of oxygen during thermal nitriding, the film exhibits good electrical characteristics up to about 30 Å as shown in FIG. 2. The thickness of silicon nitride film is 20Å
The characteristics shown in Figure 2 are obtained up to about 150 Å, and in the figure, the current at point B (holding current) increases as the silicon nitride film becomes thinner, and the voltage at point B increases as the silicon nitride film thickness increases. Increases in thicker film parts.

By further providing a third region having a semiconductor region and a rectifying junction according to the present invention, a new function is imparted to a semiconductor device made of such a group of components. That is, FIG. 3 shows a specific example where the semiconductor region 100 is an n-type semiconductor. When collected in the p-type semiconductor region 101B, which is a third region provided in contact with the region 100 and within the diffusion or drift distance of holes, which are minority carriers, even though a negative bias is applied to the opposing region 10, First, a positive potential can be taken out from the region 101B. In short, it has the characteristics as shown in FIG.
It can also be used as a power source that outputs voltage. This is convenient for obtaining biases with different polarities in integrated circuits and the like. Figure 5 shows a concrete example of this application. As shown in the figure, high impurity concentration n
A P-channel insulated gate transistor and a multi-collector npn bipolar transistor having a p-type base can be simultaneously fabricated in the substrate surface in which an n-type region 100a of the order of 10 ¹⁴ to 10 ¹⁸ is formed on the shape region 100b. In order to operate these two elements simultaneously within the same substrate, a negative power source and a positive power source are required. However, if the specific example of the present invention shown in FIG. 3 is further applied, only one type of external power source is required. In cross-sectional view a, regions 110 and 111 respectively represent the source and drain regions of an insulated gate transistor, 112 represents an insulated gate, and 113 represents a gate insulating film. Region 10 is a facing region, 1 is a region consisting of a silicon nitride film or a double layer of a silicon oxide film and a silicon nitride film, and 101B
is a region that collects minority carriers generated on the surface of the region 100a by high-energy carriers that have passed through the thin film 1;
It is provided within the reach of the minority carrier from the joint surface of a. Region 101B is a region of the opposite conductivity type to region 100a, and is p-type in this specific example. Area 104
A and 104B are formed in the region 101B and have a conductivity type opposite to that of the region 101B, forming a multi-collector of the npn transistor. The base of the npn transistor is the carrier collection region 101 mentioned above.
In common with B, the emitters are on the substrates 100a and 100b.
It is formed of. In the figure, a portion indicated as CT ₁ is an npn transistor output amplifier circuit or logic circuit that operates by applying a negative bias to the opposing region 10, as shown in the equivalent circuit CT ₁ in figure b. On the other hand, the portion indicated as _Q1 is a P-channel insulated gate transistor as shown in the equivalent circuit of Figure b, and can be used as a circuit element that operates with negative bias. Therefore, if the present invention is used, the conventional bipolar two
Integrated circuits that previously required two power supplies can now be operated with one power supply. In addition, in the equivalent circuit of figure b, the symbol shown on each terminal indicates that it is a terminal drawn out from the electrode or region of figure a. Further, in FIG. 5, the region for collecting holes generated by high-energy electrons and the base region of the bipolar transistor are common, and a high-density integrated circuit is realized.

Channel region 105 as shown in FIG.
A, 105B, area 101B becomes area (1
00a+100b) as source regions 104A, 10
It can also be formed as a gate of a field effect transistor having 4B as a drain, in common with the hole collecting region. In this case, the region 101B does not have to be a P-type semiconductor, but may be a material that forms a rectifying junction with the region 100a (a metal or a semiconductor that forms a heterojunction with the region 100a). In order to operate this integrated circuit as a directly connected logic circuit, a gate region 101B and a source region (100a+100b) are required.
The impurity concentration and dimension relationship of the channel is selected such that the channel region is depleted even when the bias is 0.

Third region 10 having a semiconductor region and a rectifying junction
1B, as shown by the dotted line in FIG.
If the third region 101B is provided so as to partially overlap below, or if it is provided so as to partially overlap below the portion 10a extending onto the insulating film 2 of the opposing region as shown in the figure, the third region 101B is controlled. area and the opposing area 10
The breakover voltage (voltage at point A in FIG. 2) or holding voltage (voltage at point B in FIG. 2) of the switching characteristic between the semiconductor region 100 and the semiconductor region 100 can be controlled. Furthermore, the current-voltage characteristics between the semiconductor region and the opposing region can be controlled by changing the voltage in the third region as shown in FIG.

At this time, a negative resistance characteristic was observed as the input characteristic between the third region 101B and the opposing region.

In the above description, it goes without saying that the present invention also works when the conductivity type of the semiconductor region is reversed and the holes and electrons are reversed. In the above description, the semiconductor region 100 is a substrate, but it may be provided separately on the surface of another semiconductor substrate, or it may be a semiconductor layer on an insulating substrate. If the source or drain of a field effect transistor or the collector of a bipolar transistor and a semiconductor region are used as a common region, a high-density static type memory integrated circuit using the transistor as an address selection element can be realized.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of the components of the present invention, FIG. 2 is a characteristic diagram of the components of FIG. 1, and FIGS. 3 to 7 show embodiments of the present invention. In the figure, 1 is silicon nitride or a thin film consisting of a double layer of silicon oxide film and silicon nitride, 10 is an opposing region, 100 is a semiconductor region, 1
01B indicates the third area.

Claims (1)

[Claims] 1. A semiconductor region, a counter region facing the semiconductor region, and a silicon nitride film or a double layer of a silicon oxide film and a silicon nitride film provided between the semiconductor region and the counter region. A semiconductor device comprising at least a third region in contact with the semiconductor region and having a rectifying junction, and a current or voltage having a polarity opposite to a bias applied from the third region to the opposing region with respect to the semiconductor region. A semiconductor device characterized in that the third region is used as a control region to control current/voltage characteristics between the semiconductor region and an opposing region. 2. A semiconductor region, a counter region facing the semiconductor region, a silicon nitride film or a double layer of a silicon oxide film and a silicon nitride film provided between the semiconductor region and the counter region, and a double layer of a silicon oxide film and a silicon nitride film in contact with the semiconductor region. a third region of the opposite conductivity type formed by a third region, and a fourth region provided to form a rectifying junction with the third region, and an electric field with the fourth region as a drain. An integrated circuit comprising a structure in which effect transistors or bipolar transistors having the fourth region as a collector are integrated.