JPH04533A - Information processing system - Google Patents

Abstract

PURPOSE:To rapidly and surely execute the evaluation and inspection of a program and to shorten a processing time by changing the instruction code part of an instruction having the prescribed code part out of plural instructions read out from a main storage device to a specific code and then executing the changed instruction. CONSTITUTION:An instruction is read out from the main storage device 2 and stored in a register 104 and the instruction code part of the instruction is com pared with the contents of a register 103 by a comparing means 11. When both the data are different from each other, an instruction transfer means 12 transfers the contents of the register 104 to a register 101. When both the data coincide with each other, a replacing means 13 replaces the instruction code part stored in the register 104 by the instruction code part stored in the register 102. The contents of the register 104 whose instruction code part is replaced are transferred to the register 101 and the instruction is executed. Said operation is repeated up to the final instruction of the program to be executed.

Description

[Detailed description of the invention] [Industrial application field] The present invention is used for executing instructions in information processing.

The present invention relates to an information processing system that automatically converts instruction codes used during evaluation and verification of programs being developed or modified.

〔overview〕

The present invention provides an information processing system including a main memory storing an instruction code section and an operand section, and a central processing unit that sequentially reads and executes instructions from the main memory. For instructions with a predetermined instruction code part, by automatically changing the instruction code part to the predetermined one and executing it, the manual rewriting of the instruction code is eliminated, and program evaluation and verification can be performed quickly and efficiently. This is to ensure that the process is carried out reliably and to shorten the time required for development and modification.

[Conventional technology]

In a stored program data processing system,
A program consisting of a group of instructions consisting of instruction codes and operands is stored in advance in the main memory, and is sequentially read out and executed by the central processing unit one instruction at a time.

In such a data processing system, when an instruction code in an instruction is to be changed for the purpose of evaluating or verifying a program that is being developed or modified, the instruction code is manually rewritten one by one.

[Problem to be solved by the invention]

The above-mentioned instruction code rewriting operation is not only time-consuming but also prone to errors and omissions, which prolongs the time it takes to evaluate and verify programs, resulting in delays in program development and modification.

The present invention solves these problems, and aims to provide a system that eliminates manual rewriting of instruction codes, shortens working time, and eliminates errors and omissions.

[Failure to solve the problem]

The present invention provides an information processing system comprising a main memory storing a group of instructions consisting of an instruction code section and an operand section, and a central processing unit including means for sequentially reading and executing instructions from the main memory. an execution instruction holding register for holding an instruction to be executed next in the processing device;
a changed instruction code holding register that holds an instruction to be replaced among the instructions read from the main memory; a changed instruction code holding register that holds an instruction code of an instruction whose instruction code is specified to be changed; Comparing means includes a fetch instruction holding register that temporarily holds an instruction read from the main memory, and compares the instruction code portion of the instruction held in the fetch instruction holding register with the contents of the change target instruction code holding register. and instruction transfer means for transferring the contents of the fetch instruction holding register as is to the execution instruction holding register when the comparing means determines that they do not match; The present invention is characterized in that it includes instruction code replacement means for replacing an instruction code portion of an instruction held in an instruction holding register with an instruction code held in the modified instruction code holding register, and transferring the instruction code by the execution instruction holding register.

[Effect]

The instruction code in the instruction read from the main memory is compared with the predetermined instruction code in the predetermined register, and if the result of the comparison matches, the instruction code in the instruction read from the main memory is transferred to the predetermined register. After replacing it with a predetermined instruction code, the instruction is executed.

Further, if the comparison results in a mismatch, the instruction is executed as is.

This eliminates manual rewriting of instruction codes, allows programs to be evaluated and verified quickly and reliably, and reduces the time required for program development and modification.

〔Example〕

Next, embodiments of the present invention will be described based on the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

The embodiment of the present invention includes a main memory 2 that stores an instruction group 21 consisting of an instruction code section 21a and an operand section 21b, and a central processing unit 1 that includes means for sequentially reading and executing instructions from the main memory 2. , an execution instruction holding register 10 that holds the next instruction to be executed in the central processing unit 1.
1, a changed instruction code holding register 102 that holds the instruction to be replaced among the instructions read from the main memory 2, and a changed instruction code holding register 102 that holds the instruction code of the instruction whose instruction code is specified to be changed. Holding register 103
and a fetch instruction holding register 104 that temporarily holds instructions read from the main memory 2, and the instruction code portion of the instruction held in the fetch instruction holding register 104 and the contents of the instruction code holding register 103 to be changed are provided. A comparison means 11 for comparison, an instruction transfer means 12 for transferring the contents of the fetch instruction holding register 104 as is to the execution instruction holding register 101 when the comparison means 11 determines that they do not match, and a comparison means 11 for determining a match. instruction code replacement means I3 for replacing the instruction code part of the instruction held in the fetch instruction holding register 104 with the instruction code held in the modified instruction code holding register 102 and transferring it to the execution instruction holding register 101; including.

Next, the operation of the embodiment of the present invention configured as described above will be explained. FIG. 2 is a flowchart showing the operating procedure of the embodiment of the present invention.

First, an instruction is read from the main memory 2 and temporarily held in the fetch instruction holding register 104 (step 10). Next, the comparing means 11 compares the instruction code part of the instruction held in the fetch instruction holding register 104 with the contents of the change target instruction code holding register 103 and makes a determination (step 30).

If it is determined that the two do not match, the instruction transfer means 12 transfers the contents of the fetch instruction holding register 104 as is to the execution instruction holding register 1(]1 (step 50).

On the other hand, if it is determined that the two match, the instruction code replacement means 13 replaces the instruction code part of the instruction stored in the fetch instruction holding register 104 with the instruction code part stored in the modified instruction code holding register 102. (Step 40). The contents of the fetch instruction holding register 104 with this instruction code part replaced are transferred to the execution instruction holding register 1.
Step 50) 1, execute the instruction transferred to the execution instruction holding register 101 (Step 60)
.

Next, it is determined whether or not the execution of the final instruction in the program to be executed has been completed (step 70). If the execution has not been completed, the process returns to step IO and repeats the operations up to step 60. When it is determined in step 70 that the final instruction in the program to be executed is to be executed, all operations are terminated.

In this way, the execution instruction holding register 101, the changed instruction code holding register 102, the changed instruction code holding register 103, and the fetch instruction holding register 104 are installed in the central processing unit 1, and the instruction code part of the changed instruction is verified. By doing so, it is possible to automatically change the instruction code part and execute the changed instruction.

For the sake of explanation, the example above is based on the case where there is one instruction code to be changed and one instruction code to be changed, but in general, there are more than one instruction code, and there are multiple types of combinations between them. .

〔Effect of the invention〕

As explained above, according to the present invention, among the instructions read from the main memory, an instruction having a predetermined instruction code section is automatically changed to a predetermined instruction code section before being executed. This eliminates the need to manually rewrite instruction codes at all, making program evaluation and verification faster and more reliable, and has the effect of shortening program development and modification periods.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a flowchart showing the operating procedure of the embodiment of the present invention. 1...Central processing unit, 2...Main storage device, 11...
- Comparison means, 12... Instruction transfer means, 13... Instruction code replacement means, 21... Instruction group, 21a... Instruction code section, 21b 90. Operand section, 101...
Execution instruction holding register, 102... Changed instruction code holding register, 103... Changed instruction code holding register, 104... Fetch instruction holding register.

Claims (1)

[Claims] 1. An information processing system comprising a main memory storing a group of instructions consisting of an instruction code section and an operand section, and a central processing unit including means for sequentially reading and executing instructions from the main memory. In the central processing unit, an execution instruction holding register that holds an instruction to be executed next, a modified instruction code holding register that holds an instruction to be replaced among instructions read from the main memory, and an instruction code. a change target instruction code holding register that holds an instruction code in an instruction that is specified to be changed; and a fetch instruction holding register that temporarily holds an instruction read from the main memory, and the instruction code held in the fetch instruction holding register is provided. a comparison means for comparing the instruction code part of the fetched instruction with the contents of the instruction code holding register to be changed; and when the comparison means determines that there is a mismatch, the contents of the fetch instruction holding register are retained as they are for the execution instruction; an instruction transfer means for transferring the instruction to a register; and, when a match is determined by the comparison means, replacing the instruction code part of the instruction held in the fetch instruction holding register with the instruction code held in the modified instruction code holding register. and instruction code replacement means for transferring in the execution instruction holding register.