JPH0451735A - Bridge device - Google Patents

Abstract

PURPOSE:To make data transfer highly efficient by calculating a traffic of a reception data of each input output means and revising the size of each storage area assigned to a data storage means based on the calculated traffic. CONSTITUTION:A bridge device 20 interconnects plural LANs to make data transfer between terminal equipments and is provided with a CPU 21, a program memory 22, an internal bus 23, input output interfaces 25-1-25-n corresponding to plural LANs 24-1-24-n and a buffer memory 26. The size of storage areas 26-1-26-n of the buffer memory 26 is revised dynamically corresponding to the traffic of the input output interfaces 25-1-25-n. Thus, the storage capacity of the storage area corresponding to the input output interface with much traffic is set large and the storage capacity of the storage area corresponding to the input output interface with less traffic is set small. Thus, highly efficient data transfer is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a bridge device that connects a plurality of networks.

(Prior Art) Generally, a bridge device is used to connect multiple local area networks (LANs).

For example, as shown in Figure 2, two LANI
, if a bridge device (BRG) 3 is placed between the terminals N1-N3 and LAN2 connected to the LANI.
The bridge device 3 can realize data transfer between the terminals N4 to N7 connected to the terminals N4 to N7.

Such a bridge device 3 has conventionally been constructed as shown in FIG. Here, the configuration of the bridge device 8 for interconnecting n LANs is shown. In FIG. 3, ll is a C that controls the overall operation of the bridge device 3.
PU, 12 is a program memory in which a program for controlling the operation of CPU II is stored, 13 is an internal bus, 1
4-1-14-n is L A N , 15-1-15-
n is an input/output interface (INF) corresponding to each of the n L A N 14-1-14-n, 16 is a buffer memory in which frames received by each input/output interface are stored, and 16-1-18 -n is a storage area allocated to the buffer memory 16 corresponding to each of the n human output interfaces 15-1-15-n.

In this bridge device 3, frames received via the input/output interfaces 15-1-15-n are temporarily stored in the buffer memory 16. Then, the transfer destination address included in the header part of the frame is CPU 1.
Checked by 1. If there is an outgoing route corresponding to the forwarding destination address, the received frame is sent to L A N 14-1-14-n via the input/output interfaces 15-1 to 15-n corresponding to that outgoing route. be done.

For example, a frame from LAN 14-1 is received by input/output interface 15-1 and stored in storage area 1B-1 of buffer memory 1B. Then, the transfer destination address of the received frame is checked, and if it is determined that the received frame is a frame that should be sent to the LAN 14-2, the received frame is transferred to the LAN via the input/output interface 15-2. A N 14-2.

In this way, the frame received by the input/output interface 15-1 is stored in the storage area 1B-1 of the buffer memory I6, and similarly, the frame received by the input/output interface 15-1 is stored in the storage area 1B-1 of the buffer memory I6.
The frames received by 15-n are respectively stored in storage areas 16-2 to l[i-n of buffer memory 16. Here, the storage areas 16-1 to 1B-n allocated to the buffer memory 16 are set to the same storage capacity in order to allocate equal storage areas to each of the input/output interfaces 15-1=15-n. ing.

However, in actual data transfer, since the amount of traffic differs for each input/output interface 15-1 to 15-n, received frames may be concentrated only in a specific storage area within the buffer memory 16. .

In this case, if that specific storage area becomes overflowed, the input/output interface corresponding to that storage area will no longer be able to receive frames, so the bridge device 3
This causes a decrease in data transfer efficiency, that is, a decrease in throughput.

In this way, conventionally, the storage capacity of the storage areas 1B-1-18-n allocated in the buffer 7 memory 1B was fixed, so there was a usable free area in the buffer 7 memory 6. However, the disadvantage is that storage areas corresponding to high-traffic input/output interfaces tend to overflow, reducing data transfer efficiency.

(Problem to be Solved by the Invention) Conventionally, since the storage capacity of each storage area allocated in the buffer memory was fixed, the buffer 7
Even if there is a usable free area in the memory, an overflow state occurs in the storage area where received frames are concentrated, which has the drawback of reducing data transfer efficiency.

This invention was made in view of these points, and it is possible to dynamically change the size of each storage area in the buffer memory to improve the buffer memory usage efficiency, thereby achieving sufficiently high efficiency. The purpose of the present invention is to provide a bridge device that can perform data transfer.

[Structure of the Invention] (Means and Effects for Solving the Problems) A bridge device according to the present invention connects a plurality of networks, each of which has a plurality of input/output means for exchanging data with a corresponding network. , has a plurality of storage areas allocated corresponding to each of these plurality of input/output means,
data storage means for storing the data received by each of the input/output means in a corresponding storage area; and means for changing the size of each storage area allocated to the means.

In this bridge device, the size of each storage area of the data storage means is dynamically changed according to the traffic amount of data received by each input/output means, so that the storage area corresponding to the input/output means with a large amount of traffic is The storage capacity of an area is set to be large, and the storage capacity of a storage area corresponding to an input/output means with a small amount of traffic is set to be small. Therefore, the limited storage space of the data storage means can be used efficiently, so even if the traffic value of a particular input/output means becomes high, overflow of that storage area can be suppressed. . Therefore, efficient data transfer is possible.

(Example) Hereinafter, the present invention will be described in detail with reference to Eko.

FIG. 1 shows a bridge device according to an embodiment of the present invention. This bridge device 20, like the bridge device 3 explained in FIGS. 2 and 3, has a plurality of LAs.
It connects between N and transfers data between terminals.
CPU21. It is provided with a program memory 22, an internal bus 23, human output interfaces 25-1 to 25-ns corresponding to a plurality of LANs 24-1 to 24-n, respectively, and a buffer memory 26.

The CPU 21 controls the entire bridge device 20, and detects the transfer destination of the received frame, controls the transmission processing and discard processing of the received frame, and controls each storage area 26-1 allocated to the buffer memory 26. ~
It has a control function for changing the size of 26-n. The size of the storage areas 26-1 to 26-n is changed based on the traffic volume of each input/output interface 25-1 to 25-n. This amount of traffic is
It is determined by the number of received frames per predetermined time and the data length of the received frames.

The program memory 22 stores various programs that control the operation of the CPU 21. The program memory 22 also stores a buffer management table 22a.

This buffer management table 22a is based on the buffer memory 2
This buffer management table 2
2a includes information indicating the start address of each storage area 26-1 to 2B-n and each input/output interface 25-1 to 2B-n.
Information indicating the traffic value of 5-n is stored.

Data storage area 27-1 of buffer management table 22a
~27-n stores information indicating the start addresses of the storage areas 26-1~2G-n, respectively. In addition, data storage areas 28-1 to 28-1 of the buffer management table 22a
28-0 has input/output interfaces 25-1 to 25
- Information indicating a traffic value determined corresponding to the traffic amount of each port is stored. Here, each traffic value stored in the data storage areas 28-1 to 28-n indicates a required buffer capacity value.

The input/output interfaces 25-1 to 25-n are LAN
24-1 to 24-n, and when receiving a frame, it counts the data length of the received frame and sends an interrupt signal to the CPU 21 to notify that the frame has been received.

Buffer memory 26 is input/output interface 25-1
~25-n is for temporarily storing frames received by n input/output interfaces 25-n.
n storage areas 26- corresponding to 1 to 25-n, respectively;
1 to 26-1. Each storage area 2B-1 to 2B
- The storage capacity of 〇 is the buffer management table 22
It is defined by the value of the start address pointer stored in a. For example, the storage capacity of the storage area 26-1 is the size of the data area 27 of the buffer management table 22a.
It is defined as an address space ranging from the value of the start address pointer stored in -1 to the value of the start address pointer stored in the data area 27-2.

Next, the operation of the bridge device 20 configured as described above will be explained.

Frames manually input from the L A N 24-1 to 24-n are sent to the corresponding storage areas 26-1 to 26-1 of the buffer memory 2B via the input/output interfaces 25-1 to 25-n.
2G-■ respectively. When receiving this frame, the CPU 21 calculates the traffic amount for each input/output interface 25-1 to 25-n based on the number of frames received per predetermined time and the data length of the frame. The number of received frames per predetermined time is determined by input/output interfaces 25-1 to 25-n each time a frame is received.
It can be recognized by the number of interrupt signals sent to the CPU 21, and the data length of the received frame is
This can be recognized by the counter function provided in the human output interfaces 25-1 to 25-n. C
The PU21 has input/output interfaces 25-1 to 25-
From the traffic volume ratio in n, each storage area 26-1
The size of the storage capacity to be allocated to ~28-0 is determined and registered as a traffic value in the buffer management table 22a. In this case, a preset minimum storage capacity is allocated even to an input/output interface to which no frame has been input.

By registering the traffic value in the buffer management table 22a in this way, the storage areas 26-1 to 26-
The value of the start address pointer corresponding to n is also determined.

In other words, the start address pointer P2 of the storage area 26-2
The value is the start address pointer Pi of the storage area 26-1.
and the traffic link value T1 of the input/output interface 25-1, and similarly, the storage area 2B
The value of the start address pointer P3 of -3 is the storage area 26
It is given by the sum of the value of the start address pointer P2 of -2 and the traffic value T2 of the human output interface 25-2.

The processing of calculating the traffic amount and setting data to the buffer management table 22a by the CPU 21 is as follows.
This is done at regular intervals, and as a result, each storage area 26-1
The size of ~26-n is also changed at regular intervals.

As explained above, in this embodiment, the size of each storage area 26-1 to 2B-n of the buffer memory 26 varies depending on the traffic volume of each input/output interface 25-1 to 25-n. Therefore, the storage capacity of a storage area corresponding to a human output interface with a large traffic volume is set to be large, and the storage capacity of a storage area corresponding to an input/output interface with a low traffic volume is set to a small storage capacity.

Therefore, the limited storage space of the buffer memory 26 can be used efficiently, so even if the traffic volume of a particular input/output interface increases, overflow of that storage area can be suppressed. .

[Effect of the invention] As described above, according to the present invention, the buffer memory
It is now possible to dynamically change the size of each storage area within the buffer memory, improving the efficiency of buffer memory use, and thereby achieving sufficiently highly efficient data transfer.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a bridge device according to an embodiment of the present invention, and FIGS. 2 and 3 are block diagrams illustrating a conventional bridge device. 20... Bridge device, 21... CPU, 22...
- Program memory, 22a... Buffer management table, 25-L to 25-n... Input/output interface, 26... Buffer memory. Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

[Claims] A bridge device that connects a plurality of networks includes a plurality of input/output means, each of which sends and receives data to and from a corresponding network, and a plurality of input/output means respectively assigned to the plurality of input/output means. a data storage means having a storage area and storing data received by each of the input/output means in the corresponding storage area; and a data storage means for calculating the traffic amount of the received data of each of the input/output means, and adding the calculated traffic amount to and means for changing the size of each storage area allocated to the data storage means based on the data storage means.