JPH0451561A - Semiconductor device - Google Patents

Abstract

PURPOSE:To display a function as a fuse at a low cost and surely without a need for a specific process among standard processes by a method wherein a resistance which connects a first interconnection metal to a second interconnection metal via contacts is provided and a stepped part is formed under the resistance. CONSTITUTION:Contacts 12, 12 are formed in opposite Al interconnections 10, 10; they are connected by using a high resistance 11 of polysilicon. The high resistance 11 is attached in a state that it is levitated by lower polysilicon by a two-layer polysilicon process. That is to say, in such a cross-sectional structure of a fuse, a stepped part is formed at high-resistance polysilicon 20 (11) by lower polysilicon 18 (13) by the two-layer process via a lower-layer interlayer film 19. Consequently, the polysilicon 20 for fuse use at the stepped part is made thin, and a blowing characteristic as a fuse can be enhanced remarkably.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a fuse circuit for a semiconductor integrated circuit.

[Conventional technology]

In semiconductor integrated circuits (hereinafter referred to as ICs), the characteristics and functions of the IC may be changed by performing some kind of operation from outside the IC. For example, programmable
Logic devices and FROMs allow users to achieve desired functionality through write operations. Furthermore, when matching the characteristics of an analog device, there are some that allow the characteristics to be matched by operations specific to that device. In this way, when adjusting or changing the function after the construction C is completed, the conventional main technology is
There was AMO3 and Hughes. 3. Conventional bipolar FROM and programmable logic devices use metals that do not easily sublimate - Ni, Or, '
T i W, P t S i, etc. are used. Second
The figure shows a typical fuse circuit. Here, 40 is an AL wiring, 41 is a POLY Si fuse, and 42 is a contact. When a high voltage is applied to both ends of the 4o AL wiring, a large current flows through the 410POLY S1 fuse and the fuse blows.

[Problem to be solved by the invention]

This conventional fuse is the most common type, but as mentioned above, the material of the fuse is a metal that easily sublimates, so if a process that is not included in the standard process of Engineering C is required, or a metal that does not have a standard process ( There are two possible ways to use POLY Si). However, if a special metal is used here, the number of process steps increases and the wafer cost increases, making it extremely unsuitable for fuses of only a few bits. C again! When using POLY Si as a fuse in MO8 work C, etc., if it is covered with CVD, the POLY and Si will be blown. There is no problem when cutting the fuse during wafer inspection, but after mold mounting, the molding material blocks the OVD open of the fuse part and the POLY
Si will no longer melt. As described above, the conventional technology is not optimal for products that have a small number of bits and are programmed after being molded.

The present invention is intended to solve these problems, and provides a fuse that can function as a fuse reliably and at low cost without requiring any special steps within the standard process.

[Means to solve the problem]

The semiconductor device of the present invention has a first wiring metal and a second wiring metal, and the first wiring metal and the second wiring metal are connected to each other through contacts with the first wiring metal and the second wiring metal. It is characterized in that it has a resistor that connects the resistor, and a difference is provided below the resistor.

Further, the semiconductor device of the present invention is characterized in that an independent diffusion region with a floating potential is formed around the resistor including directly below it.

〔Example〕

An embodiment of the present invention is shown in FIG. In Figure 1, α is the fuse configuration, 10 is AL for wiring, and 11 is POLY S.
i represents the high resistance, and 12 represents the contact between POLY Si and AL. 13 is UND of two layer POLY process
It is in a floating state in terms of potential due to ERPOLY. In addition, 14 is a well of P- in the case of N-based, and is the well of N in case of P-based.
This is the P medium wave scattering of Well C. Figure 1b shows the cross-sectional structure of this fuse. In this case, taking the N base as an example, it is 15
indicates N-base and 16 indicates P-well. 17 is LOOO3
and is SiO□. Further, 18 is UNI) ERPOLY in a two-layer POLY process, and in this embodiment, there is no difference.

19 is an interlayer film, and 20 is a high resistance P used as a heater.
OLY Si. The fusing characteristics of 1'OLY Si are influenced by the following factors: one is the surface area per calorific value, one is the cross-sectional area of the part where the current flows, and one is the concentration of the electric field. (To melt it,
The heat generation is large (it is necessary to have a small surface area (and a small cross-sectional area). In order to increase the heat generation, it is necessary to have a high resistance, and in normal processes
The sheet resistance of LYSl is process specific and PO
LY 310 width is limited by the design rules of the process. If the resistance is high (then it is necessary to increase the length of POLY Sl, but the surface area increases. In this way, it is difficult to obtain optimal fusing characteristics with a normal structure. In the present invention, as shown in Figure 1, UNDERPOLY Since there is a difference between the fuse and POLY S' in the difference part.
i is thin (and the cross-sectional area is small). Therefore, that part of the fuse generates heat intensively.
If it is flat, the electric field that is uniformly applied will be concentrated in that part because there is a difference. This significantly improves the fuse blowing characteristics. Furthermore, the optimized POLY
By using a Si fuse, the fusing energy can be minimized. However, the melting of a POLY Si fuse is only an explosion, and may lead to destruction or deterioration of the interlayer film. For example 17
There is a high possibility that a crack will occur in LOCO8, causing leakage between the underlying board and the fuse, but since the P-well shown in 16 is in a floating state in terms of potential, the current path for leakage will be through the PN junction. It is in the opposite direction, and the route is traced. Therefore, in the present invention, no leakage occurs.

In the example shown in Figure 1, a two-layer POLY UNDERPOLY was used to form the difference in the POLY Si fuse, but other materials that can form the difference in processes such as diffusion can also be used as POLY Si fuses. The writing characteristics, which can be applied by forming the write directly under the disk in a shape like 15 in Fig. 1, are caused by very low energy fusing, so it does not have a destructive effect on the surrounding CVD, AL, diffusion, etc. Furthermore, since leakage can be prevented even in the event of slight destruction, it is very beneficial for the reliability of the construction C.

As described above, by using the present invention, it is possible to provide a fuse that can be easily manufactured and has very good characteristics in terms of cost and characteristics.

〔Effect of the invention〕

In this way, if the fuse of the present invention is used, there is no need to add any new special process steps, so it is possible to
Even a t fuse has sufficient cost performance and can be made at a very low cost. Furthermore, the area is comparable to that of special fuse metals, and it can be easily applied to large-capacity fuse arrays. Furthermore, as for programming characteristics, more reliable writing characteristics can be realized compared to ordinary PoLY Si fuses. Also

[Brief explanation of drawings]

FIG. 1 (α) is a diagram showing a fuse structure in an embodiment of the present invention. FIG. 1(b) is a sectional view of the present invention. FIG. 2 is a diagram showing a conventional example. 10--...AL for wiring j1-=----POLY Si high resistance 12--
・-ω Contact 13-・-・-・・UNDERPOLYl a −
−−・−・−・P-well j 5−−− ・・・−・N base−・・−・・・・・−・P−well・・・・・・・・・−・・−Locos oxide film・・・ −・
・−・ −UNDERPOLY, 21・−Interlayer film・・・・・・・−・−・POLY Si fuse・・
......-AL wiring...--AL wiring--POLY Si fuse...
・・・－・－・More than Funtact

Claims (2)

[Claims] (1) It has a first wiring metal and a second wiring metal, and connects the first wiring metal and the second wiring metal through contacts with the first wiring metal and the second wiring metal. 1. A semiconductor device comprising a resistor and having a difference below the resistor. (2) The semiconductor device according to claim 1, characterized in that an independent diffusion region with a floating potential is formed around the resistor including directly below it.