GB2260219A - Customising integrated circuits - Google Patents
Customising integrated circuits Download PDFInfo
- Publication number
- GB2260219A GB2260219A GB9120815A GB9120815A GB2260219A GB 2260219 A GB2260219 A GB 2260219A GB 9120815 A GB9120815 A GB 9120815A GB 9120815 A GB9120815 A GB 9120815A GB 2260219 A GB2260219 A GB 2260219A
- Authority
- GB
- United Kingdom
- Prior art keywords
- conductor track
- programmable element
- layer
- integrated circuit
- programmable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 26
- 229920005591 polysilicon Polymers 0.000 claims abstract description 24
- 238000006243 chemical reaction Methods 0.000 claims abstract description 13
- 239000012212 insulator Substances 0.000 claims abstract description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 7
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 239000002184 metal Substances 0.000 claims description 25
- 239000004020 conductor Substances 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 230000000694 effects Effects 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 239000013078 crystal Substances 0.000 claims description 3
- 239000010453 quartz Substances 0.000 claims description 3
- 238000000637 aluminium metallisation Methods 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 16
- 239000004411 aluminium Substances 0.000 abstract description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 13
- 229910052782 aluminium Inorganic materials 0.000 abstract description 13
- 239000011521 glass Substances 0.000 abstract description 13
- 230000004048 modification Effects 0.000 abstract description 2
- 238000012986 modification Methods 0.000 abstract description 2
- 238000001465 metallisation Methods 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- WYTGDNHDOZPMIW-RCBQFDQVSA-N alstonine Natural products C1=CC2=C3C=CC=CC3=NC2=C2N1C[C@H]1[C@H](C)OC=C(C(=O)OC)[C@H]1C2 WYTGDNHDOZPMIW-RCBQFDQVSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 238000009966 trimming Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
In a semiconductor integrated circuit a programmable element comprises an aluminium track (15b) disposed between glass insulator layers (14, 16) and adjacent a polysilicon heater (13). Passage of a current through the heater causes reaction of the aluminium with the glass to provide a permanent open circuit condition. In a modification of this technique the aluminium track may be short circuited to the heater on the application of heat. The structure may be used e.g. in an uncommitted logic array. <IMAGE>
Description
IMPROVEMENTS IN INTEGRATED CIRCUITS
This invention relates to semiconductor programmable arrays and in particular to the fabrication of onetime programmable or customising elements in such arrays.
Onetime programmable elements have long been used in digital systems, for example as customising elements for microprocessors, or for determining the circuit function of an uncommitted logic array. Such applications generally require a high density of these programmable elements, and special processes have been developed to provide them. Examples of such processes include the use of metal resistors which can be fused selectively by passing electric currents through them; thin oxide insulation which is ruptured by a high applied potential (antifuses); and various methods for injecting fixed charges into gate oxides, thereby shifting device thresholds. Clearly, the use of special processes carries a cost penalty in the device production process. Typically, such processes cost 50 % more than an equivalent standard CMOS process.
In an attempt to address this problem, some workers have investigated structures which are readily available on standard
CMOS processes Typical structures include polysilicon resistors and metal links, either of which may be fused to an open circuit condition by the passage of sufficient current. Conventionally, these structures are "blown" via a bond pad to which the fuse is directly connected. This has limited the number of fuses that can be provided on a die. Additionally, programmable structures of this type expel some material from the surface of the silicon. This latter effect is regarded as unacceptable in application where the device is to be used in proximity to an environmentally sensitive device such as a quartz crystal.
The object of the invention is to minimise or to overcome these disadvantages.
According to the invention there is provided a programmable or customising element for a semiconductor integrated circuit, the element incorporating a metal conductor track disposed between first and second insulator layers on the integrated circuit, there being means for selectively heating the conductor track whereby to cause chemical reaction of the conductor track with the insulator layers so as to alter the electrical conductivity conditions associated with the element and to put the element into a permanently programmed condition.
Preferably the metal comprises aluminium.
Typically at least one insulator layer comprises a glass. We have found that heating of an aluminium layer disposed between two glass layers causes absorption of the metal into the glass with consequent loss of electrical conductivity. It is thought that the process takes place according to one or both of the following chemical reactions:
4 AL + 3 SiO2 2A12 3 + 3Si
2 Al + 3 SiO2 A1203 + 3SiO
If the glass layers are thick relative to the thickness of the aluminium layer then the above reactions go to completion, resulting in a wholly non-conductive structure. If however the glass layers are thin relative to the aluminium thickness, then there remains a residue of metal which diffuses through the Al2O3-Si matrix to provide an electrical short between layers.
Depending on the particular circuit construction, one or other of the processes may be employed to effect programming or customising. For example, programming may comprise the enabling of particular circuit portions by the removal of shorting links. Such a technique is of particular application in the production of semicustom integrated circuits in which a common circuit design is adapted by programming the semiconductor to meet the requirements of individual customers.
Embodiments of the invention will now be described with reference to the accompanying drawings in which:
Figure 1 is a partly schematic sectional view of a
programmable or customising structure for an
integrated circuit;
Figure 2 is a plan view of the programmable structure
of Fig. 1;
Figures 3 and 4 are sectional views of alternative
programmable structures.
Figs. 5 and 6 are respectively plan and sectional views
of a further programmable structure; and
Figs. 7a and 7b show respectively a theoretical and
physical representation of a circuit arrangement for use
with the elements of Figs. 1 to 6.
Referring to Figures 1 and 2, only those parts of the structure are shown which are necessary for the understanding of the invention.
The structure is disposed on a semiconductor, e.g. silicon, substrate 11 and comprises an oxide insulator layer 12, a polycrystalline silicon (polysilicon) layer 13, a first glass layer 14, an aluminium metal layer 15 and an upper glass layer 16, which layer provides a passivation layer. The metal layer comprises a first part 15c which provides electrical contact to the polysilicon layer 13, and a second part 1 5b isolated from the first part and in the form of a serpentine track (Fig. 2) in register with the polysilicon layer. The polysilicon layer is doped to render it conductive.
The structure may be programmed by passing an electrical current through the polysilicon layer 13 via the metal 15a and contacts 15c. This raises the temperature of the aluminium track 15b so as to cause reaction of the metal with the adjacent glass layers 14 and 16. The serpentine form of the track reduces heat conduction losses from the ends of the track, and ensures that at least the centre portion of the track reacts completely with the glass to provide an open circuit.
Typically the track 1 5b constitutes a shorting link which, when opened in the manner described above, enables an associated circuit or device (not shown).
Figure 3 shows a modification of the structure of Figures 1 and 2 in which the ends of the polysilicon heater are, in use, cooled by the provision of thin oxide heatsinks. This prevents the aluminium contacts to the polysilicon from reaching a temperature at which rapid field-assisted flow occurs. This effect can cause the polysilicon heater to become short-circuited before the desired reaction is complete. The arrangement is here described with reference to a two-layermetal process. In this structure the polysilicon layer 13 is disposed over a thick oxide layer 21, the outer ends 13a of the polysilicon layer extending beyond the thick oxide 21 and over a thin oxide layer 22. This thin layer may comprise a gate oxide film. A deposited oxide layer 23 is formed on the upper surface of the polysilicon layer 13 to provide electrical isolation between that layer and the serpentine aluminium track 15b. Glass layer 16 is provided above the track 1 5b and provides separation between the lower metal layer 15c and an upper metal layer 24. The structure may be coated with a further glass passivation layer 25.
When the polysilicon layer 13 is heated electrically to effect programming, the end portions 13c of this layer, by virtue of their close proximity to the substrate 11, provide heat sinking of the outer ends of the polysilicon layer. This has been found to reduce the risk of short circuiting of the polysilicon layer by field assisted flow of the aluminium contacts along the interface between the polysilicon heater element and the contact oxide.
It will be appreciated that, using a two layer metal process, the programmable element may be used in either of the two possible modes. If a thinner "metal one" layer only is present, complete reaction will normally result in the metallisation becoming open circuits. If, on the other hand, two metal layers are present, and the oxide density is reduced, then the reaction will be deficient resulting in a short circuit between the metallisation and the heater element. Typical layer thicknesses for a 1 micron process are illustrated in Figure 4, where 41 illustrates a region where thinner "metal 1" only is present, and 42 indicates the additional metal 2 layer.
By using both structures suitably disposed above the polysilicon heater, a programmable or customising element may be fabricated which acts as a one-timeprogramable change-over switch. Such a structure is illustrated in Figures 5 and 6. Prior to programming, the output 51 is connected through the metal 1 meander to input 52. During programming, the central portion of the metal 1 meander will be the first to react with the oxide, resulting in this portion becoming open circuit.
The combination of increased thermal conductivity following reaction, and heat given out during this reaction assists the spread of the reaction along the metal track. so that the area with thickened metallisation 54 reaches sufficient temperature to react. The excess of metal in this region causes the metal layer to become connected to the heater element 13 so that output 51 is connected to the polysilicon heater instead of to the original input 52. Region 54 is preferably closer to the more negatively biased region of the heater 56 so that any excess metal at the polysilicon surface will flow away from the open circuit region 53.A further feature of this structure is that the think oxide heatsink 55 is provided only at the more positively biased end if the polysilicon heater 57, as flow of that aluminium from the more negatively biased end of the heater is not, in general, a problem.
In some applications, the semiconductor process variability may preclude accurate determination of whether the reaction results in open circuit metallisation, or in short to the heater. In this event, an associated circuit structure which results in identical output regardless of which condition has occurred may be employed. Such a circuit is illustrated in
Figures 7a and 7b. Prior to programming, current source 61, which is arranged to be stronger than current source 62, pulls the output O/P negative. Following programming, if connection 73 is broken, the output is pulled positive by current source 62. Alternatively, if connection 63 is made to the heater, the output O/P is held positive by the heater bias 64.Thus programming will change the output potential from negative to positive regardless of whether the final state of the programmed element is an open circuit interconnect or a connection 63 to the heater 13.
Typically an integrated circuit may incorporate one hundred or more such elements. The total area required for these elements and associated circuitry is about 1 square millimetre. The elements may be used to program or customise the circuit by activating selected elements via onchip logic to route electric current to the corresponding polysilicon heaters. In this way, the circuit can be customised to perform a practical function, or trimming of the circuit parameters may be effected to provide matching to external devices. This latter technique is of practical advantage where the integrated circuit forms part of a quartz crystal resonator assembly, or trimming of the output frequency may be effected in this way.
Claims (11)
1. A programmable element for a semiconductor integrated circuit, the element incorporating a metal conductor track disposed between first and second insulator layers on the integrated circuit, there being means for selectively heating the conductor track whereby to cause chemical reaction of the conductor track with the insulator layers so as to alter the electrical conductivity conditions associated with the element and to put the element into a permanently programmed condition.
2. A programmable element as claimed in claim 1, wherein said heating means comprises a layer of polycrystalline silicon.
3. A programmable element as claimed in claim 2, wherein the portion of said polysilicon layer is in thermal contact with a heat sink whereby to limit the temperature of that ] ortion of the polysilicon layer.
4. A programmable element as claimed in claim 2 or 3, wherein the conductor track comprises an aluminium metallisation.
5. A programmable element as claimed in any one of claims 1 to 4, wherein the conductor track is of serpentine configuration.
6. A programmable element as claimed in any one of claims 1 to 5, wherein said heating causes the conductor track to go open circuit whereby to effect said programming.
7. A programmable element as claimed in any one of claims 1 to 6, and incorporating a further metal conductor track.
8. A programmable element substantially as described herein with reference to Figures 1, 2, 3 and 4 or to
Figs. 5 and 6 of the accompanying drawings.
9. An integrated circuit incorporating a plurality of programable elements as claimed in any one of claims 1 to 8.
10. A circuit as claimed in claim 9 and comprising an uncommitted logic array.
11. A quartz crystal oscillator package incorporating an integrated circuit as claimed in claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9120815A GB2260219B (en) | 1991-10-01 | 1991-10-01 | Improvements in integrated circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9120815A GB2260219B (en) | 1991-10-01 | 1991-10-01 | Improvements in integrated circuits |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9120815D0 GB9120815D0 (en) | 1991-11-13 |
| GB2260219A true GB2260219A (en) | 1993-04-07 |
| GB2260219B GB2260219B (en) | 1995-08-30 |
Family
ID=10702229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9120815A Expired - Fee Related GB2260219B (en) | 1991-10-01 | 1991-10-01 | Improvements in integrated circuits |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2260219B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5633520A (en) * | 1994-09-01 | 1997-05-27 | United Microelectronics Corporation | Neuron MOSFET with different interpolysilicon oxide |
| US6303970B1 (en) * | 1998-07-03 | 2001-10-16 | Samsung Electronics Co., Ltd. | Semiconductor device with a plurality of fuses |
| WO2002052647A2 (en) * | 2000-12-22 | 2002-07-04 | Koninklijke Philips Electronics N.V. | Semiconductor device comprising an arrangement of an electrically programmable non-volatile memory element |
| US6573585B2 (en) * | 1998-06-08 | 2003-06-03 | International Business Machines Corporation | Electrically blowable fuse with reduced cross-sectional area |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0078165A2 (en) * | 1981-10-28 | 1983-05-04 | Kabushiki Kaisha Toshiba | A semiconductor device having a control wiring layer |
| EP0112675A1 (en) * | 1982-12-28 | 1984-07-04 | Fujitsu Limited | A link structure selectively activable to create a conducting link in an integrated circuit |
| US4661214A (en) * | 1985-12-11 | 1987-04-28 | Optical Materials, Inc. | Method and apparatus for electrically disconnecting conductors |
| US4751197A (en) * | 1984-07-18 | 1988-06-14 | Texas Instruments Incorporated | Make-link programming of semiconductor devices using laser enhanced thermal breakdown of insulator |
-
1991
- 1991-10-01 GB GB9120815A patent/GB2260219B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0078165A2 (en) * | 1981-10-28 | 1983-05-04 | Kabushiki Kaisha Toshiba | A semiconductor device having a control wiring layer |
| EP0112675A1 (en) * | 1982-12-28 | 1984-07-04 | Fujitsu Limited | A link structure selectively activable to create a conducting link in an integrated circuit |
| US4751197A (en) * | 1984-07-18 | 1988-06-14 | Texas Instruments Incorporated | Make-link programming of semiconductor devices using laser enhanced thermal breakdown of insulator |
| US4661214A (en) * | 1985-12-11 | 1987-04-28 | Optical Materials, Inc. | Method and apparatus for electrically disconnecting conductors |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5633520A (en) * | 1994-09-01 | 1997-05-27 | United Microelectronics Corporation | Neuron MOSFET with different interpolysilicon oxide |
| US6573585B2 (en) * | 1998-06-08 | 2003-06-03 | International Business Machines Corporation | Electrically blowable fuse with reduced cross-sectional area |
| US6303970B1 (en) * | 1998-07-03 | 2001-10-16 | Samsung Electronics Co., Ltd. | Semiconductor device with a plurality of fuses |
| WO2002052647A2 (en) * | 2000-12-22 | 2002-07-04 | Koninklijke Philips Electronics N.V. | Semiconductor device comprising an arrangement of an electrically programmable non-volatile memory element |
| WO2002052647A3 (en) * | 2000-12-22 | 2002-10-31 | Koninkl Philips Electronics Nv | Semiconductor device comprising an arrangement of an electrically programmable non-volatile memory element |
Also Published As
| Publication number | Publication date |
|---|---|
| GB9120815D0 (en) | 1991-11-13 |
| GB2260219B (en) | 1995-08-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20041001 |