JPH0451093A - Display control circuit - Google Patents

Abstract

PURPOSE:To make simultaneous displays on a line-sequential type (LCD) display device and a dot-sequential type (CRT) display device by upplying values in registers which determine the display timing of the line-sequential scanning type (LCD) display device as values of registers determining the display timing of the dot-sequential scanning type (CRT) display device. CONSTITUTION:Application software 12 sets the values necessary for display operation in the registers 4 and 7 for the CRT mode of a display control circuit 1 through a microprocessor 13. A CRT timing generating circuit 10 generates timing for the CRT according to those values. Arithmetic circuits 5 and 8 in the display control circuit 1, on the other hand, performs necessary arithmetic for the value in the registers 4 and 7 for the CRT mode corresponding to the kind of the registers and sets the values in the registers 6 and 7 for the LCD mode. An LCD timing generating crcuit 11 generates timing for the LCD according to the values. Consequently, the simultaneous displays can be made on the CRT 2 and LCD 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the configuration of a register in a display control circuit of a personal computer, workstation, or the like.

[Prior Art] Conventional display control circuits operate in a display mode for point-sequential scanning type devices such as CRT display devices (hereinafter referred to as CRT mode) and for line-sequential scanning type devices such as liquid crystal display devices. A register that determines the display timing is shared in the display mode (hereinafter referred to as LCD mode), and the setting values of the registers are changed depending on the mode to control the display timing.
It was intended to be switched for RT or LCD use.

[Problem to be solved by the invention]

Although the conventional display control circuit described above was able to keep the circuit scale small, it had the disadvantage that it was not possible to display simultaneously on a dot-sequential scanning type display device and a line-sequential scanning type display device. .

In recent years, personal computers have become smaller and thinner line-sequential scanning displays (such as LCDs) are increasingly used as display devices. However, in view of cost, LCDs often display binary values of black and white, or 4 to 16 gradation levels, and data that is originally identified by color may not be distinguishable. In this case, a method is used in which an inexpensive dot-sequential scanning display (CRT) capable of displaying color is externally connected to the personal computer.

However, in conventional display control circuits, LCD and CRT
cannot be displayed at the same time, so in order to display on a CRT, the system had to be reset, but it was also necessary to save the data files being created and run special software to switch the display.

SUMMARY OF THE INVENTION An object of the present invention is to solve these problems and provide a display side 1J11 circuit that is capable of simultaneously displaying images that can be checked on a CRT even when operating in LCD mode.

[Means for Solving the Problems j] In the display control circuit of the present invention, the value of the register that determines the display timing of a line sequential scanning type device such as an LCD device is
[6C operation] A book configured as in 2 above, characterized by having means for giving the result of an operation using the value of a register that determines the display timing of a dot-sequential scanning device such as a CRT display device. The display control circuit of the invention operates as follows.

The application software runs on a microprocessor (
Through the MPLI (hereinafter referred to as MPLI), values necessary for display operation are set in the CRT mode register of the display control circuit. C
The RT timing generation circuit generates CRT timing based on this value.

On the other hand, the arithmetic circuit in the display control circuit performs necessary arithmetic operations on the CRT mode register value according to the type of register.
Set the value in the LCD mode register. Since the LCD timing generation circuit generates timing for LCD based on this value, simultaneous display on CRT and LCD is possible.

〔Example〕

Hereinafter, the present invention will be described in detail based on Examples.

FIG. 1 is a block diagram of a display control circuit according to an embodiment of the present invention.

1 is a display control circuit of the present invention, 2 is a CRT display device, and 3 is an LCD display device.

In this embodiment, a CRT display device is used as an example of a dot sequential scanning type display device, and an LCD display device is used as an example of a line sequential scanning type display device.

Before explaining the operation of the embodiment, first, the difference in display timing between CRT and LCD will be described. The CRT uses an electron beam to scan from the upper left to the lower right of the display, repeating horizontal scanning and also vertical scanning, to complete the display of one screen. On the other hand, in order to improve the display contrast of an LCD, the screen is physically divided into upper and lower halves, and display data is controlled independently of the upper and lower halves. For this reason, it is necessary to transfer two lines of data, one line each on the top and bottom, during the horizontal scanning time.
Compared to this, the number of display dots within the horizontal scanning time is doubled, and conversely, the number of lines within the vertical scanning time is 1/2. This is shown in Figure 2. Figure 2 (a) is a CRT display, Figure 2 (b)
) are LCD displays, where the shaded area is the display area and the blank area is the retrace period.

A general-purpose display control circuit has many register groups so that it can support displays of various resolutions, character display modes, and graphics display modes. CRT and LCD mentioned above
Due to the difference in , many of these registers need to have different values in CRT mode and LCD mode. The embodiment of the present invention shown in FIG. 1 will be explained by taking as an example a register that determines the total number of horizontal characters and the total number of vertical characters.

Application software 12 sets necessary values in registers in display control circuit l through microprocessor 13. Assuming that the software 12 is for a CRT, the setting value for the CRT is given to the data bus, and the address decoder 17, which inputs the address bus and control bus, generates a write control signal /WRA15 and outputs the horizontal A value is written to pictogram register 4.

According to the set value of this register, the CRT timing generation circuit 10 outputs the horizontal synchronizing signal H3YNC, and the CRT display device 2 is scanned in the horizontal direction.

On the other hand, as is clear from the difference between CRT and LCD mentioned above,
When displaying a CD, horizontal scanning must be performed at twice the frequency. Therefore, the x2 arithmetic circuit 5 doubles the value of the horizontal total character register for CR-T and sets it in the character register 6 for LCDCD. The LCD timing generation circuit 11 generates a horizontal scanning line latch signal LP according to the doubled set value.
output and drive the LCD.

Regarding vertical scanning, since both the CRT and LCD are driven at approximately the same frame frequency, the number of vertical lines in the LCD monitor is 1/2 compared to the CRT mode.

The ±2 arithmetic circuit 8 sets the value of the vertical total character register for CRT, which has been set in the same way as the horizontal timing, in the vertical total character register 9 for 1/2LLCD, and the L is output at a cycle based on this value.
The CD timing generation circuit generates the frame start pulse Y.
Generates D.

As described above, in the display control circuit of the present invention, the CRT display device operates based on the set value of the CRT register, performs necessary calculations on this register value, and sets the (direct) value in the LCD register. , LCD can also be displayed at the same time.

On the other hand, in the conventional display control circuit shown in Fig. 3, a register is shared between CRT mode and LCD mode, and different values are set in the register for each mode to switch which mode the timing generation circuit operates in. Therefore, simultaneous display on CRT and LCD was impossible.

[Effects of the Invention] According to the present invention, the value of the register that determines the display timing of the LCD display device is given as a calculation result using the value of the register that determines the display timing of the CRT display device. Since both timing generation circuits operate simultaneously and simultaneous display can be achieved, black and white display L
Colors that cannot be identified on a CD can be viewed on a CRT color monitor.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a display control circuit according to the present invention. FIGS. 2(a) and 2(b) are diagrams showing the difference between CRT display and LCD display. FIG. 3 is a block diagram of a conventional display control circuit. 1 ・ ・ ・ 2 ・ ・ ・ 3 ・ ・ ・ 4, 7 ・ 5, 8 ・ 6, 9 ・ 10 ・ ・ ・ 1 l ・ ・ ・ Display control circuit CRT display device LCD display device CRT register arithmetic circuit LCD register CRT timing generation circuit LCD timing generation circuit) Cα) Applicant: Seiko Epson Corporation Agent Patent attorney: Kizobe Suzuki (1 person) Figure 2

Claims (1)

[Claims] A display control circuit that has a register that determines display timing and a timing circuit that generates a timing signal according to the value of the register, and that drives a dot sequential scanning type display device and a line sequential scanning type display device using the timing signal. A display control circuit characterized in that the display control circuit includes means for providing a value of a register that determines the timing of a line-sequential scanning type display device as an operation result using the value of the register that determines the timing of the point-sequential scanning type.