JPH0450926U - - Google Patents
Info
- Publication number
- JPH0450926U JPH0450926U JP9352290U JP9352290U JPH0450926U JP H0450926 U JPH0450926 U JP H0450926U JP 9352290 U JP9352290 U JP 9352290U JP 9352290 U JP9352290 U JP 9352290U JP H0450926 U JPH0450926 U JP H0450926U
- Authority
- JP
- Japan
- Prior art keywords
- input
- circuit
- output
- inverter
- flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9352290U JPH0450926U (en:Method) | 1990-09-07 | 1990-09-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9352290U JPH0450926U (en:Method) | 1990-09-07 | 1990-09-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0450926U true JPH0450926U (en:Method) | 1992-04-28 |
Family
ID=31830808
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9352290U Pending JPH0450926U (en:Method) | 1990-09-07 | 1990-09-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0450926U (en:Method) |
-
1990
- 1990-09-07 JP JP9352290U patent/JPH0450926U/ja active Pending
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