JPH0449637A - Integrated circuit - Google Patents

Abstract

PURPOSE:To achieve a macro separation test circuit without increasing wiring between macro blocks by providing a test mode setting circuit for a mega macro block for meeting the requirement of the macro separation test to allow an input edge of the macro to be connected to an output edge directly. CONSTITUTION:In the case of a mega macro separation test mode, M=1 and U=0 result and selectors 74 and 75 select MI input. External input terminals A and D are connected to input terminals in1 and in2 of a mega macro 62 and external output terminals B and C are connected to output terminals out 1 and out 2 of the mega macro 62, thus enabling the mesa macro 62 to be tested independently of a user macro 63. On the other hand, in the case of the user macro separation test mode, M=0 and U=1 result and selectors 74 and 75 select MBI inputs each. The external input terminals A and D are connected to the output terminals out1 and out2 of the user macro 63, the external output terminals B and C are connected to the output terminals out1 and out2 of the user macro 63, and the user macro 63 can be tested completely independently of the mega macro 62.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to integrated circuits, and more particularly to integrated circuits having multiple functional macros.

[Conventional technology]

When testing the internal macro section of an integrated circuit with a standard cell configuration configured by wiring a mega macro and a user macro, set the test mode to connect the input and output terminals of each macro section to the integrated circuit. Each macro section is individually tested by assigning it to an external terminal, applying a signal from the external terminal, and directly observing the output signal from the external terminal.

An implementation example of a conventional macro isolation test circuit will be described below with reference to the drawings.

FIG. 6 shows the circuit before the macro isolation test circuit is applied.

In FIG. 6, 61 is an integrated circuit, 62 is a mega macro, and 6
3 is a user macro, 64 and 67 are external input terminals of the integrated circuit 61, and 65 and 66 are external output terminals of the integrated circuit 61.

In FIG. 6, the output terminal outl of the megamacro 62 is connected to the input terminal inl of the user macro 63, the output terminal out2 of the user macro 63 is connected to the input terminal in2 of the megamacro 62, and the input terminal inl and the output terminal out2 of the megamacro 62 are connected. are connected to external terminals 64 and 65, respectively, and the input terminal in2 and output terminal outl of the user macro 63 are connected to external terminals 67 and 66, respectively.

FIG. 7 shows an equivalent circuit obtained by applying a macro isolation test circuit to FIG. 6.

In FIG. 7, 71 is an integrated circuit; 72 and 73 are two-man power one-output selectors that select the signal on the UI input side when U=1, and the signal on the UBI input side when U=0, and output it to the O terminal; 74 and 75 are two-man power, one-output selectors that select the Ml input river signal when M.multidot.1 and select the MHI input side signal when M=O, and output the selected signal to the 0 terminal. However, in the figure, selector control signals M and U are omitted.

First, in Figure 7, when not in macro separation test mode,
That is, the operation in the normal mode will be explained.

When not in macro isolation test mode, U・0 and M=
It is assumed that it is set to 0. At this time, the selector 72
and 73 select the UBI input, and selectors 74 and 75 select the MBI input, so it can be seen that FIG. 7 logically matches FIG. 6.

Next, the operation of the macro separation test will be explained with reference to FIG.

First, the megamacro separation operation will be explained. In the mega macro separation test mode, assuming that U=0 and M.1, selectors 72 and 73 select the UBI input, and selectors 74 and 75 select the MI large input.

At this time, the input terminals inl and in2 of the megamacro 62 are directly coupled to the external terminals 64 and 67, respectively, and the output terminals outl and out2 of the megamacro 62 are directly coupled to the external terminals 66 and 65, respectively. can be tested completely independently.

Finally, the user macro separation operation will be explained. In the user macro separation test mode, assuming that U=1 and M=0 are set, selectors 72 and 73 select the tJI input, and selectors 74 and 75 select the MBI input, respectively.

At this time, the input terminals inl and in2 of the user macro 63 are connected to external terminals 64 and 67, respectively, and the output terminals outl and out2 of the user macro 63 are connected to external terminals 66 and 65, respectively.
The user macro 63 can be tested completely independently of the mega macro 62.

Next, a method for mask layout of an integrated circuit having a macro separation test function realized as described above on a semiconductor substrate will be described below.

Generally, when performing a mask layout for an integrated circuit composed of a plurality of macros, a method is used in which each macro is laid out independently and then the terminals of each macro block are wired.

When mask layouting the circuit shown in Figure 7 according to this method, the test mode setting circuit added to Figure 6 is incorporated into the user macro layout block because it is a simple selector circuit. .

That is, the mask layout is realized by wiring the terminals of the mega macroblock and the user macroblock including the test mode setting circuit.

FIG. 8 shows a rewritten diagram in which the test mode setting circuit section of FIG. 7 is incorporated into a user macroblock. 81 is a user macroblock including a selector as a test mode setting circuit.

In Figure 8, the number of wires between the mega macro 62 and the user macro block 81 has increased to four in total, compared to two wires between the macros 62 and 63 in Figure 6, which does not have a test mode setting circuit. It shows that

[Problem to be solved by the invention]

The above-described conventional integrated circuit has the disadvantage that the number of interconnections between macroblocks increases in order to perform a macro isolation test, resulting in an increase in chip area.

Moreover, the output out2 of the mega macro 62 in FIG.
In order to add a test mode setting circuit for macro separation into the user macro block 81, it is output to the external output terminal 65 after passing through the input In3 of the user macro 81. [Means for Solving the Problem] The integration of the present invention has the disadvantage that a significant wiring delay is involved in terms of signal propagation compared to the case where the output out2 is directly output to an external terminal. The circuit is mask laid out in advance as a large-scale standard functional block on a semiconductor substrate, and multiple test modes are set in which one of the input terminal or the corresponding output terminal of the internal mega-macro section is selected and connected to the block output terminal. A mega macroblock having a circuit and a plurality of cells as a large-scale user function block are connected in combination, and one of the input end or the corresponding output end of the internal user macro block is selected and connected to the block output terminal. and a user macroblock having a plurality of test mode setting circuits.

Further, in the integrated circuit of the present invention, the test mode setting circuit is the first one of the mega macro section and the user macro section, respectively. One of the second input terminal and the output terminal is selected and connected to the corresponding block output terminal.

〔Example〕

Next, the configuration and operation of the present invention will be explained using the drawings.

A basic block diagram of a first embodiment of the present invention is shown in FIG.

The megamacro block 1 connects the first and second output terminals outl and o of the megamacro 62 of the conventional integrated circuit 61 of FIG.
This is a standard layout block in which ut2 includes selectors 72 and 73, respectively.

The operation of the mega macro 62 in the test mode will be explained below.

First, when U is set to 1 in the user macro separation test mode, the selectors 72 and 73 select the Ul input, so the input terminal 1n of the mega macro block 1 is
l is directly connected to the block 1 output terminal 0utl, and the block 1 input terminal In2 is directly connected to the block 1 output terminal 0utl.
It will be directly connected to 2.

On the other hand, when the user macro is in a mode other than the macro separation test mode, for example, in the mega macro separation test mode or in the system mode which performs the original operation other than the test mode, U=
If set to 0, selector 72.73 is U
Since the BI input is selected, the input terminal 1nl of the megamacro block 1 becomes the input terminal inl of the megamacro 62, and the block 1 input terminal In2 becomes the input terminal i of the megamacro 62.
n2, and output terminal 0utl of block 1 is connected to output terminal outl of mega macro 62, and output terminal 0 of block 1 is connected to output terminal 0utl of block 1.
ut2 is connected to the output terminal out2 of the megamacro 62, which indicates that the megamacro block 1 has the same function as the megamacro 62.

Next, an integrated circuit 7 having the mega macroblock 1 of the present invention
A block diagram of 1 is shown in FIG.

In FIG. 2, 21 is a user macro including a test mode setting circuit.

First, the macro separation test operation in FIG. 2 will be explained.

First, the megamacro separation operation will be explained.

In the mega-macro separation test mode, M=1 and U=O, and selectors 74 and 75 respectively select the MI large input.

Therefore, external input terminals A and D of integrated circuit 71 are input terminals inl of megamacro 62 in FIG. 2, respectively.

The external output terminals B and C of the integrated circuit 71 are connected to the output terminals outl and out2 of the megamacro 62 shown in FIG. Can be tested independently.

On the other hand, in user macro separation test mode, M=0 and U
=1, and selectors 74 and 75 select the MBI input, respectively. Therefore, the external input terminals A and D of the integrated circuit 71 are the input terminals inl and inl of the user macro 63, respectively.
in2, and the external output terminals B and C of the integrated circuit 71 are respectively connected to the output terminal out of the user macro 63.
1 and out2, the user macro 63 can be tested completely independently of the mega macro 62.

As explained above, it can be seen that the integrated circuit 71 has a macro isolation test function.

Next, the mask layout of the integrated circuit 71 in FIG. 2 will be described.

The test circuit added to the user macro 63 in FIG. 2 is incorporated into the user macro layout block because it is a small scale circuit.

In other words, selector 74.7 is used as a test mode setting circuit.
The user macroblock 21 is configured to include 5.

Therefore, the mask layout of the integrated circuit 71 consists of a mega macroblock 1 and a user macroblock 2 including a test circuit.
This will be realized by wiring the terminals with 1.

As is clear from FIG. 2, there are two wires between macro blocks 1 and 21, which is the same as the inter-block wires in FIG. 6 before the separation test mode circuit is provided.

Next, a second embodiment of the present invention will be described.

FIG. 3 is a basic block diagram of a second embodiment of the invention.

The mega macro block 31 is the output terminal o of the mega macro 62.
This is a standard layout block in which three manual selectors 32 and 33 are added to utl and out2.

In FIG. 3, 32 and 33 are selectors with three manual outputs, which select the Tll input signal when the test mode signal T1=1, the T2I input signal when the test mode signal T2=1, and the test mode signal N. - When set to 1, the NI large input signal is output to the O terminal. However, in the figure, the selector control signals TI, T2 . N is omitted.

Below are 31 mega macros in each test mode.
Summarize the operation.

When T1=1...31 input terminal Inl is directly connected to output terminal Outl, input terminal In2 is directly connected to output terminal 0ut2 When T2=1...31 input terminal Inl is output When N=1, in which the input terminal In2 is directly connected to the single type 0ut2, and the input terminal In2 is directly connected to the output terminal 0utl... 31 is functionally the same as the mega macro 62. In FIG. 4, the macro separation test circuit is not applied. A block diagram of an integrated circuit is shown.

In FIG. 4, 41 is an integrated circuit before being subjected to a macro isolation test circuit.

FIG. 4 shows that the output terminal 0ut2 of the megamacro 62 is connected to the input terminal inl of the user macro 63, the output terminal out2 of the user macro 63 is connected to the input terminal in2 of the megamacro 62, and the input terminal inl and the output terminal outl of the megamacro 62 are connected to each other. are connected to the input terminal in2 and output terminal outl of the user macro 63 to the external terminals A and B of the integrated circuit 41, respectively.
are connected to external terminals C and C of the integrated circuit 41, respectively.

Next, FIG. 5 shows a circuit in which a macro isolation test function is realized for the integrated circuit of FIG. 4 using the present embodiment of FIG. 3.

In FIG. 5, numeral 51 is an integrated circuit that realizes a macro separation test function, and 52 is a user macro block that includes a test mode setting circuit.

First, it will be explained that FIG. 5 coincides with the logic point in FIG. 4 when the macro isolation test mode is not in effect.

When not in macro isolation test mode, N=1 and M=
If set to 0, megamacroblock 31
is functionally equivalent to megamacro 62 and selectors 74 and 75
selects each MBI input, so it can be seen that FIG. 5 logically matches FIG. 4 at this time.

Next, the macro separation test operation in FIG. 5 will be explained.

First, the megamacro separation operation will be explained. When in megamacro isolation test mode, assuming N=1 and M=1, megamacro block 31 is functionally matched to megamacro 62, and selectors 74 and 75 select the Ml inputs, respectively. Therefore, the external input terminals A and D of the integrated circuit 51 are respectively connected to the input terminals inl and in2 of the mega macro 62 in FIG.
External output terminals B and C are respectively mega macro 6 in Figure 1.
Since the mega macro 62 is connected to the output terminals outl and out2 of the user macro 63, the mega macro 62 can be tested completely independently of the user macro 63.

On the other hand, in user macro separation test mode, T2=1
And if M is set to 0, the input terminal Inl of the mega macro block 31 is directly connected to the output terminal 0ut2, the input terminal In2 is directly connected to the output terminal 0UTI, and the selectors 74 and 75 select the MHI input, respectively. Therefore, the external input terminals A and D of the integrated circuit 71 are respectively connected to the input terminals inl and in2 of the user macro 63 in FIG. 0utl, 0utl
2, so user macro 6
3 can be tested completely independently of the mega macro 62.

As explained above, it can be seen that the integrated circuit 51 has a macro isolation test function.

Next, the mask layout of the integrated circuit 51 shown in FIG. 5 will be described. The test circuit added to the user macro 63 in FIG. 5 is a small-scale circuit, so it is incorporated into the layout block of the user macro.

That is, the user macroblock 52 is configured to include a test mode setting circuit.

Therefore, the mask layout of the integrated circuit 51 wires the terminals of the mega macroblock 31 and the user macroblock 51 including the test mode setting circuit.

As is clear from FIG. 5, macroblocks 31 and 51
There are two wires between them, and this is the fourth wire before the test circuit is applied.
It can be seen that this is the same as the inter-block wiring in the figure.

〔Effect of the invention〕

When the mega-macro block of the present invention is used, the mega-macro block is equipped with a test mode setting circuit to support macro separation tests, and has the function of directly connecting the input end of the macro to the output end. It is possible to realize a macro isolation test circuit without increasing the number of wiring lines, and it is also possible to minimize the increase in chip size due to the implementation of the macro isolation test circuit within the macro block and the increase in signal delay due to wiring. There is an effect.

FIG. 5 is a block diagram of the second embodiment of the present invention; FIG. 6 is a block diagram of the integrated circuit before macro isolation test circuit is applied; FIG. FIG. 7 is a block diagram of an example of a conventional integrated circuit, and FIG. 8 is a layout block diagram in which the test mode circuit section of FIG. 7 is provided in a user macroblock.

1.31...mega macroblock, 21.51...
User macroblock, 32, 33. 72-75...
Selector, 51. 61... Integrated circuit, 62... Mega macro, 63... User macro.

Claims (1)

[Claims] 1. A large-scale standard functional block is laid out in advance as a mask on a semiconductor substrate, and one of the input terminal or the corresponding output terminal of the internal mega-macro section is selected and connected to the block output terminal. A mega-macro block having a plurality of test mode setting circuits and a plurality of cells as a large-scale user function block are connected in combination, and one of the input end or the corresponding output end of the internal user macro block is selected. and a user macroblock having a plurality of test mode setting circuits connected to block output terminals. 2. The test mode setting circuit selects one of the first and second input terminals and output terminals of the mega macro section and the user macro section, respectively, and connects it to the corresponding block output terminal. An integrated circuit according to claim 1.