JPH044662A - Driving signal generator - Google Patents

Abstract

PURPOSE:To vary only a frequency of a scanning signal independently of the frequency of a sensor driving signal by controlling a scanning signal generating means with a master clock signal and controlling a sensor driving signal generating means with a delay signal resulting from retarding the master clock signal. CONSTITUTION:Upon the receipt of a trigger signal Tr and a master clock signal CLK, a scanning signal generating circuit 1 uses the trigger signal Tr to generate a start signal phiS and frequency-divides and inverts the master clock signal CLK to generate scanning signals phi1, phi2. When the frequency of the scanning signals phi1, phi2 is desired to be varied, the frequency of the master clock signal CLK has only to be varied. On the other hand, a delay circuit 2 consists of a circuit comprising a capacitor and a resistor to retard an input signal by a prescribed time only and the circuit outputs delayed outputs D1-D6 resulting from the inputted master clock signal CLK retarded by respective times.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive signal generating device, and particularly to a sensor drive signal generating means for generating a control signal for driving a photoelectric conversion sensor, and a sensor drive signal generating means for generating a control signal for driving a photoelectric conversion sensor. The present invention relates to a drive signal generation device having a scanning signal generation means for generating a control signal for outputting a photoelectrically converted signal.

[Background Art] Among photoelectric conversion elements, there is an amplification type photoelectric conversion element that amplifies and extracts a photoelectrically converted signal.

FIG. 3 is a circuit configuration diagram showing an equivalent circuit of an amplification type photoelectric conversion element and a part of a signal readout circuit.

In the figure, 31, 32, 33 is a sensor bipolar which accumulates photoelectric charges at the base and extracts a signal from the emitter, and 34, 35, 36 is a sensor bipolar, 31, 32, .
33 is selected, n-type MO3) transistor for extracting the signal, 28.29.30 is the sensor bipolar 31,
32. A p-type MOS transistor for resetting the bases of 33 to the reset voltage VM, 37 an output line, 38 an n-type MOS transistor for resetting the output line 37 to GND, 21 a shift register, 22, 23 . 24
is controlled ON and OFF by the output signal of the shift register 21, and the signal φ■ is connected to the p-type MOS transistors 28 and 29.
．． The n-type MOS transistors 25, 26, and 27 that are supplied to the gate of 30 are ON/OFF controlled by the output signal of the shift register 21, and the signal
This is an n-type MOS transistor that supplies the gates of transistors 34, 35, and 36.

Further, in the figure, φ3 is a start signal for starting the operation of the shift register 21, φ1. φ2 is a signal φ that operates the shift register 21. is sensor bipolar 31
．． The reset signal of the base of 32.33, φ is the readout signal for reading out the sensor bipolar 31, 32.33, ■, is the base reset voltage of the sensor bipolar 31, 32.33, φ0 is the reset signal of the output line 37 This is the signal to proceed.

To drive the amplification type photoelectric conversion element as shown in FIG. 3, for example, the drive signal φ8. φ1. φ2. φRB.

It is sufficient to apply φRE and φ0.

As shown in FIG. 4, at time t1, signal φ1 goes high.
When the level is reached, the n-type MOS transistors 22 and 25 are turned on, and the signal φ. 8. The signal φ8° is n
type MOS transistor 28. n-type MOS transistor 3
The threads are joined together at gate No. 4.

Next, from time t2 to time t3, signal φ11E7bS
When the level becomes H level, the gate of the n-type MO3I transistor 34 becomes H level through the n-type MO3I transistor 25, and the signal applied to the emitter of the sensor bipolar 31 is outputted to the output line 37.

Next, from time t4 to time t, when the signal φ, 1B goes to the L level, the gate of the n-type MOS transistor 28 goes to the L level through the n-type MOS transistor 22, and the base of the sensor bipolar 31 is reset to the reset voltage be done.

Next, from time t to time t7, the signal φ□.

signal φ. When becomes H level, sensor bipolar 31
The emitter of and output line 37 are reset to GND.

After time f, the sensor bipolar 31 accumulates the optical signal until it is read out next time.

At time t8, the sensor bipolar 32 is selected,
Operations similar to those described above are performed.

At time t9, sensor bipolar 33 is selected and the same operation as described above is performed. Such an operation is repeated every time the signal φ3 becomes H level.

Incidentally, in recent years, as the number of applied products of photoelectric conversion elements has increased, the number of cases where it is desired to use the same photoelectric conversion element by changing only the scanning frequency has increased.

Drive signals for the amplification type photoelectric conversion element and signal readout circuit as shown in FIG. 3 are generated by inputting the master clock signal CLK and trigger signal Tr as shown in FIG. 7 to the drive signal generation circuit 40 as shown in FIG. I was letting it happen. In this case, the frequencies of all the drive signals change in the same way depending on the frequency of the master clock signals C and LK, so the scanning signals (φ3.φ1
．． If you try to use it by changing the frequency of φ2), the sensor drive signal (φ□, φ□) will affect the characteristics of the sensor.

φ0), and sufficient sensor characteristics could not be obtained.

Therefore, like the drive signal generation circuit shown in FIG. 6, there is a scanning signal generation circuit 51 that generates a scanning signal that does not affect the characteristics of the sensor, and a sensor drive signal that generates a sensor drive signal that affects the characteristics of the sensor. By providing a generation circuit 52 and using a master clock signal CLKA input to the scanning signal generation circuit 51, a master clock signal CLKB input to the sensor drive signal generation circuit 52, and a synchronization signal φ8, sufficient sensor characteristics can be obtained. A method was proposed in which the scanning frequency was changed after the

[Problems to be Solved by the Invention] However, the drive signal generation circuit shown in FIG. 6 above requires two master clock signals even when the sensor drive signal can be kept constant, leading to an increase in the number of external circuits. Therefore, improvements are desired, and if the master clock signal has a low frequency due to the system using the photoelectric conversion element, the sensor drive signal must be generated in the non-etched part of the master clock signal. Therefore, there has been a desire for a drive signal generation device that can deal with such cases.

[Means for Solving the Problems] A drive signal generation device of the present invention includes a sensor drive signal generation unit that generates a control signal for driving a photoelectric conversion sensor, and outputs a photoelectrically converted signal from the photoelectric conversion sensor. In a drive signal generation device having a scanning signal generation means for generating a control signal for scanning, the scanning signal generation means is controlled by a master clock signal, and the sensor drive signal generation means is configured to delay the master clock signal. It is characterized by being controlled by a delayed signal.

[Function] The present invention controls the scanning signal generation means by a master clock signal and the sensor drive signal generation means by a delay signal obtained by delaying the master clock signal, thereby achieving a frequency independent of the sensor drive signal. Therefore, only the frequency of the scanning signal can be changed, and the sensor drive signal can also be generated in the edgeless portion of the master clock signal.

[Example] Hereinafter, an example of the present invention will be described in detail using the drawings.

FIG. 1 is a schematic diagram of an embodiment of a drive signal generating device of the present invention.

In the figure, 1 is a scanning signal generation circuit that is a scanning signal generation means for scanning a shift register, 2 is a delay circuit that delays an input signal by a certain period of time, and 3 is a sensor drive signal for reading a signal from a photoelectric conversion sensor. A sensor drive signal generation circuit is a generating means, Tr is a trigger signal, CLK is a master clock signal, φY is a start signal for starting the operation of the shift register, φ1. φ2 is a scanning signal for scanning the shift register, φR11 is a base reset signal for resetting the base of the sensor bipolar, and φRE is a read signal for reading the sensor bipolar, φ. is a reset signal for resetting the output line, and D1 to D6 are master clock signals CL.
These are the delayed outputs of the delay circuit 2 in which K is delayed by a certain period of time.

In the drive signal generation device having the above configuration, the trigger signal Tr
, the master clock signal CLK is input, the scanning signal generating circuit 1 generates the start signal φ8 from the trigger signal Tr, and also inverts the master clock signal CLK by frequency division 1 to generate the scanning signal φ1 . Generate φ2.

Therefore, the scanning signal φ1. If it is desired to change the frequency of φ2, the frequency of master clock signal CLK may be changed.

On the other hand, the delay circuit 2 is composed of, for example, a circuit consisting of a capacitor and a resistor, and is a circuit that delays an input signal by a certain period of time and outputs it. When the master clock signal CLK is input as an input, a delayed output D1 which is delayed by a certain period of time, respectively. ~D
Outputs 6.

FIG. 2 is a timing chart showing an example of these timings.

In the figure, when the delayed outputs, ~D, are input to the sensor drive signal generation circuit 3, the rising edge of, for example, D is used to generate a reset signal φ. occurs.

Similarly, some of the delayed outputs DI to D6 can be used to generate the base reset signal φ□ and the read signal φ□. Therefore, the signal φ,.

φI, φ. The timing signal width of is determined only by the delay circuit 2 and does not depend on the frequency of the master clock signal CLK.

Although a bipolar amplification type photoelectric conversion element is used in the embodiments described above, the present invention can be applied to other types of sensors or area sensors.

[Effects of the Invention] As explained above, according to the present invention, if the scanning signal is generated by a master clock signal and the sensor drive signal is generated by a delayed signal obtained by delaying the master clock signal, the frequency of the master clock signal can be increased. In other words, it is possible to change the frequency of the scanning signal while keeping the sensor drive signal constant.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of an embodiment of a drive signal generating device of the present invention. FIG. 2 is a timing chart of an example of the drive signal generating device. FIG. 3 is a circuit configuration diagram showing an equivalent circuit of an amplification type photoelectric conversion element and a part of a signal readout circuit. FIG. 4 is a timing chart for explaining the equivalent circuit of the amplification type photoelectric conversion element and the operation of the signal readout circuit. FIG. 5 is a schematic configuration diagram showing an example of a conventional drive signal generating device. FIG. 6 is a schematic configuration diagram showing another example of a conventional drive signal generating device. FIG. 7 is a timing chart for explaining the operation of the drive signal generator shown in FIG. 5. In the figure, 1 is a scanning signal generation circuit, 2 is a delay circuit, and 3 is a sensor drive signal generation circuit. Agent Patent Attorney Seki Yamashita Children 1 Figure 3 Figure 2 Figure 4 Figure 5

Claims (1)

[Claims] (1) A sensor drive signal generating means for generating a control signal for driving a photoelectric conversion sensor, and a scanning signal generating means for generating a control signal for output scanning a photoelectrically converted signal from the photoelectric conversion sensor. A drive signal generation device comprising: The scanning signal generation means is controlled by a master clock signal, and the sensor drive signal generation means is controlled by a delay signal obtained by delaying the master clock signal.