JPH044624B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] The present invention is a signal processing device that performs regression calculation of a function of an arbitrary order on a signal, in which the analysis interval length of a parameter is determined, and the regression calculation is performed by shifting the analysis interval according to the method of increasing the parameter. In order to solve the problem of a huge amount of calculation when performing By integrating the difference, the amount of calculation is dramatically reduced.

[Industrial application field]

The present invention relates to a circuit that performs function regression calculation of data using the least squares method while moving an analysis interval.

For example, a tissue characterization device that uses ultrasound to diagnose tissue in a living body emits an ultrasound signal, receives the reflection, and analyzes the received ultrasound signal in order to diagnose the living body in real time. Displays an image of the acoustic characteristics of a living body, etc.

A moving least squares function regression calculation is used for this analysis, and a least squares function regression calculation (finding the function that minimizes the sum of squares of errors) is performed for each fixed interval of measured values that change due to noise components. Find the coefficients of the theoretical function and display them on an image.

In this case, since the moving least squares function regression calculation requires a huge amount of calculation, there is a possibility that it will not be possible to follow the movement of the living body.

In ultrasonic diagnostic equipment, for example, ultrasonic signal
It is necessary to process signals with a short period of about 200 μsec at high speed. Therefore, there is a need for a calculation circuit that can easily perform moving least squares function regression calculations and can perform high-speed processing.

[Conventional technology]

For simplicity, the input signal y is assumed to be a discrete time signal obtained by sampling measurement values at equal time intervals, and time t ₀ ,
The input signal values at t ₁ , t ₂ , t ₃ ...t _j ... are y ₀ , y ₁ ,
Let y ₂ , y ₃ …y _j ….

Here, the _n-th order time function is subjected to least squares regression on m pieces of data in the interval _{t 0} ≦t≦t n-1.

First, it is assumed that the n-dimensional time function for time t can be expressed as shown in the following equation.

y=a _o t ⁿ +a _o-1 t ^n-1 +...+a ₂ t ² +a ₁ t+a ₀ , that is, y= _o 〓 ⁱ⁼⁰ a _i t ⁱ (Formula 1), then the input signal value y _j and the value of (Formula 1) at time t _j , summed up in the interval t ₀ ≦ t _j ≦ t _n-1 ,
That is, the sum E of regression square errors of the signal is as follows.

E= _n-1 〓 ^j=0 (y _j − _o 〓 ⁱ⁼⁰ a _i t _j ⁱ ) ^2Here , the condition for minimizing this E is ∂E/∂a _p = 0 (p= 0, 1,..., n), the matrix of solutions to this conditional expression is shown in the following equation. Then, by solving the following equation, (Equation 1)
The coefficient a _p (p=0, 1,..., n) can be found.

For example, if n=1, the time function is y=a ₁ t
+a ₀ , and its coefficients a ₁ and a ₀ are as shown in the following equation.

Here, since the coefficients for the analysis interval t ₀ ≦t≦t _n-1 have been found, the coefficients for t ₁ ≦t≦t _n , in which this analysis interval is shifted by one data, are found by the same procedure.

Furthermore, the analysis interval t ₂ ≦t is shifted by one data.
By repeatedly calculating the procedure for determining coefficients for ≦t _n+1 , coefficients are determined moment by moment with respect to time t.

[Problem that the invention seeks to solve]

When the coefficients are determined using the above method, m additions regarding the symbol Σ are required in order to obtain each element of the determinant in each analysis interval.

Therefore, the amount of calculation becomes enormous, and it is difficult to process this calculation in real time and display the measurement image.

Furthermore, if multiple processing devices are used to perform parallel processing to increase speed, there is a problem in that the amount of hardware will inevitably increase.

[Means for solving problems]

The above problem is solved by a width multiplication circuit that obtains a power value of a parameter corresponding to a plurality of signal levels to the power of n, and a width multiplier circuit that obtains a product of each signal level and a power value of the parameter corresponding to that signal level. a multiplier; a delay circuit that sequentially delays the output data of each of the circuits as input data for a predetermined period of time; a subtraction circuit that obtains an output of the difference between the input data and the output of the delay circuit; and a subtraction circuit that integrates the output of the subtraction circuit. The problem is solved by the moving least squares function regression circuit of the present invention, which is equipped with an integrating circuit.

[Effect]

If the coefficient of the k-th time function in the analysis interval t _j ≦t≦t _n-1+j is a _kj (k=0, 1, 2...n), Here, if t _-i = 0 (i = 1, 2, 3, ...), the elements on the left side are found as follows.

However, m is the number of data in the analysis interval, and assuming j>0, _n-1+j 〓 ^i=j t _i ^k = _n-1+j 〓 ⁱ⁼⁰ t _i ^k − _j-1 〓 ⁱ⁼⁰ t _i ^k = _n-1+j 〓 ⁱ⁼⁰ t _i ^k − _n-1+j 〓 ^i=m t _in ^k = _n-1+j 〓 ⁱ⁼⁰ t _i ^k − _n-1+j 〓 ^{i =0} t _in ^k = _n-1+j 〓 ⁱ⁼⁰ (t _i ^k −t _in ^k ) (Equation 2) Similarly, the elements on the right side can be found using the following equation. _n-1+j 〓 ^i=j t _i ^k = _n-1+j 〓 ⁱ⁼⁰ (y _i t _i ^k −y _in t _in ^k ) (Equation 3) From this, in each analysis interval, (Equation 2, 3)
By integrating the difference between the input and output of the delay circuit in which m samplings of t _i ^k or y _i t _i ^k are delayed, the elements of the matrices on the left and right sides are found.

The right side of (Equation 2) is t _i ^k and m as j increases.
This represents the accumulation of the differences in t _in ^k before sampling.

Therefore, conventionally, in order to obtain each element in each analysis interval, m additions were required as indicated by the symbol Σ, but with the present invention, it can be done with one subtraction and one addition. Each element can be found.

〔Example〕

An embodiment of the present invention is shown in FIGS. 1 and 2. FIG.

Referring to FIG. 1, the overall data flow will be explained.

The width multiplier 2 converts the time t _j from the time generation circuit 1 synchronized with the input data y _j to t _j ^k (k=2, 3, 4...
2n).

Also, the product of the output of width multiplier circuit 2 and y _j is multiplier 3
and input the above data to the analysis interval summation circuit 4.

The constant setter 5 stores a constant m (the number of data within the analysis interval).

As a result, the elements of the determinant are determined, and the coefficient calculation circuit 6 solves the determinant to obtain each coefficient of the moving least squares function.

Next, the analysis interval summation circuit 4, which is the central idea of this patent, will be explained using FIG.

Although there are many inputs to the analysis interval summation circuit 4,
Focusing on t _j ^k , the input t _j ^k is m by the delay circuit 7.
The sample delay, t _jn ^k , is obtained.

The difference between the input and output of this delay circuit is determined by the subtraction circuit 8 and accumulated by the integration circuit 9, thereby obtaining the value of the element of the determinant at time m-1 before, _j 〓 ^i=j-m+1 t Find _i ^k . In this way, at time t _j , t _j-n+1 ≦t
Coefficients of analysis interval of ≦t _j , i.e. a _0(j-n+1) , a _1(j-n+1) ,
We can find a _2(j-n+1) , ..., a _o(j-n+1) .

Even if the input is y _i t _i ^k , the analysis interval summation circuit 4
can be calculated similarly.

Note that the delay circuit 7 is constructed of a delay line made of an inductance element, a charge coupled device (CCD), a flip-flop, or the like.

In addition, the subtraction circuit 8 includes a differential amplifier or
An adder circuit used for digital calculations is used.

As the integrating circuit 9, a circuit consisting of an operational amplifier and a capacitor can be used.

An accumulator can be used in the integration circuit 9.

In addition, the reference parameters are weighted, e.g.
A weight q is added to t ⁿ to give qt ⁿ or qyt ⁿ , which is used to improve the regression accuracy of the least squares function in measurement analysis.

It goes without saying that the parameters and input signals have a one-to-one correspondence and are in a uniquely determined relationship.

〔Effect of the invention〕

According to the present invention, computations that conventionally required m additions can now be completed with one subtraction and one addition, which has the advantage of reducing hardware and requires a moving least squares function for data. Regressions are processed quickly.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the configuration of an embodiment of the moving least squares function regression circuit of the present invention, and FIG. 2 is a block diagram of an analysis interval summation circuit. In the figure, 1 is a time generation circuit, 2 is a width multiplication circuit, 3 is a multiplier, 4 is an analysis interval summation circuit, 5 is a constant m setter, 6 is a coefficient calculation circuit, 7 is a delay circuit, and 8 is a subtraction circuit , 9 indicates an integrating circuit.

Claims (1)

[Scope of Claims] 1. A circuit for calculating a moving least squares function regression of a signal level with respect to a specific parameter serving as a reference for signal change, comprising means (2) for obtaining a power value of the parameter; means (3) for obtaining the product of the signal level and the exponent value of the parameter corresponding to the parameter; and delay means (7) for sequentially delaying the data obtained by each of the means by a predetermined time as input data. A subtraction means (8) for obtaining an output of the difference between the input data and the data obtained by the delay means (7), and an integration means (9) for integrating the output of the subtraction means (8). A moving least squares function regression circuit characterized by: