JPH0444734U - - Google Patents

Info

Publication number
JPH0444734U
JPH0444734U JP8780290U JP8780290U JPH0444734U JP H0444734 U JPH0444734 U JP H0444734U JP 8780290 U JP8780290 U JP 8780290U JP 8780290 U JP8780290 U JP 8780290U JP H0444734 U JPH0444734 U JP H0444734U
Authority
JP
Japan
Prior art keywords
recorded
frequency
turned
rom
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8780290U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8780290U priority Critical patent/JPH0444734U/ja
Publication of JPH0444734U publication Critical patent/JPH0444734U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Circuits Of Receivers In General (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案によるテレビ受信装置のブロツ
ク図、第2図は動作を説明するフロー図である。 10……バツテリー電源(バツクアツプ電源)
、20……マイクロコンピユータ、21……制御
部、23……PLL回路、25……RAM、26
……ROM、27……停電検出回路。
FIG. 1 is a block diagram of a television receiving apparatus according to the present invention, and FIG. 2 is a flow diagram illustrating its operation. 10...Battery power supply (backup power supply)
, 20...Microcomputer, 21...Control unit, 23...PLL circuit, 25...RAM, 26
...ROM, 27...Power failure detection circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 予め定められた放送局の周波数が記録されたR
OMと、プリセツトチヤネルに任意に設定される
周波数が記録されるRAMと、バツクアツプ電源
が切られたか否かを検出する停電検出回路と、電
源投入時に停電検出回路によつてバツクアツプ電
源が切られていたことが検出されると、ROMに
記録されている周波数をRAMに書き込む制御手
段と、を有することを特徴とするプリセツトチヤ
ネル式PLL受信装置。
R on which the frequency of a predetermined broadcasting station is recorded
OM, a RAM in which the frequency arbitrarily set to the preset channel is recorded, a power failure detection circuit that detects whether the backup power supply is turned off, and a power failure detection circuit that detects whether the backup power supply is turned off when the power is turned on. 1. A preset channel type PLL receiving device, comprising: control means for writing a frequency recorded in a ROM into a RAM when it is detected that the frequency has been recorded in the ROM.
JP8780290U 1990-08-21 1990-08-21 Pending JPH0444734U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8780290U JPH0444734U (en) 1990-08-21 1990-08-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8780290U JPH0444734U (en) 1990-08-21 1990-08-21

Publications (1)

Publication Number Publication Date
JPH0444734U true JPH0444734U (en) 1992-04-16

Family

ID=31820487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8780290U Pending JPH0444734U (en) 1990-08-21 1990-08-21

Country Status (1)

Country Link
JP (1) JPH0444734U (en)

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