JPH044431U - - Google Patents
Info
- Publication number
- JPH044431U JPH044431U JP4614490U JP4614490U JPH044431U JP H044431 U JPH044431 U JP H044431U JP 4614490 U JP4614490 U JP 4614490U JP 4614490 U JP4614490 U JP 4614490U JP H044431 U JPH044431 U JP H044431U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor integrated
- integrated circuit
- transistor
- mos transistor
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4614490U JPH044431U (de) | 1990-04-26 | 1990-04-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4614490U JPH044431U (de) | 1990-04-26 | 1990-04-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH044431U true JPH044431U (de) | 1992-01-16 |
Family
ID=31560964
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4614490U Pending JPH044431U (de) | 1990-04-26 | 1990-04-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH044431U (de) |
-
1990
- 1990-04-26 JP JP4614490U patent/JPH044431U/ja active Pending