JPH044405U - - Google Patents

Info

Publication number
JPH044405U
JPH044405U JP4436390U JP4436390U JPH044405U JP H044405 U JPH044405 U JP H044405U JP 4436390 U JP4436390 U JP 4436390U JP 4436390 U JP4436390 U JP 4436390U JP H044405 U JPH044405 U JP H044405U
Authority
JP
Japan
Prior art keywords
signal lines
transmission line
dielectric layer
ground layer
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4436390U
Other languages
English (en)
Japanese (ja)
Other versions
JP2603022Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990044363U priority Critical patent/JP2603022Y2/ja
Publication of JPH044405U publication Critical patent/JPH044405U/ja
Application granted granted Critical
Publication of JP2603022Y2 publication Critical patent/JP2603022Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Waveguides (AREA)
JP1990044363U 1990-04-25 1990-04-25 プリント基板伝送路 Expired - Lifetime JP2603022Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990044363U JP2603022Y2 (ja) 1990-04-25 1990-04-25 プリント基板伝送路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990044363U JP2603022Y2 (ja) 1990-04-25 1990-04-25 プリント基板伝送路

Publications (2)

Publication Number Publication Date
JPH044405U true JPH044405U (US20090163788A1-20090625-C00002.png) 1992-01-16
JP2603022Y2 JP2603022Y2 (ja) 2000-02-14

Family

ID=31557597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990044363U Expired - Lifetime JP2603022Y2 (ja) 1990-04-25 1990-04-25 プリント基板伝送路

Country Status (1)

Country Link
JP (1) JP2603022Y2 (US20090163788A1-20090625-C00002.png)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011082525A (ja) * 2009-10-12 2011-04-21 Internatl Business Mach Corp <Ibm> セラミック・パッケージならびにセラミック・パッケージ内の結合ノイズを低減し、インピーダンス不連続を制御するための方法およびコンピュータ・プログラム(高速セラミック・モジュールにおけるノイズ結合低減およびインピーダンス不連続制御)
JP2013510407A (ja) * 2009-11-06 2013-03-21 モレックス インコーポレイテド 多層回路部材とそのためのアセンブリ
JP2013089841A (ja) * 2011-10-20 2013-05-13 Kyocer Slc Technologies Corp 配線基板
JPWO2021182157A1 (US20090163788A1-20090625-C00002.png) * 2020-03-11 2021-09-16
WO2023037852A1 (ja) * 2021-09-07 2023-03-16 株式会社村田製作所 多層基板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56158502A (en) * 1980-05-12 1981-12-07 Junkosha Co Ltd Strip line
JPS57143901A (en) * 1981-02-27 1982-09-06 Junkosha Co Ltd Strip line

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56158502A (en) * 1980-05-12 1981-12-07 Junkosha Co Ltd Strip line
JPS57143901A (en) * 1981-02-27 1982-09-06 Junkosha Co Ltd Strip line

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011082525A (ja) * 2009-10-12 2011-04-21 Internatl Business Mach Corp <Ibm> セラミック・パッケージならびにセラミック・パッケージ内の結合ノイズを低減し、インピーダンス不連続を制御するための方法およびコンピュータ・プログラム(高速セラミック・モジュールにおけるノイズ結合低減およびインピーダンス不連続制御)
JP2013510407A (ja) * 2009-11-06 2013-03-21 モレックス インコーポレイテド 多層回路部材とそのためのアセンブリ
JP2013089841A (ja) * 2011-10-20 2013-05-13 Kyocer Slc Technologies Corp 配線基板
JPWO2021182157A1 (US20090163788A1-20090625-C00002.png) * 2020-03-11 2021-09-16
US11751321B2 (en) 2020-03-11 2023-09-05 Murata Manufacturing Co., Ltd. Resin multilayer substrate
WO2023037852A1 (ja) * 2021-09-07 2023-03-16 株式会社村田製作所 多層基板

Also Published As

Publication number Publication date
JP2603022Y2 (ja) 2000-02-14

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