JPH0442781Y2 - - Google Patents
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- Publication number
- JPH0442781Y2 JPH0442781Y2 JP4051986U JP4051986U JPH0442781Y2 JP H0442781 Y2 JPH0442781 Y2 JP H0442781Y2 JP 4051986 U JP4051986 U JP 4051986U JP 4051986 U JP4051986 U JP 4051986U JP H0442781 Y2 JPH0442781 Y2 JP H0442781Y2
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- JP
- Japan
- Prior art keywords
- anode
- connection point
- terminal
- diode
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- 239000004065 semiconductor Substances 0.000 claims description 19
- 230000000295 complement effect Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 241000208422 Rhododendron Species 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Description
【考案の詳細な説明】
「産業上の利用分野」
この考案は被試験集積回路の入出力兼用端子
と，その入出力兼用端子を終端させる終端抵抗器
とを接続状態と非接続状態とに切り替えられる
IC試験装置に関する
「従来の技術」
IC試験装置は、被試験集積回路の入力端子に
信号を与え、その時に出力端子から出力される出
力信号を観測し、その観測結果により被試験集積
回路の機能動作の良否を判定する。この際、正規
の出力信号を得るためには出力端子には終端抵抗
器を接続し、終端電圧端子に終端させる必要があ
る。ところで集積回路の端子は入力端子と出力端
子とを兼ね、適宜に入力端子機能と出力端子機能
とに切り替えて入出力動作をするようになつてい
る場合がある。この場合、出力端子機能状態にあ
るときには終端抵抗器を接続して終端させ、入力
端子機能状態にあるときには終端抵抗器を切り離
す必要がある。このような終端抵抗器の接続と非
接続との切り替え操作をするために、被試験集積
回路の入出力端子とIC試験装置とを接続するピ
ンエレクトロニクス回路では入出力兼用端子と終
端抵抗器との間にスイツチング回路を介在させて
いる。[Detailed description of the invention] "Industrial application field" This invention switches the input/output terminal of the integrated circuit under test and the terminating resistor that terminates the input/output terminal between a connected state and a non-connected state. be able to
``Prior art related to IC test equipment'' IC test equipment applies a signal to the input terminal of the integrated circuit under test, observes the output signal output from the output terminal at that time, and determines the function of the integrated circuit under test based on the observation results. Determine whether the operation is good or bad. At this time, in order to obtain a regular output signal, it is necessary to connect a termination resistor to the output terminal and terminate it at the termination voltage terminal. By the way, there are cases in which a terminal of an integrated circuit serves as both an input terminal and an output terminal, and performs input/output operations by switching between the input terminal function and the output terminal function as appropriate. In this case, it is necessary to connect and terminate the terminating resistor when the output terminal is in the functional state, and to disconnect the terminating resistor when the input terminal is in the functional state. In order to switch between connecting and disconnecting the terminating resistor, in the pin electronics circuit that connects the input/output terminal of the integrated circuit under test and the IC test equipment, the connection between the input/output terminal and the terminating resistor is necessary. A switching circuit is interposed between them.
第２図は、従来のIC試験装置におけるピンエ
レクトロニクス回路の例を示す図である。 FIG. 2 is a diagram showing an example of a pin electronics circuit in a conventional IC testing device.
被試験集積回路DUTの各端子１１は接続線１
２によりIC試験装置１３の入出力端１４に接続
さる（図では１つの端子１１に対するもののみを
示す）。その端子１１が入力端子機能状態にある
時には、リレー１５が開に制御されて終端抵抗器
１６が端子１１からの接続線１２から切り離さ
れ、IC試験装置１３の例えば50Ωの出力抵抗値を
もつ出力回路１７から試験信号が供給される。ま
た、端子１１が出力機能状態にある時には、リレ
ー１５が閉に制御されて50Ωの終端抵抗器１６が
端子１１からの接続線１２に接続される。従つ
て、被試験集積回路DUTの端子１１から出力さ
れる出力信号は終端抵抗器１６で終端電圧端子１
８に終端された状態の下でIC試験装置１３の入
力回路１９に供給され、入力回路１９は供給され
た信号を比較電圧と比較し、その比較出力をIC
試験装置１３は被試験集積回路DUTの正規の出
力信号として受け取ることが可能とされている。 Each terminal 11 of the integrated circuit under test DUT is connected to a connecting wire 1
2 to the input/output terminal 14 of the IC testing device 13 (in the figure, only one terminal 11 is shown). When the terminal 11 is in the input terminal function state, the relay 15 is controlled to open and the terminating resistor 16 is disconnected from the connection line 12 from the terminal 11, so that the output of the IC test device 13 has an output resistance value of, for example, 50Ω. A test signal is supplied from circuit 17. Further, when the terminal 11 is in the output function state, the relay 15 is controlled to close and the 50Ω terminating resistor 16 is connected to the connection line 12 from the terminal 11. Therefore, the output signal output from the terminal 11 of the integrated circuit under test DUT is connected to the terminal voltage terminal 1 by the terminating resistor 16.
The input circuit 19 compares the supplied signal with a comparison voltage and sends the comparison output to the IC test device 13.
The test device 13 is capable of receiving the normal output signal of the integrated circuit under test DUT.
「考案が解決しようとする問題点」
非試験集積回路の入出力兼用端子は被試験期間
中、入力端子機能と出力端子機能とに適宜に切り
換えて試験される。ここで用いられているリレー
は機械的な開閉動作により接点を開閉させるが、
一般に機械的な動作は電気的な動作に較べて非常
に遅いという問題がある。従つて、従来のIC試
験装置では、リレー１１の開閉動作速度により被
試験集積回路の試験速度が決められ、高速動作で
試験を行うことができない。``Problem that the invention seeks to solve'' During the period under test, the input/output terminals of a non-tested integrated circuit are tested by appropriately switching between the input terminal function and the output terminal function. The relay used here opens and closes contacts using mechanical opening and closing operations, but
Generally, there is a problem that mechanical operation is much slower than electrical operation. Therefore, in the conventional IC testing apparatus, the test speed of the integrated circuit under test is determined by the opening/closing speed of the relay 11, and the test cannot be performed at high speed.
「問題点を解決するための手段」
この考案では、このような従来のIC試験装置
の問題点を解決するもので、被試験集積回路の入
出力兼用端子に接続される終端抵抗器を、高速に
接続状態と非接続状態とに切り換え制御すること
を可能とする。``Means to Solve the Problems'' This invention solves the problems of conventional IC test equipment. It is possible to control switching between a connected state and a non-connected state.
即ち、入出力兼用端子の機能状態に応じて、そ
の入出力兼用端子に接続されるべき終端抵抗器を
接続状態と非接続状態とに切り換え制御するスイ
ツチング回路は、ダイオードブリツジを用いて構
成される。 That is, a switching circuit that switches and controls a termination resistor to be connected to an input/output terminal between a connected state and a disconnected state according to the functional state of the input/output terminal is constructed using a diode bridge. Ru.
入出力兼用端子からの接続線１２はダイオード
ブリツジの一方の陽極陰極接続点に接続され、他
方の陽極陰極接続点は終端抵抗器を介して終端電
圧端子に接続される。 A connection line 12 from the input/output terminal is connected to one anode/cathode connection point of the diode bridge, and the other anode/cathode connection point is connected to a termination voltage terminal via a termination resistor.
また、ダイオードブリツジの陽極接続点は第１
半導体スイツチを介して第１電源端子に接続さ
れ、陰極接続点は第２半導体スイツチを介して第
２電源端子に接続され、これら第１、第２半導体
スイツチを同時に制御してダイオードブリツジの
第１電源端子側から第２電源端子側への電流を制
御する。この結果、ダイオードブリツジの２つの
陽極陰極間の導通、非導通状態が制御され、よつ
て入出力兼用端子と終端抵抗器との接続と非接続
との切り換え制御が電子回路的な速度で制御され
る。 Also, the anode connection point of the diode bridge is the first
It is connected to a first power supply terminal through a semiconductor switch, and its cathode connection point is connected to a second power supply terminal through a second semiconductor switch, and these first and second semiconductor switches are simultaneously controlled to control the first power supply terminal of the diode bridge. Controls the current flowing from the first power supply terminal side to the second power supply terminal side. As a result, the conduction and non-conduction states between the two anodes and cathodes of the diode bridge are controlled, and switching between connection and disconnection between the input/output terminal and the terminating resistor is controlled at the speed of an electronic circuit. be done.
「実施例」
第１図はこの考案の実施例を示す回路図であ
る。"Embodiment" FIG. 1 is a circuit diagram showing an embodiment of this invention.
第２図と対応する部分には同じ符号を付して示
す。 Components corresponding to those in FIG. 2 are designated by the same reference numerals.
この考案では、入出力兼用端子１１の機能状態
に応じて、その入出力兼用端子１１に接続される
べき終端抵抗器１６を非接続状態或いは接続状態
に制御するスイツチ回路にダイオードブリツジ２
１が用いられる。 In this invention, a diode bridge 2 is added to a switch circuit that controls the termination resistor 16 to be connected to the input/output terminal 11 to be disconnected or connected depending on the functional state of the input/output terminal 11.
1 is used.
被試験集積回路DUTの入出力兼用端子１１か
らの接続線１２はIC試験装置１３の試験信号入
出力端１４に接続される。また、その接続線１２
には、その入出力兼用端子１１が出力端子機能と
される場合に、終端抵抗器１６がダイオードブリ
ツジ２１を用いて構成されるスイツチング回路２
２を介して接続される。即ち、ダイオードブリツ
ジ２１を構成する第１ダイオード２３の陽極と第
２ダイオード２４の陰極との接続点２５に入出力
兼用端子１１からの接続線１２が接続され、ダイ
オードブリツジ２１を構成する第３ダイオード２
６の陽極と第４ダイオード２７の陰極との接続点
２８に終端抵抗器１６の一端が接続され、その終
端抵抗器１６の他端は終端電圧端子１８とコンデ
ンサ３１とに接続される。コンデンサ３１の他端
は接地される。 A connection line 12 from an input/output terminal 11 of the integrated circuit under test DUT is connected to a test signal input/output terminal 14 of an IC testing device 13 . In addition, the connection line 12
In this case, when the input/output terminal 11 is used as an output terminal, a switching circuit 2 in which the terminating resistor 16 is constructed using a diode bridge 21 is used.
Connected via 2. That is, the connection line 12 from the input/output terminal 11 is connected to the connection point 25 between the anode of the first diode 23 and the cathode of the second diode 24 constituting the diode bridge 21. 3 diode 2
One end of the termination resistor 16 is connected to a connection point 28 between the anode of the fourth diode 6 and the cathode of the fourth diode 27, and the other end of the termination resistor 16 is connected to the termination voltage terminal 18 and the capacitor 31. The other end of capacitor 31 is grounded.
また、この第２ダイオード２４の陽極と第４ダ
イオード２７の陽極との接続点３２には第１半導
体スイツチ３３が接続され、この陽極接続点３２
は第１半導体スイツチ３３を通して第１電源端子
３４に接続される。第１半導体スイツチ３３はこ
の例ではPNP型のペア．トランジスタ３５，３
６で構成され、その一方の第１トランジスタ３５
のコレクタに第２、第４ダイオード２４，２７の
陽極接続点３２が接続され、第１トランジスタ３
５のエミツタと第２トランジスタ３６のエミツタ
との共通接続点３７は抵抗器３８を介して第１電
源端子３４に接続される。第１、第２トランジス
タ３５，３６のベースはそれぞれ抵抗器３９，４
１を介して第１電源端子３４に接続されると共
に、それぞれ第５，第６ダイオード４２，４３の
陰極に接続され、この第５、第６ダイオード４
２，４３を通して第１半導体スイツチ３３の開閉
制御信号が供給されるように構成される。 Further, a first semiconductor switch 33 is connected to a connection point 32 between the anode of the second diode 24 and the anode of the fourth diode 27;
is connected to a first power supply terminal 34 through a first semiconductor switch 33. In this example, the first semiconductor switch 33 is a PNP type pair. Transistor 35,3
6, one of which is the first transistor 35
The anode connection point 32 of the second and fourth diodes 24 and 27 is connected to the collector of the first transistor 3.
A common connection point 37 between the emitter of the transistor 5 and the emitter of the second transistor 36 is connected to the first power supply terminal 34 via a resistor 38. The bases of the first and second transistors 35 and 36 are connected to resistors 39 and 4, respectively.
1 to the first power supply terminal 34 and to the cathodes of the fifth and sixth diodes 42 and 43, respectively.
The opening/closing control signal for the first semiconductor switch 33 is supplied through the switches 2 and 43.
第１ダイオード２３の陰極と第３ダイオード２
６の陰極との接続点４４は第２半導体スイツチ４
５が接続され、この陰極接続点４４は第２半導体
スイツチ４５を通して第２電源端子４６に接続さ
れる。第２半導体スイツチ４５はこの例では
NPN型のペア・トランジスタ４７，４８で構成
され、その一方の第３トランジスタ４７のコレク
タに第１、第３ダイオード２３，２６の陰極接続
点４４が接続され、第３トランジスタ４７のエミ
ツタと第４トランジスタ４８のエミツタとの共通
接続点４９は抵抗器５１を介して第２電源端子４
６に接続される。第３、第４トランジスタ４７，
４８のベースはそれぞれ抵抗器５２，５３を介し
て第２電源端子４６に接続されると共に、それぞ
れ第７、第８ダイオード５４，５５の陽極に接続
され、この第７、第８ダイオード５４，５５を介
して、第２半導体スイツチ４５を開閉制御する制
御信号が供給される。 The cathode of the first diode 23 and the third diode 2
The connection point 44 with the cathode of 6 is the second semiconductor switch 4
5 is connected, and this cathode connection point 44 is connected to a second power supply terminal 46 through a second semiconductor switch 45. In this example, the second semiconductor switch 45 is
It is composed of a pair of NPN type transistors 47 and 48, and the collector of the third transistor 47 is connected to the cathode connection point 44 of the first and third diodes 23 and 26, and the emitter of the third transistor 47 and the fourth A common connection point 49 with the emitter of the transistor 48 is connected to the second power supply terminal 4 via a resistor 51.
Connected to 6. third and fourth transistors 47,
The bases of 48 are connected to the second power supply terminal 46 via resistors 52 and 53, respectively, and are also connected to the anodes of seventh and eighth diodes 54 and 55, respectively. A control signal for controlling opening and closing of the second semiconductor switch 45 is supplied through the second semiconductor switch 45.
この第２電源端子４６に供給される第２電源電
圧V2は第１電源電圧V1よりも低い電源電位とさ
れ、第１、第２半導体スイツチ３３，４５の開閉
によりこのダイオードブリツジ２１には第１電源
端子３４から第２電源端子４６に向けて電流が流
れているように構成される。 The second power supply voltage V2 supplied to the second power supply terminal 46 is set to a lower power supply potential than the first power supply voltage V1, and the diode bridge 21 is The configuration is such that current flows from the first power supply terminal 34 to the second power supply terminal 46.
この考案では、第１、第２半導体スイツチ３
３，４５に対して、これらを同時に開閉制御する
制御信号が与えられる。第６、第７ダイオード４
３，５４の陽極陰極接続点５６と第５、第８ダイ
オード４２，５５の陽極陰極接続点５７とには、
互いに符号の異なる相補的な制御信号が制御回路
５８から相補信号出力回路５９を介して供給され
る。 In this invention, the first and second semiconductor switches 3
3 and 45, a control signal is given to control opening and closing of these at the same time. 6th and 7th diode 4
The anode-cathode connection point 56 of the third and fifth diodes 42 and the anode-cathode connection point 57 of the fifth and eighth diodes 42 and 55 are as follows.
Complementary control signals having different signs are supplied from the control circuit 58 via the complementary signal output circuit 59.
相補信号出力回路５９は互いに逆極性の信号、
つまり相補的な２つの信号を出力する。制御回路
５８からＨ−レベルの信号が相補信号出力回路５
９に与えられると、相補信号出力回路５９はＨ−
レベル信号を第６、第７ダイオード４３，５４の
陽極陰極接続点５６に供給し、Ｌ−レベル信号を
第５、第８ダイオード４２，５５の陽極陰極接続
点５７に供給する。陽極陰極接続点５６にＨ−レ
ベル信号が供給されると、第６ダイオード４３の
陰極はＨ−レベルとなり、第２トランジスタのエ
ミツタ−ベース間は電位差がなくなり第２トラン
ジスタは非導通状態となる。一方、第７ダイオー
ド５４の陽極はＨ−レベルとなり、第３トランジ
スタ４７エミツタ−ベース間には電位差が生じ第
３トランジスタ４７は導通状態となる。 The complementary signal output circuit 59 outputs signals of mutually opposite polarity,
In other words, two complementary signals are output. The H-level signal from the control circuit 58 is sent to the complementary signal output circuit 5.
9, the complementary signal output circuit 59 outputs H-
A level signal is supplied to the anode-cathode connection point 56 of the sixth and seventh diodes 43 and 54, and an L-level signal is supplied to the anode-cathode connection point 57 of the fifth and eighth diodes 42 and 55. When an H-level signal is supplied to the anode-cathode connection point 56, the cathode of the sixth diode 43 becomes H-level, there is no potential difference between the emitter and base of the second transistor, and the second transistor becomes non-conductive. On the other hand, the anode of the seventh diode 54 becomes H-level, and a potential difference is created between the emitter and base of the third transistor 47, making the third transistor 47 conductive.
陽極陰極接続点５７にＬ−レベル信号が供給さ
れると、第５ダイオード４２の陰極はＬ−レベル
となり、第１トランジスタ３５のエミツタ−ベー
ス間には電位差が生じ第１トランジスタ３５は導
通状態となる。一方の第８ダイオード５５の陽極
はＬ−レベルとなり、第４トランジスタ４８のエ
ミツタ−ベース間の電位差はなくなり第４トラン
ジスタ４８は非導通状態となる。 When an L-level signal is supplied to the anode-cathode connection point 57, the cathode of the fifth diode 42 becomes L-level, and a potential difference is created between the emitter and base of the first transistor 35, causing the first transistor 35 to become conductive. Become. The anode of the eighth diode 55 becomes L-level, and the potential difference between the emitter and base of the fourth transistor 48 disappears, and the fourth transistor 48 becomes non-conductive.
このように、第１、第３トランジスタ３５，４
７は共に導通状態となり、従つて、ダイオードブ
リツジ２１には第１トランジスタ３５を介して第
１電源端子３４から電流が供給され、第３トラン
ジスタ４７を介して第２電源端子４６へ電流が流
れる。このように、ダイオードブリツジ２１に電
流が流れている時はこのダイオードブリツジ２１
の２つの陽極陰極接続点２５及び２８との間は導
通状態となり、従つて入出力兼用端子１１からの
接続線１２と終端抵抗器１６とは接続状態ONと
される。 In this way, the first and third transistors 35, 4
7 are both in a conductive state, and therefore, current is supplied to the diode bridge 21 from the first power supply terminal 34 via the first transistor 35, and current flows to the second power supply terminal 46 via the third transistor 47. . In this way, when current is flowing through the diode bridge 21, the diode bridge 21
The two anode and cathode connection points 25 and 28 are in a conductive state, and therefore the connection line 12 from the input/output terminal 11 and the terminating resistor 16 are in a connected state.
次に、制御回路５８からＬ−レベルの制御信号
が相補信号出力回路５９に供給されると、相補信
号出力回路５９の出力は反転し、Ｌ−レベルの信
号を第６、第７ダイオード４３，５４の陽極陰極
接続点５６に供給し、Ｈ−レベルの信号を第５、
第８ダイオード４２，５５の陽極陰極接続点５７
に供給する。 Next, when the L-level control signal is supplied from the control circuit 58 to the complementary signal output circuit 59, the output of the complementary signal output circuit 59 is inverted, and the L-level signal is transmitted to the sixth and seventh diodes 43, 54, and an H-level signal is supplied to the fifth, anode and cathode connection points 56.
Anode/cathode connection point 57 of the eighth diode 42, 55
supply to.
陽極陰極接続点５６にＬ−レベル信号が供給さ
れると、第６ダイオード４３の陰極がＬ−レベル
となり、第２トランジスタのエミツタ−ベース間
は電位差が生じ第２トランジスタは導通状態とな
る。一方、第７ダイオード５４の陽極はＬ−レベ
ルとなり、第３トランジスタ４７の４エミツタ−
ベース間には電位差がなくなり第３トランジスタ
４７は非導通状態となる。陽極陰極接続点５７に
Ｈ−レベルの信号が供給されると、第５ダイオー
ド４２の陰極はＨ−レベルとなり、第１トランジ
スタ３５のエミツタ−ベース間には電位差がなく
なり第１トランジスタ３５は非導通状態となる。
一方の第８ダイオード５５の陽極はＨ−レベルと
なり、第４トランジスタ４８のエミツタ−ベース
間には電位差が生じ第４トランジスタ４８は導通
状態となる。 When an L-level signal is supplied to the anode-cathode connection point 56, the cathode of the sixth diode 43 becomes L-level, a potential difference is created between the emitter and base of the second transistor, and the second transistor becomes conductive. On the other hand, the anode of the seventh diode 54 becomes L-level, and the fourth emitter of the third transistor 47
There is no potential difference between the bases, and the third transistor 47 becomes non-conductive. When an H-level signal is supplied to the anode-cathode connection point 57, the cathode of the fifth diode 42 becomes H-level, and there is no potential difference between the emitter and base of the first transistor 35, making the first transistor 35 non-conductive. state.
The anode of the eighth diode 55 becomes H-level, and a potential difference is created between the emitter and base of the fourth transistor 48, making the fourth transistor 48 conductive.
従つて、第１、第３トランジスタ３５，４７は
非導通状態となり、ダイオードブリツジ２１には
電流は流れない。ダイオードブリツジ２１の陽極
接続点３２と陰極接続点４４との間に電流が流れ
ないと、このダイオードブリツジ２１の２つの陽
極陰極接続点２５，２８との間は非導通状態とな
り、従つて、入出力兼用端子１１からの接続線１
２と終端抵抗器１６とは非接続状態OFFとされ
る。 Therefore, the first and third transistors 35 and 47 become non-conductive, and no current flows through the diode bridge 21. If no current flows between the anode connection point 32 and the cathode connection point 44 of the diode bridge 21, there will be no conduction between the two anode and cathode connection points 25 and 28 of the diode bridge 21, and therefore , connection line 1 from input/output terminal 11
2 and the terminating resistor 16 are in a disconnected state OFF.
このダイオードブリツジ２１の２つの陽極陰極
接続点２５，２８間のON状態からOFF状態へ、
或いは又OFF状態からON状態への変換動作は、
制御回路５８からの信号制御により行われ、電子
的なON−OFF制御が実現され、従つて、電子回
路的な高速動作を行わせることが可能である。 From the ON state to the OFF state between the two anode and cathode connection points 25 and 28 of this diode bridge 21,
Alternatively, the conversion operation from OFF state to ON state is as follows:
This is performed by signal control from the control circuit 58, and electronic ON-OFF control is realized, so it is possible to perform high-speed operation like an electronic circuit.
以上では、ダイオードブリツジで構成されるス
イツチング回路は入出力兼用端子に接続れるとし
て説明してきたが、信号を供給されるだけの入力
端子及び信号を出力するだけの出力端子に接続さ
れる入力或いは出力端にも適用され、試験期間中
ダイオードブリツジをOFFに制御或いはONに制
御させておいても何等差し支えない。 In the above, it has been explained that a switching circuit composed of a diode bridge can be connected to an input/output terminal. This also applies to the output end, and there is no problem in keeping the diode bridge OFF or ON during the test period.
「考案の効果」
非試験集積回路の入出力端子が接続される従来の
IC試験装置のピンエレクトロニクス装置ではリ
レーを制御することにより、その機械的な接点の
開閉動作をさせ、終端抵抗器との接続状態と非接
続状態とを切り変えていたが、この考案ではダイ
オードブリツジの２つの陽極陰極接続点を介して
終端抵抗器を接続する構成とした。そして、その
ダイオードブリツジの陽極接続点と陰極接続点と
の間を流れる電流を半導体スイツチにより制御す
ることによつて２つの陽極陰極接続点の間の導通
状態を制御し、終端抵抗器との接続と非接続を切
り替えるように構成した。従つて、ダイオードブ
リツジの電子的な開閉動作で終端抵抗器の接続と
非接続の切り替え制御が可能になり、よつて、被
試験集積回路の高速動作下での試験を行うことが
できるようになつた。``Effect of the invention''
In the pin electronics device of IC test equipment, relays are controlled to mechanically open and close their contacts to change the state of connection with the terminating resistor and the state of disconnection. The configuration was such that the terminating resistor was connected through the two anode and cathode connection points of the azalea. By controlling the current flowing between the anode connection point and the cathode connection point of the diode bridge using a semiconductor switch, the conduction state between the two anode and cathode connection points is controlled, and the connection with the terminating resistor is controlled. Configured to switch between connected and disconnected. Therefore, it is possible to control the connection and disconnection of the termination resistor using the electronic opening and closing operation of the diode bridge, making it possible to test the integrated circuit under test under high-speed operation. Summer.
第１図はこの考案の実施例でIC試験装置と被
試験集積回路の端子との間を接続するピンエレク
トロニクスの例を示す回路図、第２図は従来の
IC試験装置のピンエレクトロニクスの例を示す
図である。
１……入出力端子、１２……接続線、１３……
IC試験装置、１４……入出力端、１５……リレ
ー、１６……終端抵抗器、１７……出力回路、１
８……終端電圧端子、１９……入力回路、２１…
…ダイオードブリツジ、２２……スイツチング回
路、２３……第１ダイオード、２４……第２ダイ
オード、２５……陽極陰極接続点、２６……第３
ダイオード、２７……第４ダイオード、２８……
陽極陰極接続点、３１……コンデンサ、３２……
陽極接続点、３３……第１半導体スイツチ、３４
……第１電源端子、３５……第１トランジスタ、
３６……第２トランジスタ、３７……エミツタの
共通接続点、３８……抵抗器、３９……抵抗器、
４１……抵抗器、４２……第５ダイオード、４３
……第６ダイオード、４４……陰極接続点、４５
……第２半導体スイツチ、４６……第２電源端
子、４７……第３トランジスタ、４８……第４ト
ランジスタ、４９……エミツタの共通接続点、５
１……抵抗器、５２……抵抗器、５３……抵抗
器、５４……第７ダイオード、５５……第８ダイ
オード、５６……陽極陰極接続点、５７……陽極
陰極接続点、５８……制御回路、５９……相補信
号出力回路。
Figure 1 is an embodiment of this invention, and is a circuit diagram showing an example of pin electronics that connects between the IC test equipment and the terminals of the integrated circuit under test.
FIG. 3 is a diagram showing an example of pin electronics of an IC test device. 1...Input/output terminal, 12...Connection line, 13...
IC test equipment, 14... Input/output terminal, 15... Relay, 16... Terminating resistor, 17... Output circuit, 1
8...Terminal voltage terminal, 19...Input circuit, 21...
...Diode bridge, 22...Switching circuit, 23...First diode, 24...Second diode, 25...Anode cathode connection point, 26...Third
Diode, 27... Fourth diode, 28...
Anode cathode connection point, 31... Capacitor, 32...
Anode connection point, 33...first semiconductor switch, 34
...first power supply terminal, 35 ...first transistor,
36... Second transistor, 37... Emitter common connection point, 38... Resistor, 39... Resistor,
41...Resistor, 42...5th diode, 43
...Sixth diode, 44...Cathode connection point, 45
... second semiconductor switch, 46 ... second power supply terminal, 47 ... third transistor, 48 ... fourth transistor, 49 ... emitter common connection point, 5
1...Resistor, 52...Resistor, 53...Resistor, 54...7th diode, 55...8th diode, 56...Anode cathode connection point, 57...Anode cathode connection point, 58... ...Control circuit, 59...Complementary signal output circuit.
Claims (1)
され、そのダイオードブリツジの他の陽極陰極接
続点は終端抵抗器を通して終端電圧端子に接続さ
れ、上記ダイオードブリツジの陽極接続点は第１
半導体スイツチを通じて第１電源端子に接続さ
れ、陰極接続点は第２半導体スイツチを通して第
１電源端子の電源より低い電位の第２電源端子に
接続され、上記第１、第２半導体スイツチに対し
て、同時にこれらを開閉制御する制御信号が与え
られるように構成されているIC試験装置。 one anode-cathode connection point of the diode bridge, the other anode-cathode connection point of the diode bridge is connected to a terminating voltage terminal through a terminating resistor, and the anode connection point of the diode bridge is connected to the first anode-cathode connection point.
connected to a first power supply terminal through a semiconductor switch, the cathode connection point being connected to a second power supply terminal having a lower potential than the power supply of the first power supply terminal through a second semiconductor switch, and with respect to the first and second semiconductor switches; IC test equipment that is configured so that control signals are given to control opening and closing of these at the same time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4051986U JPH0442781Y2 (en) | 1986-03-19 | 1986-03-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4051986U JPH0442781Y2 (en) | 1986-03-19 | 1986-03-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62152276U JPS62152276U (en) | 1987-09-26 |
| JPH0442781Y2 true JPH0442781Y2 (en) | 1992-10-09 |
Family
ID=30854678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4051986U Expired JPH0442781Y2 (en) | 1986-03-19 | 1986-03-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0442781Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003008985A1 (en) * | 2001-07-17 | 2003-01-30 | Advantest Corporation | Input/output circuit and test apparatus |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012013446A (en) * | 2010-06-29 | 2012-01-19 | Advantest Corp | Pin electronics circuit and testing apparatus using the same |
-
1986
- 1986-03-19 JP JP4051986U patent/JPH0442781Y2/ja not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003008985A1 (en) * | 2001-07-17 | 2003-01-30 | Advantest Corporation | Input/output circuit and test apparatus |
| US7013230B2 (en) | 2001-07-17 | 2006-03-14 | Advantest Corporation | Input-output circuit and a testing apparatus |
| CN100390558C (en) * | 2001-07-17 | 2008-05-28 | 爱德万测试株式会社 | Input/output circuit and test apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62152276U (en) | 1987-09-26 |
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