JPH043917A - Method of diffusing impurity - Google Patents
Method of diffusing impurityInfo
- Publication number
- JPH043917A JPH043917A JP10483790A JP10483790A JPH043917A JP H043917 A JPH043917 A JP H043917A JP 10483790 A JP10483790 A JP 10483790A JP 10483790 A JP10483790 A JP 10483790A JP H043917 A JPH043917 A JP H043917A
- Authority
- JP
- Japan
- Prior art keywords
- diffusion
- semiconductor substrate
- wafers
- furnace
- epitaxial
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012535 impurity Substances 0.000 title claims description 19
- 238000000034 method Methods 0.000 title abstract description 11
- 238000009792 diffusion process Methods 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 11
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 11
- 239000011574 phosphorus Substances 0.000 claims abstract description 11
- 235000012431 wafers Nutrition 0.000 abstract description 22
- 238000005247 gettering Methods 0.000 abstract description 10
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 2
- 229910001873 dinitrogen Inorganic materials 0.000 abstract description 2
- 230000000087 stabilizing effect Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 8
- 238000011109 contamination Methods 0.000 description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- -1 boron ions Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体基板に所定の不純物濃度と導電型をも
つ領域を形成するために行う不純物拡散方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an impurity diffusion method for forming a region having a predetermined impurity concentration and conductivity type in a semiconductor substrate.
半導体基板内に不純物を拡散させるためには拡散炉中で
加熱する際、ヒータ、石英管あるいは雰囲気ガスからの
望ましくない不純物により汚染が生じ、半導体特性に影
響が及ぶ、このような汚染による悪影響を防ぐためにゲ
ッタリングすることが行われる。ゲッタリング方法とし
ては、半導体基板の素子に必要な領域を形成する表面と
反対側の裏面に多結晶シリコン膜を形成し、不純物を多
孔質の多結晶シリコン膜に吸着させるか、もしくは裏面
にサンドブラストあるいはArイオン注入により損傷を
与え、不純物を引き寄せることにより、汚染が半導体基
板の裏面側の結晶欠陥とも言える場所にトラップされ、
表面側を電気的に安定化しようとする・方法がある。ま
た、拡散時の炉内温度分布を最適にする方法あるいは塩
酸等のハロゲン元素を雰囲気ガスに混入する方法により
汚染を防ぐ方法もある。When heating in a diffusion furnace to diffuse impurities into a semiconductor substrate, contamination occurs due to undesirable impurities from the heater, quartz tube, or atmospheric gas, and the semiconductor properties are affected. Gettering is performed to prevent this. As a gettering method, a polycrystalline silicon film is formed on the back surface of the semiconductor substrate opposite to the surface where the regions necessary for the elements are formed, and impurities are adsorbed to the porous polycrystalline silicon film, or sandblasting is performed on the back surface. Alternatively, by causing damage through Ar ion implantation and attracting impurities, contamination is trapped in places that can be called crystal defects on the back side of the semiconductor substrate.
There is a method to electrically stabilize the surface side. There are also methods to prevent contamination by optimizing the temperature distribution in the furnace during diffusion or by mixing a halogen element such as hydrochloric acid into the atmospheric gas.
上記のゲッタリング方法のうち、多結晶Si膜を付けた
基板は高価になる。基板に損傷を与える方法は製造工程
が増えてしまい、やはりコスト高を招く、また、温度分
布を最適化したり、ハロゲン元素を混入することにより
汚染を防ぐ方法は、再現性が乏しく、設備も複雑になる
という問題点がある。Among the above gettering methods, the substrate with a polycrystalline Si film is expensive. Methods that damage the substrate require more manufacturing steps, which also leads to higher costs.Methods that prevent contamination by optimizing temperature distribution or incorporating halogen elements have poor reproducibility and require complicated equipment. There is a problem with becoming.
本発明の目的は、上記の問題点を解決し、通常の半導体
基板を使用し、従来と同様の拡散炉内で基板の表面側へ
の汚染を防止して行うことができる不純物拡散方法を提
供することにある。The purpose of the present invention is to solve the above-mentioned problems and provide an impurity diffusion method that can be carried out using a normal semiconductor substrate in a conventional diffusion furnace while preventing contamination on the surface side of the substrate. It's about doing.
上記の目的を達成するために、本発明は、半導体基板の
一面側から不純物を基板内へ所定の深さまで拡散させる
ために拡散炉内で加熱する不純物拡散方法において、一
面側に高濃度のりん拡散層を有する半導体基板を前記の
半導体基板のほかに拡散炉内に入れるものとする。In order to achieve the above object, the present invention provides an impurity diffusion method in which impurities are heated in a diffusion furnace to diffuse impurities from one side of a semiconductor substrate to a predetermined depth into the substrate. A semiconductor substrate having a diffusion layer is placed in a diffusion furnace in addition to the semiconductor substrate described above.
一面側に高濃度のりん拡散層を有する半導体基板には、
パワートランジスタの製造などに使用され、その拡散層
がコレクタ電極接触層として利用されるものがあり、容
易に入手できる。このようなコレクタ拡散ウェーハと呼
ばれるSi基板は、各種81基板の中で拡散工程におけ
るゲッタリング効果が最もすぐれている。このゲッタリ
ング効果は、りんおよびりんを拡散する時に使用し基板
中に含まれる酸素による。このりんと酸素による拡散炉
内の不純物のゲッタリング効果は、炉内のりん拡散層を
有しない半導体基板への汚染を防止するのにも役立つ。A semiconductor substrate with a high concentration phosphorus diffusion layer on one side has
Some are used in the manufacture of power transistors and the diffusion layer is used as a collector electrode contact layer, and are easily available. Such a Si substrate, called a collector diffusion wafer, has the best gettering effect in the diffusion process among the various 81 substrates. This gettering effect is due to phosphorus and the oxygen contained in the substrate, which is used when diffusing phosphorus. This gettering effect of impurities in the diffusion furnace by phosphorus and oxygen also helps to prevent contamination of semiconductor substrates in the furnace that do not have a phosphorus diffusion layer.
〔実施例]
以下、図を引用して本発明の一実施例について説明する
。第1図はMO3素子の作成に用いられるエピタキシャ
ルウェーハで、200−の厚さのn9基板1の上に50
fmの厚さのn−エピタキシャル層2を積層したもので
、ウェーハの直径は4インチであり、図はその一部を示
したにすぎない、このエピタキシャルウェーハに、はう
素のイオン注入を行い、表面の所定の領域にほう素原子
3を導入する (第1図ta1)、このようなエピタキ
シャルウェーハ10を100枚をボート上に立て、両側
にそのエピタキシャルウェーハの存在する位置までの外
気のまき込みの防止のためあるいは炉内を5〜81/分
の流量で還す窒素ガスの流れを安定化させるためのダミ
ーウェーハを各10枚立てた。このダミーウェーハに一
面にりん拡散によるn゛層を有する直径4インチのn型
コレクタ拡散ウェーハを用いた。そして1100〜11
50℃で約1時間加熱するドライブ工程を行い、第1図
(′b)に示すようにp 8M域4を形成した。このp
H1域4はMO3素子のソース・ドレイン領域として利
用される。このような拡散方法の効果は、次のようにし
て確かめられた。比較のために、重金属等で汚染された
拡散炉内で、第1図(8)に示したn型エピタキシャル
ウェーハおよび同様にほう素イオンを注入したn型コレ
クタ拡散ウェーハを数枚づつ、別個に拡散を実施した。[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. Figure 1 shows an epitaxial wafer used to create an MO3 device, with a 50mm
The epitaxial wafer was made by stacking n-epitaxial layers 2 with a thickness of fm, and the diameter of the wafer was 4 inches, of which only a portion is shown. , boron atoms 3 are introduced into a predetermined region of the surface (Fig. 1 ta1), 100 such epitaxial wafers 10 are placed on a boat, and outside air is spread on both sides to the position where the epitaxial wafers are located. Ten dummy wafers were set up for each wafer in order to prevent crowding or to stabilize the flow of nitrogen gas that was returned inside the furnace at a flow rate of 5 to 81/min. As this dummy wafer, an n-type collector diffusion wafer having a diameter of 4 inches and having an n layer formed by phosphorus diffusion on one surface was used. and 1100-11
A drive step of heating at 50° C. for about 1 hour was performed to form a p8M region 4 as shown in FIG. 1('b). This p
The H1 region 4 is used as the source/drain region of the MO3 element. The effectiveness of such a diffusion method was confirmed as follows. For comparison, several n-type epitaxial wafers shown in FIG. 1 (8) and n-type collector diffusion wafers similarly implanted with boron ions were separately prepared in a diffusion furnace contaminated with heavy metals, etc. Diffusion was carried out.
拡散後、各ウェーハの裏面および表面のp型拡散領域上
に電極を被着し、はう素の拡散によって形成されたダイ
オードの逆方向もれ電流を測定した。その結果は、エピ
タキシャルウェーハのダイオードの逆もれ電流は200
nA〜1μAの値を示し、これに対しコレクタ拡散ウェ
ーハのダイオードの逆もれ電流は20nA〜60nAの
値と小さかった。上記の実施例によって得られた第1開
山)に示すエピタキシャルウェーハ10のn゛基板1の
裏面およびpH域4の表面に電極をつけ、ダイオードの
逆もれ電流を測定したところ、100nA〜300n^
となり、コレクタ拡散ウェーハを入れなかった場合に比
し低い値になると共にばらつきも低下した。After diffusion, electrodes were deposited on the p-type diffusion regions on the back and front surfaces of each wafer, and the reverse leakage current of the diode formed by the boron diffusion was measured. The result is that the reverse leakage current of the epitaxial wafer diode is 200
In contrast, the reverse leakage current of the collector diffusion wafer diode was as small as 20 nA to 60 nA. Electrodes were attached to the back surface of the substrate 1 and the surface of the pH range 4 of the epitaxial wafer 10 shown in the first diode obtained in the above example, and the reverse leakage current of the diode was measured, and it was found to be 100 nA to 300 n^
The value was lower than that in the case without the collector diffusion wafer, and the variation was also reduced.
これは、コレクタ拡散ウェーハによるゲッタリング効果
でエピタキシャル層2の電気的特性が安定していること
を示す。This indicates that the electrical characteristics of the epitaxial layer 2 are stable due to the gettering effect of the collector diffusion wafer.
本発明によれば、拡散工程の際に、拡散炉内に人手容易
な一面に高濃度のりん拡散層を有する半導体基板を共存
させることにより、りんおよび酸素のゲッタリング効果
によって、所期の拡散を行う半導体基板に対する汚染が
防止できた。すなわち、特殊な半導体基板の使用や工程
の追加などの必要なしに再現性よくゲッタリング効果を
含んだ不純物拡散工程を実施することが可能になった。According to the present invention, during the diffusion process, by coexisting a semiconductor substrate having a high concentration phosphorus diffusion layer on one surface that is easy to handle in the diffusion furnace, the desired diffusion is achieved by the gettering effect of phosphorus and oxygen. It was possible to prevent contamination of the semiconductor substrate that is subjected to this process. That is, it has become possible to perform an impurity diffusion process including a gettering effect with good reproducibility without the need for using a special semiconductor substrate or adding a process.
第1図は本発明の実施される不純物拡散工程をfa+、
(blの順に示す断面図である。
1:n゛基板2二!ll−エピタキシャル層、3:はう
素、4:pm域、10:エピタキシ中ルウニーム。FIG. 1 shows the impurity diffusion process carried out in the present invention.
(These are cross-sectional views shown in the order of bl. 1: n゛substrate 2!ll-epitaxial layer, 3: boron, 4: pm region, 10: luneum during epitaxy.
Claims (1)
さまで拡散させるために拡散炉内で加熱する不純物拡散
方法において、一面側に高濃度のりん拡散層を有する半
導体基板を前記半導体基板のほかに拡散炉内に入れるこ
とを特徴とする不純物拡散方法。1) In an impurity diffusion method in which impurities are heated in a diffusion furnace to diffuse impurities from one side of the semiconductor substrate to a predetermined depth into the substrate, a semiconductor substrate having a high concentration phosphorus diffusion layer on one side of the semiconductor substrate is used. Another impurity diffusion method is characterized by placing the impurity in a diffusion furnace.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10483790A JPH043917A (en) | 1990-04-20 | 1990-04-20 | Method of diffusing impurity |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10483790A JPH043917A (en) | 1990-04-20 | 1990-04-20 | Method of diffusing impurity |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH043917A true JPH043917A (en) | 1992-01-08 |
Family
ID=14391472
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10483790A Pending JPH043917A (en) | 1990-04-20 | 1990-04-20 | Method of diffusing impurity |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH043917A (en) |
-
1990
- 1990-04-20 JP JP10483790A patent/JPH043917A/en active Pending
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