JPH04370840A - System development assistance device - Google Patents

Abstract

PURPOSE:To reduce the size of an emulator probe and to develop a system in a state close to a final evaluation stage at all times. CONSTITUTION:A probe assembly 10 composed of a piggyback substrate 20 and an auxiliary substrate 30 which are connected detachably to each other by the engagement between male pins 24 and female pins 31 is connected to an emulator main body 40 by a probe cable 35. A target CPU 21, a PROM socket 22, and user pins 23 for connections with a CPU socket on a user target are mounted on the piggyback substrate 20. A cable connector 33 for the connection of the probe cable 35 is mounted on the auxiliary substrate 30. In the final evaluation stage of the user target, the piggyback substrate 20 is used alone while a PROM is connected to the PROM socket 22.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system development support device for supporting microcomputer system development.

0002

BACKGROUND OF THE INVENTION In recent years, microcomputer-applied products have made remarkable progress, with rapid advances in functionality, miniaturization, and cost reduction, and as a result, system development support devices have become increasingly important.

[0003] A conventional system development support device will be explained below with reference to the drawings. FIG. 6 is a perspective view showing the configuration of a conventional system development support device. This device is
A probe 70 that can be attached to and detached from a CPU socket on a user target is connected to an emulator main body 80 with a probe cable 78, and when the probe 70 is docked with the user target, the emulator main body 80
a personal computer (hereinafter referred to as a personal computer)
This is a device for performing system development such as debugging the user target while connected to the system.

In the probe 70, 71 is a probe board, 72 is a target CPU, and 73 is a target CPU.
74 is a cable connector for connecting the probe cable 78, 75 is a connector provided on the lower surface of the probe board 71, and 76 is connected to the probe board 71 via the connector 75 to convert the pin arrangement. 77 is a user pin for connection to the CPU socket on the user target.

In the emulator main body 80, 81 is a cable connector for connecting the probe cable 78;
82 is an instruction memory (RAM) of the target CPU 72, 83 is a peripheral circuit, and 84 is an interface connector for connection with a personal computer. Note that the signals exchanged between the probe 70 and the emulator main body 80 via the probe cable 78 include a plurality of signal lines necessary for the emulator main body 80 to control the probe 70 and an instruction memory 82. address bus and data bus.

The target CPU 72, which operates on the user target via the user pin 77 under the control of the emulator main body 80, is placed on the probe 70 because it is ideal to be as close to the user target as possible. This is to minimize errors in electrical characteristics. The oscillator 73 of the target CPU
Since it is better to be closer to U72, it is mounted on the probe board 71 like the target CPU 72.

[0007]

[Problems to be Solved by the Invention] In the configuration of the conventional system development support device described above, both the target CPU 72 and the cable connector 74 are mounted on one probe board 71, so the dimensions of the probe board 71 are small. Because of the large size, there is a problem in that the probe 70 cannot be easily docked with today's user targets, which are becoming increasingly miniaturized.

In addition, at the final evaluation stage of the system when the development of the microcomputer program is almost complete, the user can use a piggyback CPU with a PROM written in the program mounted on the back side, which is different from the target CPU 72 on the probe board 71. When final evaluation of targets was performed, problems often arose due to differences in behavior between using the probe and using the piggyback.

[0009] An object of the present invention is to provide a system development support device that allows the miniaturization of a probe and allows system development to be carried out in a state close to the final evaluation stage at all times.

0010

[Means for Solving the Problems] In order to achieve the above object, the present invention divides the probe board into two parts, stacks the two divided boards one on top of the other, connects them removably to each other, and combines the two parts. The emulator is connected to the emulator as a probe, and only the lower board is used as a piggyback.

Specifically, the present invention is based on the premise that the present invention is a system development support device in which a probe assembly that can be attached to and detached from a CPU socket on a user target is connected to an emulator main body via a probe cable.
a user pin for connection to a CPU socket on the user target, a target CPU operating on the user target via the user pin, and the target CPU
a piggyback board having an IC socket for mounting a non-volatile memory IC accessed by the auxiliary board, an auxiliary board having a cable connector for connecting a probe cable, and the auxiliary board being removably attached to the piggyback board. The structure of the probe assembly is provided with a connecting means for making the connection.

0012

[Operation] According to the present invention, when the probe assembly is used as a probe connected to the emulator main body, the auxiliary board is connected on top of the piggyback board, and the user pins of the lower piggyback board are connected to the user target. C of
While inserting it into the PU socket, connect the upper auxiliary board to the emulator main body with a probe cable. In this state, the user target system can be developed while operating the target CPU on the piggyback board under the control of the emulator main body.

On the other hand, after removing the connection between the piggyback board and the auxiliary board, and mounting the nonvolatile memory IC in which the program has been written into the IC socket on the piggyback board, only the piggyback board can be connected to the user using the user pins. By connecting to the CPU socket on the target, the target CPU operates on the user target while accessing the non-volatile memory IC, allowing a final evaluation of the system to be performed.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is an exploded perspective view showing the configuration of a system development support apparatus according to an embodiment of the present invention. This device also has a probe assembly 10 that can be attached and detached to a CPU socket on a user target connected to an emulator main body 40 with a probe cable 35, as in the case of FIG. is docked with the user target, and the emulator main body 40
This is a device for developing systems while connected to a computer. The probe assembly 10 is divided into two boards, a piggyback board 20 and an auxiliary board 30.

In the piggyback board 20, 21 is the target CPU, 22 is a PLCC type PROM socket, 23 is a user pin for connection to the CPU socket on the user target, and 24 is mounted in a through hole on the edge of the board. These are male pins that protrude above and below the piggyback board 20.

In the auxiliary board 30, 31 is a female pin mounted in a through hole at the edge of the board, and is used to connect the auxiliary board 30 to the piggyback board 20 by receiving the male pin 24 of the piggyback board 20. belongs to. 32 is a sub oscillation unit, and 33 is a cable connector for connecting the probe cable 35.

In the emulator main body 40, 41 is a cable connector for connecting the probe cable 35;
42 is an instruction memory (RAM) of the target CPU 21, 43 is a peripheral circuit, and 44 is an interface connector for connection with a personal computer.

Reference numeral 50 denotes a dummy target that is used in place of the user target when the user target has not yet been created. In this dummy target 50,
51 is a dummy target board with rubber feet; 52 is a CP into which the user pin 23 of the piggyback board 20 is inserted;
U socket, 53 is test pin, 54 is target CP
It is an oscillator of U.

FIG. 2 is a block diagram showing the internal wiring of the probe assembly 10 in a state where the piggyback board 20 and the auxiliary board 30 are connected by inserting the male pins 24 of the piggyback board 20 into the female pins 31 of the auxiliary board 30. It is. Male pins 2 engaged with each other as shown in the figure
4 and the female pin 31 include a plurality of signal lines necessary for the emulator main body 40 to control the probe assembly 10, a memory address bus and a data bus, and one RST signal (but , negative logic), and the sub oscillation unit 32
Two OSC signals are included. All signals other than the two OSC signals are connected to the cable connector 3 on the auxiliary board 30.
3 and communicates with the emulator main body 40. Target C on piggyback board 20
All user signals of PU 21 are exchanged through user pin 23. Note that only the pattern of the OSC signal of the sub oscillation unit 32 is provided on the auxiliary board 30. Although the present probe assembly 10 is intended to operate with the oscillator on the user target, the sub oscillation unit 32 is provided in case the oscillator on the user target does not operate for some reason.

FIG. 3 is a circuit diagram showing the internal wiring of the dummy target 50. As shown in FIG. As shown in the figure, not only the oscillator 54 of the target CPU is connected to the pins of the CPU socket 52, but also test pins 53 are prepared for all other pins of the CPU socket 52.

The operation of the system development support apparatus of this embodiment configured as described above will be explained below.

FIG. 4 is a perspective view showing the state in which the probe assembly is used as a probe connected to the emulator main body. As shown in the figure, the auxiliary board 30 is placed on the piggyback board 20 by inserting the male pins 24 of the piggyback board 20 into the female pins 31 of the auxiliary board 30, and the user pins of the lower piggyback board 20 are placed on top of the piggyback board 20. 23 into the CPU socket 61 on the user target 60, and connect the probe cable 35 to the cable connector 33 of the upper auxiliary board 30 to connect the auxiliary board 30 to the emulator main body. In this state, the target C on the piggyback board 20
System development for the user target 60 can be performed while operating the PU under the control of the emulator main body. However, in the example shown in the same figure, user target 6
0 has the oscillator 62 of the target CPU, the mounting of the sub oscillation unit 32 on the auxiliary board 30 is omitted. Note that by using the downwardly protruding portion of the male pin 24 mounted on the edge of the piggyback board 20, it is possible to easily proceed with failure analysis using a logic analyzer when there is a defective part in the user target 60.

[0024] While the user target 60 is not created, system development is proceeded using the dummy target 50 shown in FIG. 1 in place of the user target 60. That is, as in the case of FIG. 4, the auxiliary board 30 is connected to the piggyback board 20, and the probe cable 35 is connected to the cable connector 33 of the auxiliary board 30, thereby connecting the auxiliary board 30 to the emulator main body. , connect the user pin 23 of the piggyback board 20 to C of the dummy target 50.
It is inserted into the PU socket 52. In the conventional configuration shown in FIG. 6, there is no stand to fix the probe 70 while the user target is not created, so there are many cases where the user pin 77 comes into contact with a conductor and the target CPU 72 is damaged. . However, in this embodiment, since the dummy target 50 serves as a fixing base for the probe assembly 10, the target CPU 21 will not be damaged. Moreover, the piggyback board 20 has user pins 23
All user signals of the target CPU 21 are output as dummy target 50, and all user pins 2
Since a test pin 53 is prepared for the CPU 3, the test pin 53 is useful for checking the operation of the target CPU 21.

FIG. 5 is a perspective view showing the state of use when only the piggyback board 20 forming a part of the probe assembly is used. As shown in the figure, the PROM 25 in which the program has been written is transferred to the PR on the piggyback board 20.
After mounting on the OM socket 22, the user pin 23 of the piggyback board 20 is connected to the CP on the user target 60.
Insert into U socket 61. In this state, the target CPU 21 operates on the user target 60 while accessing the PROM 25, so that a final evaluation of the system can be performed. Note that by using the male pins 24 mounted on the edge of the piggyback board 20, it is possible to easily perform failure analysis using a logic analyzer when there is a defective part in the user target 60.

Although the above embodiment employs a piggyback system in which the target CPU is directly mounted on the board, a one-time microcomputer may be used instead.

[0027]

[Effects of the Invention] As explained above, according to the present invention, the board for mounting the target CPU (piggyback board) and the board for mounting the cable connector (auxiliary board) are separated and placed one above the other. Since the stacked configuration is adopted, the dimensions of each board are reduced, and the overall size of the probe assembly can be reduced. Therefore, even when the user target has a small space, the probe assembly can be easily docked.

Furthermore, the piggyback board, which has user pins for connection to the user target and IC sockets for mounting the target CPU and memory, and the auxiliary board, which has a cable connector for connection to the emulator main body, can be detached. Since we have adopted a configuration in which the probe assembly is connected to a It can be used for final evaluation of the system. Therefore, the system can be developed in a state close to the final evaluation stage, and the conventional problem caused by the difference in operation between when using a probe and when using a piggyback can be solved.

[Brief explanation of drawings]

FIG. 1 is an exploded perspective view showing the configuration of a system development support device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing internal wiring of the probe assembly in FIG. 1;

3 is a circuit diagram showing internal wiring of the dummy target in FIG. 1. FIG.

FIG. 4 is a perspective view showing a state in which the probe assembly in FIG. 1 is used as a probe connected to an emulator main body.

5 is a perspective view showing a state in which a part of the probe assembly in FIG. 1 is used as a piggyback; FIG.

FIG. 6 is a perspective view showing the configuration of a conventional system development support device.

[Explanation of symbols]

10...Probe assembly 20...Piggyback board 21...Target CPU 22...PROM socket (IC socket) 23...User pin 24...Male pin (connection means) 25...PROM (nonvolatile memory IC) 30...Auxiliary board 31...Female pin (connection means) Means) 33...Cable connector 35...Probe cable 40...Emulator main body 50...Dummy target 60...User target 61...CPU socket

Claims (1)

[Claims] 1. A system development support device comprising a probe assembly that can be attached and detached to a CPU socket on a user target and connected to an emulator main body via a probe cable, the probe assembly being able to be attached to and detached from a CPU socket on the user target. A piggyback board having a user pin for connection to a target CPU operating on the user target via the user pin, and an IC socket for mounting a non-volatile memory IC accessed by the target CPU. , a system development support device comprising: an auxiliary board having a cable connector for connecting the probe cable; and a connecting means for removably connecting the auxiliary board to the piggyback board. .