JPH04368472A - Inverter - Google Patents

Abstract

PURPOSE:To effectively prevent simultaneous ON of a pair of switching elements inserted serially between terminals of a DC power source, and to prevent a decrease in its efficiency. CONSTITUTION:A collector of a transistor Q1 is connected to a positive electrode of a DC power source E, and an emitter of a transistor Q2 is connected to a negative electrode of the power source E. A first diode D1 is connected forward between the emitter of the transistor Q1 and the collector of the transistor Q2. An anode of a second diode D2 having a cathode connected to that of the diode D1, is connected to a base of the transistor T1. A load circuit 2 is inserted between a connecting point of the transistor Q1 and the diode D1 and the negative electrode of the power source E. In a normal operation, a current flows only to the diode D1. If the state in which both the transistors Q1 and Q2 simultaneously become ON, occurs, the transistor Q1 is held OFF by the function of the diode D2.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention connects a circuit including a pair of switching elements connected in series and controlled to turn on alternately and selectively between both ends of a DC power supply. The present invention relates to an inverter device in which a load circuit is connected between a connection portion and one electrode of a DC power source.

0002

2. Description of the Related Art Conventionally, as shown in FIG. 3, a series circuit of a pair of switching elements SW1, SW2 is connected across a DC power source E, and both switching elements SW1,
By controlling SW2 to turn on alternately and selectively, the load circuit 2 connected between the connection point of both switching elements SW1 and SW2 and one electrode (the negative electrode in FIG. 3) of the DC power supply is controlled to turn on SW2 alternately and selectively. An inverter device is provided for supplying electric power. Each switching element S
The on-periods of W1 and SW2 are controlled by the drive circuit 1 so that they do not turn on at the same time and cause a short-circuit current to flow.

That is, the drive circuit 1 converts a pair of reference signals V1 and V2 outputted from the oscillation circuit 11 into control signals Vc1 and Vc1 through drive circuits 131 and 132.
Each switching element SW1, SW2 as Vc2
is configured to be applied to the control terminal of. Further, one reference signal V1 outputted from the oscillation circuit 11 is input into the drive circuit 131 after the voltage is converted through the level shift circuit 12. The reason why the level shift circuit 12 is provided here is that the potential V0 at the connection point between both switching elements SW1 and SW2 changes when the switching element SW2 is turned on or off.
This is because the reference potential of the switching element SW1 changes. The oscillation circuit 11, the level shift circuit 12, and each drive circuit 131, 132 are connected to a DC power supply E.
1, E2, and E3. Oscillation circuit 11
Both reference signals V1 and V2 outputted from the V1 and V2 have periods in which they alternately and selectively go to H level and simultaneously go to L level, and each of the reference signals V1 and V2 corresponding to the period in which the reference signals V1 and V2 are at H level Switching element SW1, S
By turning on W2, both switching elements SW1 and SW2 are controlled to have a period in which they are alternately and selectively turned on and simultaneously turned off.

The load circuit 2 consists of a series circuit of an inductance L, a DC cut capacitor C0, and a load Ld such as a discharge lamp, and a capacitor C connected in parallel to the load Ld. are connected in parallel. Next, the operation of the circuit shown in FIG. 3 will be explained with reference to FIG. Here, it is assumed that the frequencies of the reference signals V1 and V2 outputted from the oscillation circuit 11 are set higher than the resonant frequency of the load circuit 2. As shown in FIGS. 4(a) and 4(b), the oscillation circuit 11 outputs a pair of reference signals V1 and V2 that have periods of alternately and selectively going to H level and simultaneously going to L level, and one of them The voltage of the reference signal V1 is converted by the level shift circuit 12. The output signal V3 of the level shift circuit 12 (see FIG. 4(c)) and the other reference signal V2 of the oscillation circuit 11
are control signals Vc1 and Vc2 (FIG. 4(d) (e
). Both switching elements SW1, SW2
As shown in FIG. 4(f), the potential V0 at the connection point is approximately 0 when the switching element SW2 is on, and approximately equal to the voltage of the DC power supply E when the switching element SW2 is off.

By the way, as shown in FIG. 4, the reference signal V1 from the oscillation circuit 11 and the level shift circuit 12
There is a delay between the output signal of
This results in a delay of 4-t3). Moreover, for each drive circuit 131, 132, (t2 - t1), (t7 - t6) at the time of rising
A delay of (t5 - t4) occurs at the falling edge.
) and (t9 - t8 ) delays occur, respectively.

On the other hand, at time t2, the drive circuit 131
The control signal Vc1 output from becomes H level,
When the switching element SW1 is turned on, a resonant current Is1 as shown in FIG. 4(g) flows through the switching element SW1. Next, at time t5, the control signal V
c1 becomes L level, switching element SW1
is turned off, the current flowing through the inductance L tries to continue flowing, and the switching element SW2
The voltage V0 across is inverted. When the control signal Vc2 output from the drive circuit 132 becomes H level at time t7 and the switching element SW2 is turned on,
A resonance current Is2 as shown in FIG. 4(h) flows through the switching element SW2. Next, at time t9, when the control signal Vc2 goes to L level and the switching element SW2 is turned off, the current flowing through the inductance L tends to continue flowing, and the voltage V0 across the switching element SW2 is reversed. By repeating such operations, a sinusoidal alternating current Id as shown in FIG. 4(i) flows through the load Ld.

By the way, in the configuration shown in FIG. 3, as described above, the switching element SW is connected from the oscillation circuit 11 to
1, at the rising edge (t2 −
t0), a delay of (t5 - t3) occurs at the falling edge, and a delay of (t7 - t6) occurs at the rising edge of the signal from the oscillation circuit 11 to the switching element SW2.
), a delay of (t9 - t8) occurs at the falling edge. Therefore, if the delay time varies due to variations in component constants, both switching elements SW1, S
There is a problem in that W2 is turned on at the same time, causing a short circuit current to flow, which may destroy both switching elements SW1 and SW2.

For example, as shown in FIGS. 4(j) and 4(k), due to changes in the characteristics of the level shift circuit 12 and the drive circuit 131, the falling time t11 of the control signal Vc1 output from the drive circuit 131 may be different from that of the drive circuit 131. When the rise time t7 of the control signal Vc2 output from the circuit 132 is delayed, both switching elements S
A period in which W1 and SW2 are simultaneously turned on occurs during the period (t11-t7), and a short-circuit current flows through both switching elements SW1 and SW2, as shown in FIGS. 4(m) and 4(n). Here, FIG. 4(l) shows the voltage V0 across the switching element SW2.

Both switching elements SW are caused by delay time errors caused by component variations as described above.
In order to prevent the phenomenon that switching elements SW1 and SW2 are turned on simultaneously, both switching elements SW1 and SW2 are turned on as shown in FIG.
A diode D6 is inserted between W2 in the forward direction, and the connection point between the cathode of the diode D6 and the switching element SW2 is connected to a path for supplying the control signal Vc1 to the switching element SW1 (here, the drive circuit 1
31 input terminal). Further, one end of the load circuit 2 is connected to a connection point between the switching element SW1 and the anode of the diode D6.

In this configuration, the switching element SW2
When turned on, the potential of the control terminal of switching element SW1 is forcibly lowered, which ensures that switching element SW1 turns off and prevents both switching elements SW1 and SW2 from turning on at the same time. . That is, due to causes such as the variation in delay time as described above, both switching elements SW1,
A control signal Vc1 that turns on SW2 at the same time,
Even if Vc2 occurs, switching element SW2
is turned on, switching element SW1 is forcibly turned off, so both switching elements SW1 and S
This means that no short circuit current will flow through W2. In this circuit, a diode D4 is provided for freewheeling.

However, even in this circuit configuration,
Due to other causes, both switching elements SW1 and SW2
may be on at the same time. In this circuit, when the switching element SW1 shifts from the on state to the off state, the resonant current flows through the path of the positive electrode of the DC power supply E → the switching element SW1 → the inductance L → the capacitor C and the load Ld → the negative pole of the DC power supply E. The state changes to a state in which the current flows through the path of inductance L→capacitor C and load Ld→diode D4. At this time, switching element SW1 and diode D6
The potential at the connection point a with the anode of switching element SW2 shifts from a high potential to a low potential, but due to the influence of stray capacitance between both ends of switching element SW2, switching element SW
The potential at the connection point b between 2 and the diode D6 may be kept at a high potential, and the switching element SW1 may be turned on again due to malfunction. In this state, if switching element SW2 is turned on,
A situation may arise in which both switching elements SW1 and SW2 are turned on simultaneously during a period until residual charges due to stray capacitance and the like are released.

In order to prevent such a phenomenon, as shown in FIG. 6, in addition to the configuration shown in FIG. It is conceivable to insert in the forward direction. In this configuration, the switching element S
The diode D7 prevents the residual charge due to the stray capacitance between both ends of W2 from affecting the control signal Vc1 of the switching element SW1 on the high potential side. With such a configuration, it is possible to completely prevent both switching elements SW1 and SW2 from being turned on at the same time.

[0013]

However, according to the above configuration, when the switching element SW2 on the low potential side is on, the inductance L → diode D6 → diode D7 → switching element SW2 → capacitor C and load Ld → Current flows through a path called inductance L. At this time, the resonant current flows through the two diodes D6
, D7 sequentially, the diode D6
, D7 becomes large and cannot be ignored, especially in an inverter device that places emphasis on circuit efficiency.

The present invention aims to solve the above-mentioned problems, and it prevents both switching elements connected in series from being turned on at the same time, and improves efficiency by preventing unnecessary losses. The purpose is to provide a good inverter device.

[0015]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a pair of switching elements that are controlled to be turned on alternately and selectively, and a pair of switching elements that are controlled to be turned on alternately and selectively, between both ends of a DC power supply. A series circuit is connected with a first diode inserted in the forward direction between the two, and the anode of the second diode whose cathode is commonly connected to the first diode is connected to the control terminal of the switching element on the high potential side. However, a load circuit is connected between the connection point between the switching element on the high potential side and the anode of the first diode and one of the electrodes of the DC power supply.

[0016]

[Operation] According to the above configuration, under normal conditions, the resonant current is
Since the current flows through the first diode inserted between both switching elements, and only the loss of one diode occurs, the resonance current always flows through two diodes, compared to the configuration shown in Figure 6. , the loss will be reduced. In addition, if a signal that turns on both switching elements simultaneously is input to the control terminals of both switching elements due to some abnormality, the potential of the control terminal of the higher potential side switching element is forcibly changed via the second diode. This prevents both switching elements from turning on at the same time. Furthermore, the residual charge due to stray capacitance between both ends of the switching element on the low potential side is
Since the second diode prevents any influence on the control terminal of the switching element on the high potential side, it is also prevented that both switching elements are turned on simultaneously due to residual charge.

[0017]

[Embodiment] (Embodiment 1) Fig. 1 shows a half-bridge type inverter device that adopts the technical idea of the present invention.
Transistors Q1 and Q2 are used as switching elements. The collector of transistor Q1 is connected to the positive pole of DC power supply E, and the emitter of transistor Q2 is connected to the negative pole of DC power supply E via emitter resistor R2. Further, the anode of a first diode D1 is connected to the emitter of the transistor Q1 via an emitter resistor R1, and the cathode of the first diode D1 is connected to the collector of the transistor Q2. A diode D3 is connected in anti-parallel to the series circuit between the emitter-collector of the transistor Q1 and the emitter resistor R1, and a diode D3 is connected in series circuit between the emitter-collector of the transistor Q2, the first diode D1, and the emitter resistor R2. D4 are connected in antiparallel. A series circuit of the primary winding n1 of the transformer T and the load circuit 2 is connected between the connection point between the emitter resistor R1 and the anode of the first diode D1 and the negative electrode of the DC power supply E. Load circuit 2 includes a DC cut capacitor C0 and a load L.
d, and a capacitor C connected in parallel to the load Ld. The transformer T includes a pair of secondary windings n21 and n22, one end of the secondary winding n21 is commonly connected to one end of the primary winding n1, and the other end is connected to the transistor Q1 via a base resistor R3. connected to the base of Further, one end of the other secondary winding n22 is connected to the negative electrode of the DC power supply E, and the other end is connected to the base of the transistor Q2 via the base resistor R4. moreover,
A series circuit of a resistor R5 and a capacitor C1 connected between both ends of a DC power supply E, and a series circuit of a resistor R5 and a capacitor C1.
One end is connected to the connection point, and the other end is connected to the transistor Q2.
A starting circuit 3 is connected, consisting of a trigger element Q3, such as a diac, connected to the base of the trigger element Q3. The starting circuit 3 charges the capacitor C1 through the resistor R5 when the DC power supply E is connected, and when the terminal voltage of the capacitor C1 exceeds the breakover voltage of the trigger element Q3, the trigger element Q3 becomes conductive. transistor Q
A current flows through the base of transistor Q2 to turn on transistor Q2. Also, resistor R5 and capacitor C1
The anode of the diode D5 is connected to the connection point between the diode D3 and the diode D4, and the cathode of the diode D5 is connected to the connection point between the diode D3 and the diode D4.

The inverter device shown in FIG. 1 operates as follows. When the DC power supply E is connected, as mentioned above, the transistor Q2 is turned on, and before the transistor Q2 is turned on, there is a path from the resistor R5 to the diode D5 to the primary winding n1 of the transformer T. Since charge is accumulated in the DC cut capacitor C0 and capacitor C through the transistor Q
2 is turned on, the charges accumulated in capacitor C0 and capacitor C are released, and the primary winding n1 of transformer T → first diode D1 → transistor Q2
→ Capacitor C and load Ld → Capacitor C0 →
The current flowing through the loop circuit of the primary winding n1 increases, and the current induced in the secondary winding n22 of the transformer T becomes a forward bias for the transistor Q2, keeping the transistor Q2 in the on state. become. At this time, since the transistor Q1 is reverse biased by the current induced in the secondary winding n21, both transistors Q1 and Q2 are not turned on at the same time. Eventually, when the current flowing through the primary winding n1 of the transformer T begins to decrease, the direction of the current flowing through the secondary windings n21 and n22 is reversed, applying a reverse bias to the transistor Q2 and forward biasing the transistor Q1. It will take a while. After that, when the transistor Q2 turns off, the primary winding n1 of the transformer T tries to conduct current in the same direction, so the primary winding n1 → diode D3 →
Current flows through the path of DC power supply E → capacitor C and load La → capacitor C0 → primary winding n1, and the current induced in the secondary winding n21 of transformer T increases, causing a forward bias of transistor Q1. The current increases and turns on transistor Q1.

When the transistor Q1 is turned on, the resonant current is reversed and the current flows along the path of DC power supply E → transistor Q1 → primary winding n1 → capacitor C0 → capacitor C and load La → DC power supply E. Since the current induced in the secondary winding n21 forward biases the transistor Q1, the current flowing in the primary winding n1 of the transformer T increases, and the current induced in the secondary winding n21 increases.
1 is kept on. At this time, the secondary winding n22
Since a current flows in the direction that reverse biases transistor Q2, transistor Q2 does not turn on. Eventually, as the current begins to decrease, the secondary windings n21,
The direction of the current flowing through n22 is reversed, and the transistor Q1
is reverse biased and transistor Q2
becomes forward biased. Then, when transistor Q1 is turned off, the primary winding n1 of transformer T
tries to make the current flow in the same direction, so the primary winding n1
→ Capacitor C0 → Capacitor C and load Ld → Diode D4 → Primary winding n1 A current flows through the following path, and the current induced in the secondary winding n22 of the transformer T increases, and the forward bias of the transistor Q2 increases. The current increases and turns on transistor Q2. Eventually, the resonant current flowing through the load circuit 2 reverses and becomes 1
Next winding n1 → first diode D1 → transistor Q2 → capacitor C and load Ld → capacitor C0
→The current in the path of the primary winding n1 increases, and the transistor Q2 is kept in the on state. Thereafter, by repeating the above-described operation, both transistors Q1 and Q2 are controlled to be alternately and selectively turned on. In other words, by performing oscillation operation,
This allows a sinusoidal alternating current to flow through the load Ld.

Thus, in normal operation, current flows through the first diode D1, but current flows through the second diode D1.
Since no current flows through 2, no unnecessary loss occurs compared to the circuit configuration shown in FIG. By the way, at high temperatures, etc., the storage time of the transistors Q1 and Q2 becomes very long, and when such an abnormality occurs, the secondary windings n21 and n21 of the transformer T for each transistor Q1 and Q2 Even if a reverse bias current is applied from n22, it will take a long time to turn off, and there is a possibility that the other transistors Q1 and Q2 will turn on during that time. Even in such a case, since the base of transistor Q1 is connected to the collector of transistor Q2 through the second diode D2, the residual charge of transistor Q1 is extracted as soon as transistor Q2 is turned on, and transistor Q1
is forced off. That is, even in such a case, it is possible to prevent both transistors Q1 and Q2 from turning on at the same time. Also, in this configuration,
Even if there is a residual charge due to the presence of stray capacitance between the emitter and collector of transistor Q2, the influence on transistor Q1 is blocked by the second diode D2, so both transistors Q1 and Q2 are turned on at the same time. can be reliably prevented. Also, Figure 1
In the case of the configuration, since there is no diode between the emitter and base of the transistor Q1, there is an advantage that reverse bias can be easily applied to the transistor Q1.

For example, if a circuit as shown in FIG. 7 is configured (the position of the diode corresponds to the circuit shown in FIG. 6), the current induced in the secondary winding n21 of the transformer T causes the transistor to When applying reverse bias to Q1, secondary winding n21 → diode D6 → resistor R
Due to the formation of the loop circuit 3→secondary winding n21, a problem arises in that it is difficult to apply a reverse bias, but this problem does not occur in the circuit of FIG.

(Embodiment 2) In Embodiment 1, the oscillation operation was sustained by applying feedback using a transformer T, but in this embodiment, each switching element SW1, SW2 is connected to an external control signal Vc1 from
, Vc2 to sustain oscillation operation is disclosed.

That is, the basic configuration is the same as the conventional configuration shown in FIG.
, SW2 in the forward direction, and the anode of the second diode D2 whose cathode is commonly connected to the first diode D1 is connected to the output terminal of the level shift circuit 12 (i.e., on the high potential side). Furthermore, a diode D4 is connected in antiparallel to the series circuit of the first diode D1 and the switching element SW2 on the low potential side.
The difference is that they are connected.

According to this configuration, during normal operation, current flows only through the first diode D1 and no current flows through the second diode D2, so the loss is reduced compared to the configuration shown in FIG. . In addition, both switching elements SW
1, SW2 are turned on at the same time.
1, Vc2 occurs, the input of the tribe circuit 131 is pulled to a low potential through the second diode D2, so that the switching element S on the high potential side
W1 can be forcibly turned off, and both switching elements SW1 and SW2 can be prevented from being turned on at the same time. Furthermore, residual charges due to stray capacitance between both ends of the switching element SW2 on the low potential side are blocked by the second diode D2.
This prevents both from turning on at the same time.

[0025]

[Effects of the Invention] As described above, in the present invention, under normal conditions, the resonant current flows through the first diode inserted between both switching elements, and only the loss equivalent to one diode occurs. Therefore, compared to a configuration in which the resonant current always flows through two diodes, there is an advantage that loss is reduced. In addition, if a signal that turns on both switching elements simultaneously is input to the control terminals of both switching elements due to some abnormality, the potential of the control terminal of the higher potential side switching element is forcibly changed via the second diode. This has the advantage that both switching elements are prevented from being turned on at the same time. Furthermore, the residual charge due to stray capacitance between both terminals of the switching element on the low potential side is prevented from affecting the control terminal of the switching element on the high potential side by the second diode, so the residual charge causes a drop in both switching elements. This has the effect of preventing both from turning on at the same time.

In short, the second diode reliably prevents both switching elements from being turned on at the same time, and the resonant current flowing through the load circuit only flows through the first diode, thereby reducing loss. It can be done.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a first embodiment.

FIG. 2 is a schematic circuit diagram showing a second embodiment.

FIG. 3 is a schematic circuit diagram showing a conventional example.

FIG. 4 is an explanatory diagram of the operation of the conventional example corresponding to FIG. 3;

FIG. 5 is a schematic circuit diagram showing another conventional example.

FIG. 6 is a schematic circuit diagram showing still another conventional example.

FIG. 7 is a circuit diagram showing a comparative example.

[Explanation of symbols]

2 Load circuit E DC power supply D1 First diode D2 Second diode Q1 Transistor Q2 Transistor SW1 Switching element SW2 Switching element

Claims (1)

[Claims] 1. A pair of switching elements that are controlled to be turned on alternately and selectively, and a first diode inserted in the forward direction between both switching elements, connected in series between both ends of a DC power supply. The circuit is connected, and the anode of the second diode whose cathode is commonly connected to the first diode is connected to the control terminal of the switching element on the high potential side, and the switching element on the high potential side and the anode of the first diode are connected to each other. An inverter device characterized in that a load circuit is connected between a connection point of and one electrode of a DC power source.