JPH0313831B2 - - Google Patents

Info

Publication number
JPH0313831B2
JPH0313831B2 JP58226496A JP22649683A JPH0313831B2 JP H0313831 B2 JPH0313831 B2 JP H0313831B2 JP 58226496 A JP58226496 A JP 58226496A JP 22649683 A JP22649683 A JP 22649683A JP H0313831 B2 JPH0313831 B2 JP H0313831B2
Authority
JP
Japan
Prior art keywords
transistor
capacitor
base
circuit
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58226496A
Other languages
Japanese (ja)
Other versions
JPS60121962A (en
Inventor
Fuminori Nakaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Original Assignee
Toshiba Lighting and Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp filed Critical Toshiba Lighting and Technology Corp
Priority to JP58226496A priority Critical patent/JPS60121962A/en
Publication of JPS60121962A publication Critical patent/JPS60121962A/en
Publication of JPH0313831B2 publication Critical patent/JPH0313831B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/338Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Circuit Arrangements For Discharge Lamps (AREA)
  • Dc-Dc Converters (AREA)
  • Inverter Devices (AREA)

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、1石形のトランジスタインバータ装
置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a single-stone transistor inverter device.

(従来技術) 放電灯点灯装置等に用いられる1石ブロツキン
グ発振型インバータにおけるスイツチングトラン
ジスタのベース回路に、トランジスタのターンオ
ン特性を改善するためにLC直列共振回路を設け
たもの(たとえば特開昭58−170364号公報)にお
いては、ターンオン時にスイツチングロスが生ず
る欠点があることが分つた。
(Prior art) In order to improve the turn-on characteristics of the transistor, an LC series resonant circuit is provided in the base circuit of the switching transistor in a single-stone blocking oscillation type inverter used in a discharge lamp lighting device, etc. (for example, JP-A-58 170364), it has been found that there is a drawback that switching loss occurs during turn-on.

第2図はこのような従来の回路列の要部を示し
たものであり、N1はインバータトランスの入力
巻線、Trは入力巻線N1の入力をスイツチング
するトランジスタ、LはトランジスタTrのベー
スに接続されたインダクタ、N2は前記入力巻線
N1に磁気結合しその出力にて前記トランジスタ
Trのオン・オフを制御する制御巻線、C0はコ
ンデンサ、RdはインダクタLのダンピング抵抗
である。前記インダクタLと前記コンデンサC0
とがベース回路の直列共振回路を形成している。
C2は入力巻線N1等と並列共振回路を形成する
共振用のコンデンサ、R1は始動用の抵抗である。
Figure 2 shows the main parts of such a conventional circuit array, where N1 is the input winding of the inverter transformer, Tr is the transistor that switches the input of the input winding N1, and L is the base of the transistor Tr. A connected inductor, N2, is magnetically coupled to the input winding N1 and at its output connects to the transistor.
A control winding that controls on/off of the Tr, C0 is a capacitor, and Rd is a damping resistance of the inductor L. The inductor L and the capacitor C0
and form a series resonant circuit of the base circuit.
C2 is a resonant capacitor that forms a parallel resonant circuit with the input winding N1, etc., and R1 is a starting resistor.

このようなインバータ装置では、インダクタL
とコンデンサC0の直列共振回路によりターンオ
フを急速に行なう効果がある。
In such an inverter device, the inductor L
The series resonant circuit of the capacitor C0 and the capacitor C0 has the effect of rapidly turning off the capacitor C0.

しかし、ターンオフについては、トランジスタ
Trのオフ期間が終らないうちに制御巻線N2に
トランジスタTrをバイアスする極性の電圧VN2
が発生し、トランジスタTrのコレクタ電流Icに
は第3図cに示すようなベース電流Ibが流れる結
果、第3図aに示すようにヒゲ状のコレクタ電流
Ic1が発生してスイツチングロスを生ずることが
分つた。
But for turn-off, the transistor
A polarity voltage VN2 that biases the transistor Tr to the control winding N2 before the Tr off period ends.
occurs, and as a result, a base current Ib as shown in Figure 3c flows through the collector current Ic of the transistor Tr, resulting in a whisker-shaped collector current as shown in Figure 3a.
It was found that Ic1 was generated and caused switching loss.

この対策として第2図示のようにベース・エミ
ツタ間にコンデンサCtを接続すると、このコン
デンサCtに前記ヒゲ状の電流Ic1の原因となるベ
ース電流をバイパスすることによつて、前記のヒ
ゲ状のIc1の発生は防げる。
As a countermeasure for this, if a capacitor Ct is connected between the base and emitter as shown in the second figure, the base current that causes the whisker-shaped current Ic1 is bypassed to this capacitor Ct, and the whisker-shaped current Ic1 is can be prevented from occurring.

(発明が解決しようとする課題) しかしながら、反面ターンオフ時には前記コン
デンサCtが低インピーダンスのためベースのキ
ヤリアの引き抜きが悪くなり、コレクタ電流Icの
立下り時に第3図のIc2が発生してこれによるス
イツチングロスが生ずる欠点があつた。
(Problem to be Solved by the Invention) However, on the other hand, since the capacitor Ct has a low impedance during turn-off, the carrier extraction from the base becomes difficult, and when the collector current Ic falls, Ic2 shown in Fig. 3 occurs, which causes a switch failure. It had the disadvantage of causing long-term loss.

本発明は、前記の従来技術の問題点を解決する
ためになされたもので、トランジスタのターンオ
ン時およびターンオフ時のスイツチングロスを低
減して効率のよいトランジスタインバータ装置を
提供することを目的とするものである。
The present invention has been made in order to solve the problems of the prior art described above, and an object of the present invention is to provide an efficient transistor inverter device by reducing switching loss when turning on and turning off a transistor. It is something.

[発明の構成] (課題を解決するための手段) 本発明は、入力巻線への入力をオン・オフする
トランジスタのベース回路にインダクタおよびコ
ンデンサの直列回路を設けて、トランジスタのタ
ーンオフ特性を改善したものであつて、さらに、
前記トランジスタのベース・エミツタ間に、互い
に直列接続されたコンデンサおよびダイオードな
らびに前記ダイオードに並列接続された抵抗を有
してなるスナバ回路を、前記ダイオードの極性が
前記トランジスタのベース・エミツタの極性と同
じになるように設けたことを構成上の特徴とする
ものである。
[Structure of the Invention] (Means for Solving the Problems) The present invention improves the turn-off characteristics of the transistor by providing a series circuit of an inductor and a capacitor in the base circuit of the transistor that turns on and off the input to the input winding. In addition,
A snubber circuit comprising a capacitor and a diode connected in series with each other and a resistor connected in parallel to the diode is provided between the base and emitter of the transistor, and the polarity of the diode is the same as the polarity of the base and emitter of the transistor. The feature of the structure is that it is provided so that

(作用) 本発明の作用につき、まず、トランジスタのタ
ーンオフ時について説明する。トランジスタがオ
フ期間の最終部分において、制御巻線にバイアス
方向に電圧が発生しても、この電圧にて流れよう
とするベース電流はスナバ回路のコンデンサおよ
びダイオードの働きにてバイパスされるから、前
記トランジスタが不所望にオンすることがない。
ついで、トランジスタがオンするタイミングにな
ると前記スナバ回路にてバイパスされることな
く、トランジスタにベース電流が供給されてトラ
ンジスタはオンする。もちろん、スナバ回路の定
数は前記タイミングに合わせて予め設定されてい
るものである。
(Function) Regarding the function of the present invention, first, the time when the transistor is turned off will be explained. Even if a voltage is generated in the control winding in the bias direction during the final part of the transistor's off period, the base current that attempts to flow at this voltage is bypassed by the capacitor and diode of the snubber circuit. The transistor will not turn on undesirably.
Then, when the timing for turning on the transistor comes, the base current is supplied to the transistor without being bypassed by the snubber circuit, and the transistor is turned on. Of course, the constants of the snubber circuit are set in advance in accordance with the timing.

つぎに、ターンオフ時について説明する。トラ
ンジスタのベース回路に設けられた直列共振回路
の作用により、トランジスタのベース・エミツタ
間には引き抜き方向の電流が流れているが、本発
明においては、スナバ回路のコンデンサおよび抵
抗の直列回路が従来のコンデンサのみに比して高
インピーダンスであるため、前記引き抜きに悪影
響を及すことがないかあるいは少ない。したがつ
て、ターンオフ時のコレクタ電流の立下がり特性
がよい。前記直列共振回路のインダクタに蓄積さ
れたエネルギは、トランジスタのオフ期間にスナ
バ回路の抵抗およびコンデンサにてダンピングさ
れる。
Next, the turn-off time will be explained. Due to the action of the series resonant circuit provided in the base circuit of the transistor, a current flows in the drawing direction between the base and emitter of the transistor, but in the present invention, the series circuit of the capacitor and resistor of the snubber circuit is Since it has a higher impedance than a capacitor alone, it has no or little adverse effect on the extraction. Therefore, the fall characteristics of the collector current at turn-off are good. The energy stored in the inductor of the series resonant circuit is damped by the resistor and capacitor of the snubber circuit during the off period of the transistor.

(実施例) 以下本発明の実施例を第1図を参照して説明す
る。第1図において、D1,C1は交流電源を整
流平滑する整流器とコンデンサ、N1はインバー
タトランスTの入力巻線、C2は入力巻線N1に
並列接続された共振用のコンデンサ、Trはトラ
ンジスタ、N2はトランジスタTrの制御巻線、
D2は前記制御巻線N2とトランジスタTrのエ
ミツタの間に接続した逆電流防止用のダイオー
ド、C0およびLはベース回路の直列共振回路を
形成するコンデンサおよびインダクタ、R1は始
動用の抵抗、R2,D4はコンデンサC0の放電
回路を形成する抵抗とダイオード、N3はインバ
ータトランスTの出力巻線、Laは負荷としての
放電灯である。
(Example) An example of the present invention will be described below with reference to FIG. In Figure 1, D1 and C1 are rectifiers and capacitors that rectify and smooth the AC power supply, N1 is the input winding of the inverter transformer T, C2 is a resonance capacitor connected in parallel to the input winding N1, Tr is a transistor, and N2 is the control winding of the transistor Tr,
D2 is a reverse current prevention diode connected between the control winding N2 and the emitter of the transistor Tr, C0 and L are a capacitor and inductor forming a series resonant circuit of the base circuit, R1 is a starting resistor, R2, D4 is a resistor and diode forming a discharge circuit for capacitor C0, N3 is an output winding of inverter transformer T, and La is a discharge lamp as a load.

前記の回路において、トランジスタTrのベー
スと制御巻線N2の間に直列のコンデンサC3、
抵抗R3とこの抵抗R3に並列のダイオードD3
とよりなるスナバ回路を前記ダイオードD3の極
性が前記トランジスタTrのベース・エミツタと
同じ極性となるように接続している。
In the circuit described above, a capacitor C3 in series between the base of the transistor Tr and the control winding N2;
A resistor R3 and a diode D3 parallel to this resistor R3.
A snubber circuit consisting of is connected so that the polarity of the diode D3 is the same as that of the base emitter of the transistor Tr.

トランジスタTrによるスイツチングは、制御
巻線N2の出力に基づいてコンデンサC0とイン
ダクタLの直列共振回路を介して行なわれるが、
オフ期間が終る時点において流れようとするるベ
ース電流はオン期間が始まるまで前記スナバ回路
のコンデンサC3とダイオードD3によりバイパ
スされるので、第3図示のようなヒゲ状のIc1が
流れることはない。またターンオフはコンデンサ
C3、抵抗R3が比較的高インピーダンスなので
ベース・エミツタ間の電荷の引抜きがスムーズに
行なわれ、第3図示のようなIc2が流れることな
く、立下りが良好となる。またターンオフ直後の
インダクタLに残つたエネルギーはスナバ回路の
コンデンサC3と抵抗R3によりダンピングされ
るので、第3図示のようにインダクタLに並列に
ダンピング抵抗Rdを接続しなくてもさしつかえ
ない。
Switching by the transistor Tr is performed via a series resonant circuit of a capacitor C0 and an inductor L based on the output of the control winding N2.
The base current that is about to flow at the end of the OFF period is bypassed by the capacitor C3 and diode D3 of the snubber circuit until the ON period begins, so that the whisker-shaped Ic1 as shown in the third diagram does not flow. Further, at turn-off, since the capacitor C3 and the resistor R3 have relatively high impedance, the charge is drawn out smoothly between the base and the emitter, and the fall is good without Ic2 flowing as shown in the third diagram. Furthermore, since the energy remaining in the inductor L immediately after turn-off is damped by the capacitor C3 and the resistor R3 of the snubber circuit, there is no need to connect the damping resistor Rd in parallel to the inductor L as shown in the third diagram.

(発明の効果) 前述のように、本発明は、トランジスタのベー
スと制御巻線との間に直列共振回路を介挿したも
のであつて、トランジスタのベース・エミツタ間
に、直列にしたコンデンサ、抵抗とこの抵抗に並
列のダイオードとよりなるスナバ回路を、前記ダ
イオードの極性が前記トランジスタのベース・エ
ミツタと同じ極性となるように接続したので、前
記トランジスタのターンオフ特性を悪くすること
なく第3図示のような立上りのヒゲ状のIc1の発
生を防いでトランジスタのスイツチングロスを低
減することができる。したがつてトランジスタの
温度を下げ信頼性、効率を高めることができる。
しかも前記直列共振回路のインダクタに蓄積され
たエネルギーのダンピングを前記スナバ回路のコ
ンデンサおよび抵抗が兼ねるので、部品点数も削
減でき、安価に提供できる。
(Effects of the Invention) As described above, the present invention includes a series resonant circuit inserted between the base of the transistor and the control winding, and a capacitor connected in series between the base and emitter of the transistor. A snubber circuit consisting of a resistor and a diode in parallel with the resistor is connected so that the polarity of the diode is the same as that of the base and emitter of the transistor, so that the turn-off characteristics of the transistor are not deteriorated, as shown in Figure 3. It is possible to reduce the switching loss of the transistor by preventing the occurrence of the rising whisker-like Ic1. Therefore, the temperature of the transistor can be lowered and reliability and efficiency can be increased.
Moreover, since the capacitor and resistor of the snubber circuit also serve as damping of the energy accumulated in the inductor of the series resonant circuit, the number of parts can be reduced and the device can be provided at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の1実施例を示し、第2図は従
来例を示し、第3図はトランジスタの電圧、電流
波形を示す。 N1:入力巻線、N2:制御巻線、T:トラン
ス、Tr:トランジスタ、L:インダクタ、C
0:コンデンサ、C3,R3,D3:スナバ回
路。
FIG. 1 shows one embodiment of the present invention, FIG. 2 shows a conventional example, and FIG. 3 shows voltage and current waveforms of a transistor. N1: Input winding, N2: Control winding, T: Transformer, Tr: Transistor, L: Inductor, C
0: Capacitor, C3, R3, D3: Snubber circuit.

Claims (1)

【特許請求の範囲】 1 入力巻線および制御巻線を有するトランス
と;このトランスの制御巻線の出力をベース・エ
ミツタ間に印加されてオン・オフを制御され、前
記入力巻線への入力をスイツチングするトランジ
スタと; 前記制御巻線による前記トランジスタのベー
ス・エミツタへの制御出力供給回路に介挿された
インダクタおよびコンデンサの直列共振回路と; 互いに直列接続されたコンデンサおよびダイオ
ードならびに前記ダイオードに並列接続された抵
抗を有し、前記トランジスタのベース・エミツタ
間に前記ダイオードの極性がトランジスタのベー
ス・エミツタと同じ極性になるように設けられた
スナバ回路と; を具備したことを特徴とするトランジスタインバ
ータ装置。
[Scope of Claims] 1. A transformer having an input winding and a control winding; the output of the control winding of this transformer is applied between the base and emitter to control on/off, and the input to the input winding is controlled. a series resonant circuit of an inductor and a capacitor inserted in a control output supply circuit to the base and emitter of the transistor by the control winding; a capacitor and a diode connected in series with each other and a series resonant circuit connected to the diode; A transistor inverter comprising: a snubber circuit having a resistor connected thereto and provided between the base and emitter of the transistor so that the polarity of the diode is the same as that of the base and emitter of the transistor. Device.
JP58226496A 1983-11-30 1983-11-30 Switching circuit Granted JPS60121962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58226496A JPS60121962A (en) 1983-11-30 1983-11-30 Switching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58226496A JPS60121962A (en) 1983-11-30 1983-11-30 Switching circuit

Publications (2)

Publication Number Publication Date
JPS60121962A JPS60121962A (en) 1985-06-29
JPH0313831B2 true JPH0313831B2 (en) 1991-02-25

Family

ID=16846014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58226496A Granted JPS60121962A (en) 1983-11-30 1983-11-30 Switching circuit

Country Status (1)

Country Link
JP (1) JPS60121962A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0545114Y2 (en) * 1986-06-20 1993-11-17
JPH0451787U (en) * 1990-09-06 1992-04-30

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58170364A (en) * 1982-03-31 1983-10-06 Toshiba Electric Equip Corp Power supply

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58170364A (en) * 1982-03-31 1983-10-06 Toshiba Electric Equip Corp Power supply

Also Published As

Publication number Publication date
JPS60121962A (en) 1985-06-29

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