JPH04364046A - Semiconductor device - Google Patents

Abstract

PURPOSE:To accurately produce the source and drain electrodes of a field effect semiconductor device at a short interval so as to allow high operation frequency and eliminate leakage current between the source and drain electrodes so as to attain excellent voltage/current characteristics. CONSTITUTION:A Schottky electrode 2 is provided on the top plane of a semi- insulating substrate 1, a semiconductor activating layer 3 is formed on the semi-insulating substrate 1 over the electrode 2 by epitaxial growth, etc., and the Schottky electrode 2 is brought into Schottky contact with the semiconductor activating layer 3. Then, two ohmic electrodes 4 and 5 are provided on the semiconductor activating layer 3 and the ohmic electrodes 4 and 5 are brought into ohmic contact with the semiconductor activating layer 3.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device. Specifically, the present invention relates to a field effect semiconductor device using a semiconductor such as GaAs.

0002

2. Description of the Related Art FIG. 5 shows a sectional view of a conventional standard field effect transistor (FET) 51. A highly impurity semiconductor active layer 53 is formed on the surface of the low impurity semiconductor substrate 52 by epitaxial growth or the like, and a source electrode (
An ohmic electrode) 54 and a drain electrode (ohmic electrode) 55 are provided, and a gate electrode (Schottky electrode) 56 having a gate length b is provided between the source electrode 54 and the drain electrode 55.

[0003] In the FET 51 having such a structure,
In order to operate at a higher frequency, it is necessary to shorten the distance L between the source and drain electrodes in order to reduce the carrier migration distance, and furthermore, the distance L between the source and the gate and the distance between the drain and the gate c need to be exactly equal.

However, in the conventional example, since the gate electrode 56 exists in the middle due to its structure, the distance L between the source and drain electrodes was limited to about 5 μm. Further, since the source electrode 54 and the drain electrode 55 are formed at the same time, the distance L between the source and the drain can be made precise, but since the gate electrode 56 is formed separately, the distance a between the source and the gate and the distance between the drain and the gate can be made precisely. distance c
It was difficult to obtain the ratio accurately. For this reason, it has been difficult to adapt FETs with conventional structures to high frequency applications.

Furthermore, in the FET 51 having the above structure, a leakage current iL flows between the source electrode 54 and the drain electrode 55 through the high-resistance semiconductor substrate 52, as shown by the broken line in FIG. It was not possible to obtain accurate current-voltage characteristics.

Furthermore, if the distance L between the source and drain electrodes is reduced, the gate length b must be shortened accordingly, which inevitably increases the gate resistance.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the drawbacks of the conventional examples described above, and its purpose is to shorten the distance between source and drain electrodes and form them with high precision. It is an object of the present invention to provide a semiconductor device that can obtain a higher operating frequency by doing so, and can obtain good current-voltage characteristics by eliminating leakage current between the source and drain electrodes.

[0008]

[Means for Solving the Problems] A semiconductor device of the present invention includes:
A Schottky electrode is provided on the upper surface of the semiconductor substrate, a semiconductor active layer is formed on the upper surface of the semiconductor substrate so as to cover the Schottky electrode, the Schottky electrode is brought into Schottky contact with the semiconductor active layer, and the upper layer of the semiconductor active layer is formed. The semiconductor device is characterized in that two ohmic electrodes are provided in the semiconductor active layer, and at least a portion of each ohmic electrode is brought into ohmic contact with the semiconductor active layer.

[0009]

[Operation] In the semiconductor device of the present invention, two ohmic layers are formed in the upper layer of the semiconductor active layer due to the expansion of the depletion layer that spreads from the Schottky electrode provided on the lower surface of the semiconductor active layer into the semiconductor active layer. Source flowing between electrodes
The drain-to-drain current can be controlled.

In a semiconductor device having such a structure,
Since there is no Schottky electrode between the two ohmic electrodes, the distance between the ohmic electrodes can be easily reduced. Further, since the gate length of the Schottky electrode (gate electrode) is not restricted by the distance between the ohmic electrodes, the gate resistance can be reduced by increasing the width of the Schottky electrode.

Furthermore, a Schottky electrode is provided between the semiconductor active layer and the semiconductor substrate, and the depletion layer spreads from the semiconductor substrate side to the semiconductor active layer, so that the depletion layer spreads between the source and drain through the semiconductor substrate during cutoff. No leakage current flows, and good current-voltage characteristics can be obtained.

0012

Embodiment FIGS. 2(a), 2(b), and 2(c) are cross-sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. Figure 2
1 is GaAs
As shown in FIG. 2(a), a Schottky electrode 2 serving as a gate electrode is provided on the upper surface of the semi-insulating substrate 1. As shown in FIG. Next, in a region including the upper surface of the Schottky electrode 2 and its surroundings, a semiconductor crystal is grown on the upper surface of the semi-insulating substrate 1 by epitaxial growth or the like to form a semiconductor active layer 3. In this way, as shown in FIG. 2B, the semiconductor active layer 3 is formed to cover the Schottky electrode 2, and the Schottky electrode 2 is brought into Schottky contact with the lower surface of the semiconductor active layer 3. After this, as shown in FIG. 2(c), two electrodes are placed on top of the semiconductor active layer 3 to become a source electrode and a drain electrode.
Two ohmic electrodes 4 and 5 are provided, and each ohmic electrode 4
, 5 are brought into ohmic contact with the semiconductor active layer 3. The two ohmic electrodes 4 and 5 may be placed in the immediate vicinity of the Schottky electrode 2 with the gap between the electrodes 4 and 5, but as shown in FIG. It is preferable to position it directly above the key electrode 2 in terms of characteristics. Further, the ohmic electrodes 4 and 5 may be made separately, but if they are made at the same time, the dimensional accuracy will be good and the characteristics will be stable.

In the semiconductor active layer 3, a depletion layer 3a extends from the Schottky electrode 2. Source -
The drain-to-drain current i flows between one ohmic electrode 5 and the other ohmic electrode 4 through the semiconductor active layer 3, and is caused by increasing or decreasing the spread of the depletion layer 3a depending on the bias voltage applied to the Schottky electrode 2. , source-
The amount of current i between drains can be controlled. In particular, as shown in FIG. 1, when the depletion layer 3a extends over the entire thickness of the semiconductor active layer 3, the source-drain current i is completely blocked.

As mentioned above, the source-drain current i
Since there is a Schottky electrode 2 on the lower surface side of the semiconductor active layer 3, it does not flow through the semi-insulating substrate 1, so leakage current at the time of current cut-off can be completely eliminated, and a good current-voltage ratio can be achieved. characteristics can be obtained. Further, since the Schottky electrode 2 is not arranged between the ohmic electrodes 4 and 5, the distance H between the ohmic electrodes 4 and 5 (source-drain distance) can be reduced. Specifically, while the source-drain distance L in conventional FETs is approximately 5 μm, in the structure of this embodiment, the distance H between both ohmic electrodes 4 and 5 can be easily determined by photolithography. The thickness can be approximately 0.5 μm. Furthermore, if the accuracy of photolithography technology improves, the distance between the ohmic electrodes can be further reduced. As a result, the current path (carrier movement distance) between both ohmic electrodes 4 and 5 can be made sufficiently small, and good high frequency operating characteristics can be obtained.

FIG. 3 is a sectional view showing another embodiment of the present invention. In this embodiment, after forming the semiconductor active layer 3 on the Schottky electrode 2, the upper surface of the semiconductor active layer 3 is covered with an insulating protective film 6 without providing an ohmic electrode directly on the semiconductor active layer 3. ing. Furthermore, after removing a part of the insulating protective film 6 near the Schottky electrode 2 to partially expose the semiconductor active layer 3, ohmic electrodes 4 and 5 are formed on the insulating protective film 6. At the same time, parts of the ohmic electrodes 4 and 5 are brought into ohmic contact with the semiconductor active layer 3. According to this embodiment, the breakdown voltage of the Schottky electrode 2 can be improved by the insulating protective film 6.

FIG. 4 is a sectional view showing still another embodiment of the present invention. The Schottky electrode 2 does not need to be entirely covered with the semiconductor active layer 3 as in the embodiment of FIG. 1, but may be partially covered with the semiconductor active layer 3 as in this embodiment. .

[0017]

According to the structure of the present invention, since there is no Schottky electrode between two ohmic electrodes, the distance between the ohmic electrodes can be easily reduced. Furthermore, since the gate length of the Schottky electrode (gate electrode) is not restricted by the distance between the ohmic electrodes, the width of the Schottky electrode can be increased to reduce the gate resistance.

Furthermore, since a Schottky electrode is provided between the semiconductor active layer and the semiconductor substrate, and the depletion layer spreads from the semiconductor substrate side to the semiconductor active layer, the depletion layer spreads between the source and drain through the semiconductor substrate at the time of cut-off. No leakage current flows, and good current-voltage characteristics can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention and its operation.

FIGS. 2(a), 2(b), and 2(c) are cross-sectional views showing the manufacturing method of the above embodiment.

FIG. 3 is a sectional view showing another embodiment of the present invention.

FIG. 4 is a sectional view showing still another embodiment of the present invention.

FIG. 5 is a sectional view of a conventional example.

[Explanation of symbols]

1 Semi-insulating substrate 2 Schottky electrode 3 Semiconductor active layer 4,5 Ohmic electrode

Claims (1)

[Claims] 1. A Schottky electrode is provided on an upper surface of a semiconductor substrate, a semiconductor active layer is formed on the upper surface of the semiconductor substrate so as to cover the Schottky electrode, and the Schottky electrode is brought into Schottky contact with the semiconductor active layer, A semiconductor device characterized in that two ohmic electrodes are provided above a semiconductor active layer, and at least a portion of each ohmic electrode is brought into ohmic contact with the semiconductor active layer.