JPH0435377A - Liquid crystal driving circuit - Google Patents

Abstract

PURPOSE:To attain smooth display by magnifying and adding a gray area to a white/black edge part in the oblique direction by varying a generating timing of a gate start pulse of either an odd number or an even number field for each frame in response to an output of a field discrimination circuit. CONSTITUTION:This circuit is especially provided with an odd/even number field discrimination circuit 3 and a gate start pulse generating circuit 4 in which a generating timing of a gate start pulse of an even number field is varied for each frame in response to the output of the discrimination circuit 3. Moreover, the gate start pulse generating circuit 4 is provided with a changeover circuit 5 applying 1/2 frequency division to the output of the field discrimination circuit 3 to output a switching signal for each frame, a preset circuit 6 varying the preset value of the counter in response to the switching signal and a counter 7 starting the count of a horizontal synchronizing signal H with a vertical synchronizing signal V. Thus, the gray area of the edge is expanded and more smooth display with respect to the edge in the oblique direction is attained.

Description

[Detailed description of the invention] Industrial applications The present invention relates to a drive circuit for a liquid crystal display device.

2. Description of the Related Art In recent years, the number of devices using liquid crystal panels as display devices, such as small televisions and word processors, has increased significantly. Furthermore, liquid crystal projection display devices using a high-intensity light source, a liquid crystal light valve, and a projection lens have also been put into practical use, and it is thought that the applications of liquid crystal display devices will continue to expand in the future.

Hereinafter, a driving circuit for a liquid crystal display device will be described with reference to the drawings. FIG. 4 shows the basic configuration of a conventional liquid crystal panel. The liquid crystal panel is composed of screens A...F arranged in a matrix in the vertical and horizontal directions, and transistor switches that control the liquid crystal for each pixel.

The drive circuit is composed of an analog sample holder 1 that selects columns in the horizontal direction and supplies video signals, and a shift register 2 that selects rows in the vertical direction.

Next, these operations will be explained. The output of the analog sample holder 1 is connected to the sources of the transistor switches in each column to supply video signals. Analog sample holder 1
The sampling is performed using a sampling clock GK locked to the horizontal synchronization signal H of the video signal. The sampling starts with a start pulse ST for each scanning line of the video signal. Note that, as the start pulse ST, the output of a start pulse counter that counts a certain number of sampling clocks CK based on the horizontal synchronization signal H is used.

Further, the output of the shift register 2 is connected to the gate of the transistor switch. The operation is performed using a gate clock G, and starts with a gate start pulse GST for each field. Note that the gate clock G uses a horizontal synchronization signal H, and the gate start pulse GST uses the output of a gate start pulse counter that counts a fixed number of horizontal synchronization signals H based on the vertical synchronization signal V of the video signal.

Figure 5 shows an example of displaying an NTSC broadcasting system video signal on 240 vertical LCD panels using the above basic configuration.Since the number of vertical display lines is only about half of the video signal, interlaced scanning is not possible. Therefore, the scanning lines of odd-numbered fields and the scanning lines of even-numbered fields are both displayed on the same display line.

Problems to be Solved by the Invention However, the liquid crystal drive circuit having the above configuration has the following major problems.

For example, when displaying diagonal black and white edges (the edge positions of adjacent scanning lines change every Nli elements in the horizontal direction) as shown in Figure 5, the number of vertically displayed lines is only half that of the broadcast signal. Therefore, the edge positions of adjacent display lines are every 2N pixels in the horizontal direction. Here, since odd-numbered and even-numbered edge portions are alternately overwritten on the same display line, they are averaged over time and a visually gray area of N pixels is created. Although the gray area has the effect of smoothing the edge portion, it is insufficient for the step-like edge change of 2N @ bare, resulting in a jagged display.

In view of the above-mentioned problems, the present invention seeks to provide a drive circuit that can provide smoother display.

Means for Solving the Problems In order to solve the above problems, the liquid crystal drive circuit of the present invention includes a circuit for determining odd/even fields of a video signal, and a horizontal synchronization signal that starts counting the horizontal synchronization signal with the vertical synchronization signal. A gate start pulse generation circuit that varies the generation timing of the gate start pulse for each frame in odd or even fields according to the output of the discrimination circuit, and a vertical A vertical scanning circuit consisting of a gated shift register that starts scanning is used.

With this configuration, the 2Mth scanning line of the even field is alternately displayed on adjacent display lines every frame, and is overlaid on the 2M-1st scanning line and the 2M+1st scanning line of the odd field, respectively. When the value is 0 or more, the gray area of the edge portion expands, and smoother display of diagonal edges becomes possible.

Example Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the basic configuration of the present invention.Compared to the conventional example shown in FIG. A variable gate start pulse generation circuit 4 is newly constructed.

The gate start pulse generation circuit 4 includes a switching circuit 5 that divides the output of the field discrimination circuit 3 into half and outputs a switching signal for each frame, and a preset circuit that changes the precent value of the counter according to the switching signal. 6, and a counter circuit 7 which is provided with a preset terminal and starts counting the horizontal synchronizing signal H with the vertical synchronizing signal V.

FIG. 2 shows an example of a timing chart of the gate start pulse. In the odd frame, the horizontal synchronization signal H is counted once with the vertical synchronization signal (2) as a reference, along with the odd and even fields, to generate the gate start pulse GST. On the other hand, for even frames, the odd field is counted once, the even field is counted twice, and the gate start pulse GS is
Generate T. Therefore, the display position of the even-numbered scanning line is repeatedly shifted by one line and returned to the original position for each frame.

A display example in this case is shown in Figure 3. The 2M-1st (odd numbered) scanning line is always displayed on the Mth display line, and the 2Mth (even numbered) scanning line is displayed on the Mth display line. and M.
When 0 or more displayed for each frame on the +1st display line are averaged over time, the visually gray area expands. In the conventional example shown in FIG. 5, the gray area is horizontally Ni! The number of pixels is i, but in the case of FIG. 3, it is twice as many as 2N pixels.

Effects of the Invention As described above, by using the liquid crystal drive circuit of the present invention, the correlation in the vertical direction of the image can be taken on a liquid crystal panel having approximately half the number of scanning lines of the video signal, and the black and white edges in the diagonal direction can be By enlarging and adding a gray area to the area, smooth display is possible.

[Brief explanation of the drawing]

FIG. 1 is a basic block diagram of an embodiment of the liquid crystal drive circuit of the present invention, FIG. 2 is a timing chart of the gate start pulse of the present invention, and FIG. 3 is a diagram showing an example of display using the liquid crystal drive circuit of the present invention. , FIG. 4 is a basic block diagram of a conventional liquid crystal drive circuit, and FIG. 5 is a diagram showing an example of a conventional display. 3...Field discrimination circuit, 4...Gate start pulse generation circuit, 5...Switching circuit, 6...Preset circuit, 7...・
counter circuit. Name of agent: Patent attorney Shigetaka Awano, 1 person Figure 2 1 Figure 5--Ichibara Daigon 6-1-F'Rise Soto Circuit γ-゛η Kung Circuit and α No. 7 Odd Numbers 7 Ramund L No Kuzu Number frame〉 → Gokan → Time chart kol)) <4 number frame (Q) Ku odd number child I'II number 7 number frame

Claims (1)

[Claims] A video signal odd/even field discrimination circuit and a vertical synchronization signal start counting the horizontal synchronization signal, and depending on the output of the field discrimination circuit, the generation timing of the gate start pulse is set to 1 in either the odd or even field. It is characterized by having a vertical scanning circuit composed of a gate start pulse generation circuit that varies for each frame, and a gate shift register that uses a horizontal synchronization signal as a clock and starts vertical scanning with the output of the gate start pulse generation circuit. LCD drive circuit.