JPH04352591A - Image data compressing circuit - Google Patents

Abstract

PURPOSE:To obtain the image data compressing circuit reducing error. CONSTITUTION:When a sharp edge is contained in inputted image data, a data converter selector 40 selects a data converter group with the large number of output quantizing bits for the unit of a block and a data converter selector 50 selects an optimum data converter from the selected data converter groups for the unit of a picture element. By compressing the image data in a data conversion part 30 while using the data converter selected in this way, the error to a source image conventionally concentrated at the edge of the image is reduced, and a satisfactorily decoded image can be obtained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data compression circuit included in a device such as a digital electronic still camera that converts image information into digital data and records the data on a storage medium.

0002

2. Description of the Related Art A digital electronic still camera converts an optical image of a subject into digital data and records this digital data in a storage device such as an IC memory card. Since such digital data has a huge amount of data, data compression is essential in order to store it in a storage medium with a limited capacity.

Various types of conventional data compression methods have been proposed. For example, DPCM method (differential pulse code modulation method) that utilizes the correlation between adjacent pixels
Or, n × consisting of n pixels vertically and n pixels horizontally within the screen.
For example, the DCT method (discrete cosine transform method) divides the image into blocks of n pixels and uses the correlation within each block.

FIG. 9 is a signal processing block diagram of a digital electronic still camera using the conventionally known DPCM system. In the figure, a video signal output from a CCD 201 is amplified by an amplifier 202, and separated into three colors, for example, R, G, and B, by a color separation circuit. R.G.
Each B signal is processed by a gamma circuit 204 and a white balance circuit 205, and these signals are converted into digital signals by an A/D conversion circuit 206. The converted signal is temporarily stored in field memory 207. Then, image data is read out from this field memory 207 and encoded by a DPCM encoding circuit 208. This signal is written to a storage medium 210 such as an IC memory card via a buffer memory 209.

Next, as an example of the DPCM encoding circuit 208, a pixel adaptive DPCM encoding circuit is shown in FIG. This method predicts the sample value X0 of the pixel of interest from the preceding sample value, and
and its predicted value X0, the prediction error signal ε0 ε
0 = X0 - X0 into a data amount smaller than the image data amount of input pixel data.

As a prediction method, as shown in FIG. 8(a), the pixel to the left of the pixel of interest is set to X1, and the pixel directly above it is set to X2.
, there is a two-dimensional three-point prediction in which the predicted value is X0 = 1/2X1 + 1/4 (X2 + X3) when the upper right pixel is X3.

Furthermore, the pixel adaptive DPCM method includes a plurality of data converters for data compression, and selects and switches the data converter for each pixel based on the decoded value of the prediction error signal of the preceding pixel that has already been obtained. ing. Here, the decoded value is the output signal of the data inverse converter in FIG.

For example, when selecting a data converter, as shown in FIG. 8(b), the decoded value of the prediction error signal at the pixel to the left of the pixel to be data compressed is set to ε1, and the decoded value of the prediction error signal at the pixel directly above is set to ε1. If ε2 is ε2, the selection index εp is expressed by the following equation.

[0009] εp = 1/2 (|ε1 |+|ε2 |
) That is, the method attempts to select an appropriate data converter by predicting how much prediction error signal there will be to be data compressed based on the value of εp.

0010

However, in such a conventional pixel adaptive DPCM encoding circuit, errors with the original image tend to occur at edge portions where the brightness of pixels changes sharply. This is because the data converter is designed to reduce errors in flat parts of images that are easily noticeable to the human eye, and when the input prediction error signal is small,
This is because quantization is performed in fine steps, whereas as the input prediction error signal becomes large, it is quantized coarsely. Therefore, at the edge portion of the image where the value of the prediction error signal increases, a composite signal containing many errors will be obtained.

An object of the present invention is to solve these problems and provide an image data compression circuit with fewer errors.

0012

[Means for Solving the Problems] In order to solve the above problems, the image data compression circuit of the present invention divides input image data into a plurality of blocks, and divides the input image data into a plurality of blocks according to the amount of change in brightness of each block. A data converter group selection section that selects an optimal data converter group in block units; and data that selects an optimal data converter for each pixel from among the data converter groups selected by the data converter group selection section. a converter selection section;
A plurality of data converter groups each consisting of a plurality of data converters with different data conversion characteristics are provided for each number of output quantization bits, and input image data is compressed using the data converter selected by the data converter selection section. A data conversion section is provided.

[0013]

[Operation] Since the image data compression circuit of the present invention is configured as described above, if the input image data contains steep edges, the data converter group selection section selects the number of output quantization bits. A large data converter group is selected block by block, and the data converter selection section selects an optimal data converter from the selected data converter group pixel by pixel. By compressing the image data in the data converter using the data converter selected in this way, errors with the original image are reduced. In addition, in the case of image data with flat brightness, the data converter group selection section selects a data converter group with a small number of output quantization bits in units of blocks, and selects the optimal data converter group from the selected data converter group. A data converter selection section selects a data converter pixel by pixel. By compressing the image data in the data converter using the data converter selected in this way, an increase in the amount of data can be suppressed.

[0014]

[Example] Hereinafter, with reference to FIGS. 1 to 6 of the accompanying drawings,
A first embodiment and a second embodiment of the present invention will be described.

FIG. 1 is a block diagram of an image data compression circuit according to a first embodiment of the present invention. The image data compression circuit of the first embodiment includes an input terminal 10 to which image data is input.
, a block line memory 20 that stores input image data for each block line, and a value X0 of the pixel of interest.
an adder 25 for subtracting the predicted value
0, a data converter group selector 40 that selects a data converter group to be used in the data compressor 30, and a data converter selector 50 that selects a specific data converter by calculating a selection index εp. a data adder 60 that adds a data converter group number to the image data compressed by the data compressor 30;
An output terminal 70 to which output data from the data adder 60 is given, and a local decoder 8 that decodes the data compressed by the data compressor 30 and prevents the accumulation of errors that occur during decoding.
0 is provided. The data compressor 30 includes a plurality of data converter groups 31 and 32 having different numbers of output quantization bits.
, 33, and switches 34, 35, and 36 for selecting a specific data converter using a signal from the data converter selector 50,
A switch 37 for selecting a specific data converter group based on a signal from the data converter group selector 40 is provided. Here, different numbers of output quantization bits mean different data compression rates. Furthermore, each data converter included in the data converter group 31 converts, for example, 8-bit data into 3
It has the ability to compress data into bits. Local decoder 80
includes a plurality of data inverse converter groups 81, 82, 83 that are paired with the data converter groups 31, 32, 33, and a switch that selects a specific data inverse converter using a signal from the data converter selector 50. 84, 85, 86, a switch 87 for selecting a specific data inverse converter group using the signal from the data converter group selector 40, and a prediction error signal ε0 from the switch 87.
an adder 88 that adds the predicted value X0 and an adder 25
A predictor 89 that generates a predicted value X0 to be given to is provided. The data inverse converter group 81 has a function of decoding, for example, 3-bit data into 8-bit data. Furthermore, the data converter group number may be added by the data adder 60 to the beginning or end of each block of image data, or may be added to the beginning of the image data as header information.

Next, the operation of the first embodiment will be explained. Image data applied to the input terminal 10 is divided into two paths. One path is an input to the block line memory 20, which stores data for one block line. Here, one block line refers to the same number of lines as the number of pixels in the vertical direction of the block, as shown in FIG. Another path is the input to data converter group selector 40. The selection rule for the data converter group is, for example, DP as shown in FIG.
Using the prediction error signal of the CM circuit as an index, switching may be performed according to the maximum absolute value of the prediction error signal within the block (hereinafter referred to as |ε|max). Data converter group 31
~33 is when the image data in the block contains a steep edge (when |ε|max above is large),
A group of data converters with many output quantization bits (for example, Fig. 3 (
c)), and when the image data in the block is flat (when |ε|max above is small), a group of data converters with small output quantization bits (for example, Fig. 3(a)) is selected.
Select.

While one block line worth of image data is stored in the block line memory 20, a data converter group selector 40 selects a data converter group to be used in each block. Then, when reading data from the block line memory, the switches 37 and 87 are switched to transfer one block of image data to a desired data converter group. Furthermore, the switch 3 is
4 to 36, and compresses the sent image data using the most suitable data converter for each pixel. The instructions from the data converter selector 50 to the switches 34 to 36 are as follows:
The decoded value of the image data generated from the prediction error signal of the preceding pixel is input from the local decoder 80, and the pixel adaptive DPCM
The method is used to select the optimal data converter for each pixel. The image data compressed in this manner is sent to the data adder 60, the data converter group number used in each block is added, and the data is sent to the output terminal 70.

Next, a second embodiment will be explained using FIG. 2. The configuration of the second embodiment differs from the first embodiment described above in that the block line memory 20 is replaced by one block line memory 20.
A field memory 90 for storing image data for a screen is used, and a bit rate calculator 91 is provided in the data converter group selector 40. This bit rate calculator 91 is connected to the data converter selector 40
bit rate after encoding the image (
The number of bits per unit pixel: the value obtained by dividing the data amount of all one screen after encoding, expressed in bits, by the number of pixels of all one screen) is calculated.

Next, the operation of the second embodiment will be explained. The image data applied to the input terminal 10 is temporarily stored in the field memory 90, and first, a data converter group to be used in a block of one entire screen is determined according to a predetermined data converter group selection rule. Each data converter group has a predetermined different number of bits, but since the converters in the same converter group have the same number of output bits, once the converter group to be used is determined, each block It is possible to calculate the bit rate after encoding. Therefore, next, the bit rate after encoding is calculated using the bit rate calculator 110. Here, if the bit rate is different from the target bit rate, the selection rule of the data converter group selector is changed and the above operation is repeated. For example, the index for selecting the data converter group is the same as in the first embodiment.
When ε|max, there is a method in which the data converter group selection rules are as shown in the table below, and the value of the rate value m is changed so that the target bit rate is achieved. In the following table,
Furthermore, examples in the case of m=2 and 8 are also shown.

[0020]

[0021]

[Table 1]

From this table, it can be seen that the smaller the value of m, the more a data converter with a larger number of quantization bits is selected even in a block where the maximum absolute value of the prediction error signal is smaller. This selection improves the image quality, but increases the amount of encoded data (ie, bit rate) for the entire image. Here, a flowchart for calculating the target bit rate is shown in FIG. In FIG. 6, first, |ε|max of each block is determined by prescanning (step 100).
. Then, an initial value of m is set, and the bit rate is calculated according to the selection rule (step 101). next,
It is checked whether the calculation result is within the target bit rate (step 102), and if it exceeds the target bit rate, the value of m is gradually increased (step 103). The loop from step 101 to step 103 is repeated to find a value of m that ultimately falls within the target bit rate. Then, after determining the rate value m of the target bit rate, encoding is performed in accordance with the rate value m and the data is output.

As described above, in the second embodiment, the number of output quantization bits is switched for each block depending on the amount of edges included in that block, so an image with sharp brightness changes and an image with flat brightness changes can be distinguished. The amount of data after data compression differs. When the above data is stored in a storage medium with limited capacity, such as an IC memory card, the number of images that can be stored changes. By prescanning this image, the selection rules for the data converter group can be adjusted for each block, and the amount of data for the entire screen after data compression can be made constant. This function makes it easy to manage the number of stored images.

Note that the selection index for the data converter group is not limited to the prediction error signal shown in the embodiment, but there is also a method using, for example, the standard deviation of the luminance values of pixel data.

Furthermore, although this embodiment has been described using the DPCM method as an image data compression method, other image data compression methods such as DCT may also be used.

[0026]

[Effects of the Invention] As explained above in detail, the image data compression circuit of the present invention divides one screen worth of image data into multiple blocks, and blocks containing steep edges have a large number of output quantization bits. The data conversion unit encodes the image,
For a block containing only a flat image, the image is encoded by a data conversion unit with a small number of output quantization bits. By such an operation, errors with the original image, which conventionally were concentrated at the edges of the image, are reduced, and a good decoded image can be obtained.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an image data compression circuit according to a first embodiment.

FIG. 2 is a configuration diagram of an image data compression circuit according to a second embodiment.

FIG. 3 is a diagram showing an example of characteristics of a data converter.

FIG. 4 is a conceptual diagram showing image data for one screen.

FIG. 5 is a configuration diagram showing a DPCM circuit.

FIG. 6 is a flowchart of bit rate calculation.

FIG. 7 is a configuration diagram of a pixel adaptive DPCM encoding circuit according to a conventional example.

FIG. 8 is a conceptual diagram showing the configuration of a pixel.

FIG. 9 is a signal processing block diagram of a conventional digital electronic still camera.

[Explanation of symbols]

10...Input terminal 20...Block line memory 30...Data compressor 40...Data converter group selector 50...Data converter selector 60...Data adder 70...Output terminal 80...Local decoder

Claims (4)

[Claims] 1. A data converter group selection unit that divides input image data into a plurality of blocks and selects an optimal data converter group for each block according to the amount of change in brightness of each block; a data converter selection section that selects an optimal data converter for each pixel from among the data converter group selected by the data converter group selection section; and a data converter group consisting of a plurality of data converters with different data conversion characteristics. an image data compression circuit comprising: a plurality of data converters for each number of output quantization bits, and a data converter that compresses input image data using the data converter selected by the data converter selector. . 2. The method is characterized in that the selection rule of the data converter group selector is changed for each block by pre-scanning the input image, and the data amount of the entire screen after data conversion is controlled to be constant. An image data compression circuit according to claim 1. 3. The image data compression circuit according to claim 1, wherein the data converter group is selected using a value calculated using a prediction error signal value in each block as an index. 4. The image data compression circuit according to claim 1, wherein the data converter group is selected using the maximum absolute value of the prediction error signal value in each block as an index.