JPH04352534A - Address comparing system for communication control equipment - Google Patents

Abstract

PURPOSE:To efficiently execute the reception of frames and stripping with a little hardwares even when an equipment has plural terminal addresses concerning the address comparing system for a communication control equipment used for the data reception processing of a local area network. CONSTITUTION:One address register 2 stores a common address part Acom among terminal addresses A1-An set to plural terminal equipments 1-1 to 1-n, and the value of the address register 2 is compared with a part corresponding to the common address part Acom for the terminal of a reception address RA. Concretely, a control register 4 is provided with a mask bit to set the existence of address comparison for the unit of a bit and based on the mask bit of the control register 4, a comparison part 3 compares the value of the address register 2 with the reception address RA.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an address comparison method for a communication control device used for data reception processing in a local area network. A terminal device connected to a local area network (hereinafter referred to as "LAN") has a MAC address as a unique terminal address, and this terminal device is connected to a transmission path of the LAN via a communication control device. The communication control device compares the received address and the MAC address, and if the addresses match, filters the received data (received frame) and sends it to the terminal device for data processing. Further, in a token ring or the like, when it is determined that the received address and the MAC address match, a stripping process is performed to erase the frame transmitted by itself from the transmission path. Furthermore, there are cases where a plurality of terminal devices are connected to the communication control device, and in this case, a plurality of MAC addresses are set in the communication control device and the addresses are compared. As communication speeds increase, address comparison processing using software takes too much time, so address comparison processing is performed using hardware. However, the number of registers that store MAC addresses increases in accordance with the number of terminals, and the address comparison circuit corresponding to the number of address registers also becomes complex, so improvements in this point are desired. [0003] Conventionally, in the LAN shown in FIG. 7, a communication processing device 5 is connected to a transmission path 4, and one communication processing device 5 usually uses one MAC address (terminal address). It carries out mutual communication by setting its own MAC address and the other party's MAC address in the transmitted data. [0004] By setting such a communication address, transmission to a target device can be realized in a network environment in which a plurality of communication processing devices 5 are connected. Generally, a frame as shown in FIG. 8 is used for communication. In Figure 8,
The destination address DA area contains the communication destination M.
Stores the AC address. This area of the destination address DA becomes a filtering target in which the received frame is taken into the device when an address match is obtained by comparison with the own MAC address. [0005] In the area of source address SA, communication source M
Stores the AC address. When the source address SA area is compared with its own MAC address and an address match is found, it becomes a stripping target for erasing the received frame from the transmission path in a token ring or the like. On the other hand, as the communication processing device 5, as shown in FIG. may process multiple communication requests at once. In this case, if one address is assigned to one communication request source, the communication control module 6
There are MAs equal to the number of communication processing processors 1-1 to 1-3.
It is necessary to memorize the C address and receive only communication data whose destination address DA of the received frame is equal to the stored MAC address. Processing methods for this address comparison include a software method and a hardware method. [0007] In the address comparison method using software, all transmitted data is once received, the destination address DA of each data is checked, and those that do not match the own MAC address are discarded, and those that match are sent to the corresponding device. Transfer data to. For general low-speed transmission lines, a software-based address comparison method is sufficient. [Means for Solving the Problems] However, in the software-based address comparison method, the software processing time in communication processing increases, and as the transmission path becomes faster, the processing time becomes longer. For example, in a system having a high-speed transmission line such as FDDI (Fiber Distributed Digital Interface), the software processing time becomes a bottleneck, and the high-speed transmission line may not be fully utilized. In that case, it is necessary to perform some kind of processing using hardware to reduce the software processing time. Although the hardware-based address comparison method has sufficient processing performance, it is necessary to store and compare a large number of MAC addresses corresponding to the number of communication processors, which increases the amount of hardware and costs. Furthermore, in the case of token ring, which is a form of LAN, when a frame transmitted by the own device returns from the transmission path, the source address SA of the frame and the own MAC
The addresses must be compared and if they are equal, the frame must be stripped (erased). This is because if stripping is not performed, the data will continue to circulate on the transmission path forever and no other transmission will be possible. [0011] Frame stripping cannot be processed by software and must be performed by hardware. For this reason, the address comparison method in Token Ring is inevitably hardware-based, and it is necessary to store and compare a large number of MAC addresses corresponding to the number of communication processors, which increases the amount of hardware and costs. occurs. The present invention has been made in view of these conventional problems, and it is possible to efficiently receive and strip data with less hardware even in a device having multiple terminal addresses. The purpose of this invention is to provide an address comparison method for a communication control device. [Means for Solving the Problems] FIG. 1 is a diagram illustrating the principle of the present invention. First, the present invention addresses addresses A1, A2,...
A plurality of terminal devices 1-1, 1-2,...1 having An
-n is connected, and reception processing or reception frames that captures reception data and outputs it to the corresponding terminal device based on the comparison result of the reception address RA from the transmission path 4 and the terminal addresses A1, A2, . . . An The present invention is directed to an address comparison method for a communication control device that performs a stripping process to erase data from the transmission path 4. In the present invention, as an address comparison method for such a communication control device, as shown in FIG. 1(a),
An address register 2 that stores an address common part Acom of terminal addresses A1 to An set in a plurality of terminal devices 1-1 to 1-n, and a value of the address register 2 and a terminal address common part Acom of the reception address RA correspond to each other. The feature is that a comparing section 3 is provided for comparing the two parts. Specifically, a control register 4 shown in FIG. 1B is provided which is equipped with a mask bit for setting whether or not the address comparison is to be performed by the comparison unit 3 on a bit-by-bit basis, and the comparison is performed based on the mask bit of the control register 4. The feature is that the value of the address register 2 and the received address RA are compared in the section 3. In addition, when the terminal address is a continuous binary number address, the address register 2 contains an address common part Acom common to all terminal addresses A1 to An.
It consists of a single register that stores . On the other hand, if the terminal address is not 2n consecutive addresses, the address register 2 is stored in the address common part Acom obtained for each one or more terminal addresses among the plurality of terminal devices 1-1 to 1-n. It consists of multiple registers that store . Furthermore, as shown in FIG. 1(b), a control register 4 is provided which includes a reception instruction bit for instructing frame reception processing and an erasure instruction bit for instructing frame stripping processing. For example, the comparator 3 is instructed to compare the destination address DA in the frame, and when an address match is obtained, the frame reception process is executed.On the other hand, if the erasure instruction bit is valid, the frame transmission source is It is characterized in that it instructs the comparator 3 to compare with the address SA and executes the stripping process when an address match is obtained. [0017] According to the address comparison method of the communication control device according to the present invention having such a configuration, the following effects can be obtained. First, the MAC addresses of the plurality of terminal devices 1-1 to 1-n are represented by binary numbers on hardware. Assuming that the MAC address is 8 bits, (0000 0000)2 ~ (1111 111
1) Up to 256 addresses can be assigned. [0018] Now, hypothetically, there are four terminal devices 1- whose MAC addresses from (0000 0000) 2 to (0000 0011) 2 are connected to the communication control device.
Suppose that it is assigned to 1 to 1-4. The common point among these four MAC addresses is that "the upper 6 bits are 0." Therefore, it is no longer necessary to provide four address registers in the communication control device to store four addresses, but to provide only one address register 2 that stores the upper 6 bits of all 0s as a common part of the address. 3, it is sufficient to compare the corresponding reception address part. [0019] Also, the comparison unit 3 outputs the filtered received frames whose addresses have been matched to the terminal devices 1-1 to 1-1.
Firmware must perform the process of distributing addresses 1 to 4, but this distribution can be determined by comparing the lower two bits of the received address for which no address comparison was performed in the comparison unit 3 with the lower two bits of the MAC address. There is no need to process address data unrelated to terminal distinction in the upper 6 bits, and the load on firmware is reduced. Furthermore, if the bit positions in the address that are not to be compared can be designated by mask bits, even terminal addresses other than 2n can be processed without waste by using a plurality of registers smaller than the total number of terminal addresses. For example, in the case of an 8-bit MAC address, (00
00 0001)2 ~(0000 1001)2
When 9 types of addresses are set, the register
Mask bits 0000 0001
0000 00000000 00
1x 0000 0001
0000 01xx 0
000 00110000 100x
0000 0001, what originally required nine address registers can be reduced to just four address registers, which is less than half the number. Furthermore, by providing a reception instruction bit and an erasure processing bit in the control register 4, frame filtering processing (reception processing) and frame stripping processing (erasure processing) can be performed using the same address register 2. It is possible to reduce the amount of hardware required for registers that store MAC addresses. Embodiment FIG. 2 is a block diagram showing an embodiment of a communication control device in which address comparison according to the present invention is performed together with a terminal device. In FIG. 2, a communication control module 6 as a communication control device constitutes a communication processing device together with communication processing processors 1-1 to 1-3 as terminal devices, and is connected to a transmission line 4 as shown in FIG. . When a communication request is made from any of the communication processors 1-1 to 1-3,
The transmission frame shown in FIG. 8 is created and sent to the transmission path 4. The communication control module 6 includes a modem 60, an address comparison circuit 61, and an MPU (microprocessor) 6.
2 and MPX (multiplexer) 63. The modem 60 modulates and demodulates frame data with the transmission line 4. The address comparison circuit 61 is hardware that realizes the address comparison method of the present invention, and produces a DA match output when the destination address (destination address) DA of the received frame matches the MAC address, and outputs a DA match output when the destination address (destination address) DA of the received frame matches Address) Generates an SA match output when the SA and MAC address match. The MPU 62 executes filtering processing to output the data of the received frame to the terminal side in response to the DA matching output from the address comparison circuit 61, and stripping processing to erase the received frame from the transmission path 4 based on the SA matching output. Execute processing. The MPX 63 is controlled by the MPU 62 to select one of the communication processors 1-1 to 1-3 whose MAC address has been determined, and sends the received frame data. Of course, at the time of transmission, one of the communication processors 1-1 to 1-3 that made the communication request is connected to the MPU 62. FIG. 3 is a block diagram of an embodiment of the address register 2 provided in the address comparison circuit 61 of FIG. Divided into lower parts, 3
It consists of two MAC address registers MAR0 to MAR2. FIG. 4 is a block diagram of an embodiment of the control register (CCR) 4 provided in the address comparison circuit 61 of FIG. 2, and uses, for example, a 16-bit register. In FIG. 4, bit 00 of control register 4 is used as a reception instruction bit, and bit 0
1 is used for the stripping indication bit. When bit 1 is set in reception instruction bit 00, the reception instruction becomes valid, and SA match output is performed based on the match between the MAC address and the source address SA. Further, when bit 1 is set in the stripping instruction bit 01, the stripping instruction becomes valid, and a DA match output is performed based on the match between the MAC address and the destination address DA. Bits 08-1 of control register 4
5 is used for mask bits. In this embodiment, for example, bit 40 of MAC address register 2 shown in FIG.
The lower 8 bits of ~47 are used for the MAC address, so the mask bit of control register 4 is also M
Eight bits corresponding to bits 40 to 47 of the AC address are prepared. FIG. 5 shows the address comparison circuit 61 shown in FIG.
FIG. 2 is an embodiment circuit diagram showing the main parts of the system. In Figure 5,
10-1 to 10-6 are comparison circuits, and MA of the frame.
Since C address data is received sequentially in units of 1 byte (8 bits), six comparison circuits 10-1 to 10- are divided into units of 1 byte for a 48-bit MAC address.
It consists of 6. The received MAC address, specifically, the destination address DA or source address SA, is commonly input to one input terminal of the comparison circuits 10-1 to 10-6. The address value stored in the MAC address register 2 shown in FIG. 3 is similarly input in 1-byte units to the other inputs of the comparison circuits 10-1 to 10-6. The outputs of the comparison circuits 10-1 to 10-5 are as follows:
FF11, 13, 15, 17, 19, 21 respectively,
AND circuits 12, 14, 16, 18, 20, and 22 are provided. FFs 11, 13, 15, 17, and 21 are driven by a clock synchronized with the received address bit. That is, the coincidence output of the comparator circuit 10-1 is latched by the FF 11, and the AND circuit 12 is placed in an allowable state. In this state, when the comparison circuit 10-2 next generates a coincidence output, it is latched into the FF 13 via the AND circuit 12. Similarly, the FF 21 latches the coincidence output of the comparator circuit 10-6 for the sixth and final byte. Comparison circuit 10-6 that compares the address of the last 6th byte
and the AND circuit 20, there are OR circuits 22-1 to 22-2 for performing address comparison based on the mask bits.
2-8 and an AND circuit 23 are provided. The comparison output of the comparison circuit 10-6 is commonly input to one input terminal of the eight OR circuits 22-1 to 22-8. Further, the mask bits set in bits 08 to 15 of the control register 4 shown in FIG. 4 are input to the other input terminals of the OR circuits 22-1 to 22-8. Here, four communication processing processors 1-1 to 1-4 M
As an AC address, (0000 0000)2 ~ (0000 001
1) Assume that you have assigned 4 items up to 2. [0033] A common feature among these four MAC addresses is that "the upper six bits are 0." In this case, the upper 6 bits of the lower 8 bits of the MAC address register 2 in FIG.
e). At the same time, set the mask bits of bits 08 to 15 of control register 4 in Figure 4 to "00000011".
and forces the lower two bits to match the address. Therefore, if a match output of the upper 6 bits of the lower 8 bits is obtained from the comparator circuit 10-6 in FIG. is set to bit 1, and as a result, if the upper 6 bits match, the OR circuit 22-1
The outputs of 22-8 to 22-8 all become 1, and the output of the AND circuit 23 also becomes 1, and the address match result is latched into the FF 21 via the AND circuit 20. The output of the final-stage AND circuit 21 is input to AND circuits 25 and 26. AND circuit 25 produces a DA match output. That is, when the reception instruction bit of the control register 4 in FIG. At this time, the reception instruction bit set to bit 1, that is, the stripping enable signal, is input to the AND circuit 25, and since the destination address position signal indicating the reception timing of the destination address DA is also input, the MAC A DA match output is performed from the AND circuit 25 at the timing of the next clock after the address match output is obtained. AND circuit 26 produces an SA match output. That is, when the stripping instruction bit of the control register 4 in FIG. When the stripping instruction bit set to bit 1 at this time, that is, the destination address valid signal, is input to the AND circuit 26,
In addition, since the destination address position signal indicating the reception timing of the source address SA is input, the SA coincidence output is performed from the AND circuit 26 at the timing of the next clock after the MAC address coincidence output is obtained. FIG. 6 shows a MAC in another embodiment of the present invention.
FIG. 2 is an explanatory diagram showing the correspondence between addresses and mask bits. In this embodiment, the communication control module 6 in FIG.
This is a case where communication processing processors 1-1 to 1-9 are connected, and the lower 8 bits are used as the MAC address,
As terminal addresses other than 2n, (0000 0001) 2 to (0000 10
01) 2, nine types of addresses are set. In this case, the communication processor 10-
1 is divided into the following four groups A to D, and mask bits are set for each group as shown in FIG. Group A; 1-1 (1 unit) Group B; 1-2, 1-3 (2 units) Group C;
1-4 to 1-7 (4 units) Group D; 1-8, 1-
9 (two units) Specifically, the MAC address register 2 and control register 4 shown in FIGS. 3 and 4 are provided for each group A to D, and the comparison circuit 10- in FIG.
6, OR circuits 22-1 to 22-8, and AND circuit 23
It is sufficient to provide the configuration for each group A to D, and input them together to the AND circuit 20 using an OR circuit. According to this embodiment, what originally required nine MAC address registers, control registers, and comparison circuit units can be reduced to four units, which is less than half of the total. In addition, in the above embodiment, in order to simplify the explanation, 8
Although a bit MAC address has been taken as an example, the present invention is not limited thereto, and may be a MAC address with an appropriate number of bits suitable for the system. Effects of the Invention As explained above, according to the present invention, 1
When managing multiple MAC addresses with one communication control device, multiple addresses can be specified with one address register as long as they are 2n consecutive addresses, and this can be achieved with only a simple comparison circuit, reducing the amount of hardware. This enables address comparisons suitable for high-speed communication without significantly increasing costs. [0041]Also, even if it is not 2n consecutive addresses, 1
Alternatively, if multiple addresses have a common address part, the number of address registers is smaller than the actual number of terminal addresses, and similarly, the amount of hardware can be reduced and high-speed communication can be achieved without a significant increase in cost. You can compare addresses.

[Brief explanation of the drawing]

[Figure 1] Diagram explaining the principle of the present invention

[Fig. 2] Embodiment configuration diagram of a communication control device that performs address comparison according to the present invention.

[Figure 3] Example configuration diagram of a MAC address register provided in the address comparison circuit in Figure 2

[Figure 4] Example configuration diagram of a control register provided in the address comparison circuit in Figure 2

[Fig. 5] Example circuit diagram of the main part of the address comparison circuit shown in Fig. 2.

FIG. 6 is an explanatory diagram of the correspondence between MAC addresses and mask bits in another embodiment of the present invention.

[Figure 7] Explanatory diagram of LAN

[Fig. 8] Explanatory diagram of LAN transmission frame

FIG. 9 is an explanatory diagram of a communication processing device including a plurality of communication processing processors.

[Explanation of symbols]

1-1 to 1-n: Terminal device (communication processing processor) 2:
Address register (MAC address register) 3: Comparison unit 4: Transmission line 6: Communication control module 60: Modem 61: Address comparison circuit 62: Microprocessor (MPU) 63: Multiplexer (MPX) 10-1 to 10-6: Comparison Circuits 11, 13, 15, 17, 19, 21: FF12, 14
, 16, 18, 20, 23, 25, 26: AND circuits 22-1 to 22-8: OR circuits

Claims (5)

[Claims] Claim 1: Unique terminal address (A1, A2,...
A plurality of terminal devices (1-1, 1-2,...) having
・1-n) is connected, and the reception address (RA) from the transmission path (4) and the terminal address (A1, A2,...An
) In an address comparison method of a communication control device that performs a reception process that captures a received frame and outputs it to a corresponding terminal device or a stripping process that deletes the received frame from the transmission path (4), Terminal addresses (A1 to 1-n) set to the plurality of terminal devices (1-1 to 1-n)
An address register (2) that stores the address common part (Acom) of the address register (2), and the terminal address common part (Acom) of the received address (RA) and the value of the address register (2).
An address comparison method for a communication control device, characterized in that a comparison unit (3) is provided for comparing a portion corresponding to a portion corresponding to com). 2. The address comparison method of a communication control device according to claim 1, further comprising a control register (4) having a mask bit for setting whether or not the comparison section (3) compares addresses on a bit-by-bit basis. , the comparison unit (3) based on the mask bit of the control register (4).
The value of the address register (2) and the receiving address (RA) are
An address comparison method for a communication control device characterized by comparing. 3. In the address comparison method of a communication control device according to claim 1, the address register (2) stores an address common part (Acom) common to all terminal addresses (A1 to An). An address comparison method for a communication control device characterized by being configured with a single register. 4. In the address comparison method for a communication control device according to claim 1, the address register (2) is configured to compare a plurality of terminal devices (1-1 to 1-n) connected to the communication control device.
1. An address comparison method for a communication control device characterized by comprising a plurality of registers storing an address common part (Acom) obtained for each one or a plurality of terminal addresses in ). 5. An address comparison method for a communication control device according to claim 1, wherein the control register (4) includes a reception instruction bit for instructing frame reception processing and an erasure instruction bit for instructing frame stripping processing. ), and if the reception instruction bit is valid, instructs the comparison unit (3) to compare with the destination address (DA) in the frame, and when an address match is obtained, executes frame reception processing,
A communication control device characterized in that, if the erasure instruction bit is valid, the comparison unit 3 is instructed to compare the frame with a source address (SA), and when an address match is obtained, a stripping process is executed. address comparison method.