JPH04349784A - Gradation correction device - Google Patents

Abstract

PURPOSE:To realize the gradation correction device in which the capacity of a required lookup table memory (bit number per address is reduced and which is realized with a small circuit scale with respect to the gradation correction device used for a television receiver. CONSTITUTION:A subtractor 31 is provided to an output of a lookup table arithmetic operation circuit 10 and a data of each address of an accumulated histogram memory 9 read sequentially is at first normalized by the lookup table arithmetic operation circuit 10 and the address of the accumulated histogram memory 9 on each occasion is subtracted from the result. Then the result is stored in a lookup table memory 11, an adder 32 adds a video luminance signal to be inputted and an output signal of the lookup table memory 11 read by the signal to obtain a corrected output luminance signal. Thus, the capacity of the lookup table memory to be required is saved.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a television receiver,
The present invention relates to a gradation correction device used for correcting the gradation of a video signal of a video tape recorder, a video camera, a video disc, etc.

0002

[Background Art] In recent years, as color television receivers have become larger and have higher image quality, tone correction devices have been developed to improve the image quality by passing the video signal through a non-linear amplifier in order to make the image appear clearer. It has become important to correct gradation and expand the dynamic range of images on CRTs.

[0003] A conventional tone correction device will be explained below. FIG. 3 shows a block diagram of a conventional tone correction device. In FIG. 3, 1 is an A/D converter that converts an input luminance signal into a digital value. 2 is a histogram memory for extracting the luminance distribution of the input luminance signal;
Generally, the brightness level is stored in the memory address, and the degree is stored in the data. 3 is a histogram calculation circuit which calculates the average value, mode value, minimum value, maximum value, deviation coefficient, and deviation coefficient of the input luminance signal from the data in the histogram memory 2.
The white area, black area, etc. are calculated, and based on the results, control values such as the limiter level, addition value, cumulative start brightness level, cumulative stop brightness level, maximum brightness level, etc. are calculated, and the limiter/adder circuit 5 and cumulative control register are calculated. circuit 6
, and output to the normalization control register circuit 7. The limiter/adder circuit 5 uses the data transferred from the histogram calculation circuit 3 to limit the histogram data so that it does not exceed a certain level, or performs an addition calculation. Generally, data processing is completed while an address is accessed once. When obtaining a cumulative histogram, the cumulative control register circuit 6 receives the luminance level at which the accumulation starts and the luminance level at which the accumulation stops from the histogram calculation circuit 3, and controls the histogram cumulative addition circuit 8.

[0004] The histogram accumulation adder circuit 8 accumulates the processed data in the histogram memory 2 in response to a control signal from the accumulation control register circuit 6. A cumulative histogram memory 9 stores the cumulative results of the histogram cumulative addition circuit 8. Generally, the brightness level is stored in the memory address, and the degree is stored in the data. When the normalization control register circuit 7 normalizes the cumulative histogram data and creates a lookup table, the normalization control register circuit 7 receives the maximum brightness level of the output brightness signal after normalization from the histogram calculation circuit 3, and performs processing according to the value. to control the normalization coefficient. Reference numeral 10 denotes a look-up table calculation circuit, which normalizes the data in the cumulative histogram memory 9 based on the output signal of the normalization control register circuit 7. 11 is a lookup table memory;
The data normalized by the lookup table calculation circuit 10 is stored. Generally, the brightness level is stored in the memory address, and the degree is stored in the data. 12 is a timing control circuit that controls the order of each calculation, each memory, etc. Reference numeral 13 denotes a D/A converter, which converts the output luminance signal of the digital value corrected by the look-up table into an analog value.

The operation of the gradation correction circuit configured as described above will be explained below. FIG. 4 shows the operating waveforms of each part.

First, an input luminance signal a is input to an A/D converter 1, converted into a digital value, and outputted as a converted input luminance signal b. The histogram memory 2 uses this converted input luminance signal b as an address, and processes the data in the limiter/adder circuit 5. By performing this operation for one vertical scanning period, the histogram distribution of the input luminance signal a can be obtained. This is shown in FIG. 4(a).

Next, the histogram calculation circuit 3 reads out the data in the histogram memory 2 containing this luminance histogram, and calculates the average value, mode value, minimum value, and
Calculate maximum value, deviation coefficient, white area, black area, etc. Then, from these calculation results, each control value such as the limiter level, addition value, start brightness level and stop brightness level of cumulative calculation, maximum brightness level after normalization, etc. is determined, and these data are sent to the limiter/addition circuit 5, Accumulation control register circuit 6, normalization control register circuit 7
Transfer to.

Next, the limiter/adder circuit 5 reads data from the histogram memory 2, and performs a limiter (FIG. 4(b)), an adder, etc. based on each data transferred from the histogram calculation circuit 3. The calculation is performed and the result (corrected histogram data c) is output to the histogram cumulative addition circuit 8 (FIG. 4(c)). Here, when the added value is constant, the larger the value, the closer the cumulative curve is to a straight line, and the smaller the value, the closer the cumulative curve is to the histogram flattening process (FIGS. 4(c) and 4(d)).

[0009]The histogram cumulative addition circuit 8 is
Based on the cumulative start brightness level and cumulative stop brightness level given by the cumulative control register circuit 6, cumulative histogram data f of the corrected histogram data c is calculated within the range, and this result is stored in the cumulative histogram memory 9.

Next, lookup table calculation circuit 10
reads data from the cumulative histogram memory 9,
A normalization coefficient is determined so that the maximum value of the cumulative histogram data g becomes the maximum output brightness level h given by the normalization control register circuit 7, and the calculation is performed on all cumulative histogram data g using this coefficient. i
is stored in the lookup table memory 11. In other words, lookup table memory up table memory 1
1 requires a sufficient number of bits to store the maximum output brightness level. At this time, automatic contrast control (ACL) is performed by controlling the maximum output brightness level h.
) and automatic brightness control (ABL). This operation is shown in FIG. 4(e).

Next, the look-up table memory 11 reads out the data using the converted input luminance signal b as an address, and outputs this data as a corrected output luminance signal j (FIG. 4(f)). Then, the D/A converter 13 converts this corrected output luminance signal j into an analog signal k and outputs it.

The timing control circuit 12 controls the operation of each circuit so that each part operates at the timings described above. (For example, see Japanese Patent Application No. 1-265393 “Tone Correction Device” filed by the same applicant)

[
0013

However, in the above conventional configuration, the capacity of the lookup table memory (1
The problem was that the number of bits required for an address became large.

The present invention solves the above-mentioned conventional problems by reducing the required capacity of look-up table memory, and
It is an object of the present invention to provide a gradation correction device that can be realized with a small circuit scale.

[0015]

[Means for Solving the Problems] In order to achieve this object, the gradation correction device of the present invention includes a histogram memory for storing a luminance histogram of a video luminance signal, and a histogram operation connected to the output end of the histogram memory. circuit, a limiter/adder circuit, an accumulation control register circuit, and a normalization control register circuit connected to the output terminal of the histogram calculation circuit, respectively, and the output terminal of the histogram memory and the output terminal of the accumulation control register circuit are connected. A histogram cumulative addition circuit, a cumulative histogram memory that stores the cumulative addition result, a lookup table calculation circuit to which the output terminal of the cumulative histogram memory and the output terminal of the normalization control register circuit are connected, and the lookup table. A subtracter that subtracts the output signal of the timing control circuit from the output signal of the arithmetic circuit, a lookup table memory that stores the result of this subtraction, and an adder that adds the output signal of this lookup table memory and the input signal of the video luminance signal. It is characterized by consisting of a controller and a timing control circuit.

[0016]

[Operation] With this configuration, data at each address of the cumulative histogram memory is first read out sequentially, normalized by the lookup table calculation circuit, and the current address of the cumulative histogram memory is subtracted from this calculation result. Store the difference in lookup table memory. Then, the input luminance signal and the corresponding output signal of the lookup table memory are added to obtain a corrected output luminance signal. This allows the capacity of the lookup table memory to be reduced.

[0017]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 9 is a cumulative histogram memory, 10 is a look-up table calculation circuit, and 11 is a look-up table memory, which is the same as in the conventional example. 3
1 is a subtracter that subtracts the output of the timing control circuit 12 from the output of the look-up table calculation circuit 10;
2 is an adder that adds the output of the lookup table memory 11 and the input video signal.

The operation of the gradation correction device constructed as above will be explained with reference to FIG. 2. First, data at each address in the cumulative histogram memory 9 is sequentially read out and normalized by the look-up table calculation circuit 10. Next, from this output signal (a in FIG. 2(a)), the address of the cumulative histogram memory 9 at that time (FIG. 2(a)
Subtract b) from a) and get the result of this operation (c in Figure 2(a))
is stored in the lookup table memory 11. Figure 2 (
b) shows data stored in lookup table memory 11. Then, based on the input video brightness signal, the data in the lookup table memory 11 corresponding to the input signal is read out, and the output signal and the input video brightness signal are added by an adder 32. An output luminance signal corrected in this way is created.

As described above, according to this embodiment, the subtracter 3
1 and the adder 32, the amount of data (number of bits per address) stored in the lookup table memory 11 can be reduced.

[0021]

As described above, the present invention provides a histogram memory, a histogram calculation circuit, a limiter/adder circuit, an accumulation control register circuit, a normalization control register circuit, a histogram accumulation addition circuit, and an accumulation histogram memory. By providing a lookup table calculation circuit, a subtracter, a lookup table memory, an adder, and a timing control circuit, the required memory capacity of the lookup table memory can be reduced, resulting in a small circuit. This makes it possible to realize a gradation correction device on a small scale.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a tone correction device in a first embodiment of the present invention.

FIG. 2 is a waveform diagram illustrating the first embodiment of the present invention.

FIG. 3 is a block diagram of a conventional tone correction device.

FIG. 4 is a waveform diagram illustrating the operation of a conventional tone correction device.

[Explanation of symbols]

31 Subtractor 32 Adder

Claims (1)

[Claims] 1. A histogram memory that stores a luminance histogram of a video luminance signal, a histogram calculation circuit that receives an output signal of the histogram memory and extracts the characteristics of the luminance histogram from this data, and an output terminal of the histogram calculation circuit. a limiter/adder circuit connected to process the data of the histogram memory, an accumulation control register circuit and a normalization control register circuit connected to the output terminals of the histogram calculation circuit, respectively, and an output signal of the histogram memory and the accumulation control register. A histogram cumulative addition circuit that inputs the output signal of the circuit and cumulatively adds the processed data of the histogram memory, a cumulative histogram memory that stores the result of this cumulative addition, and an output signal of the cumulative histogram memory and a normalization control register circuit. A lookup table calculation circuit that inputs an output signal and normalizes the data in the cumulative histogram memory, and a lookup table calculation circuit that is connected to the output terminal of this lookup table calculation circuit and subtracts the address of the cumulative histogram memory at that time from the sequentially calculated output signals. a look-up table memory that stores the result of this subtraction, an adder that adds the output signal of this look-up table memory and the input video luminance signal, and timing that controls the operation of each of the above circuits. A gradation correction device characterized by comprising a control circuit.