JPH04348412A - Interruption clearing system for application of power supply - Google Patents

Abstract

PURPOSE:To easily deal with the change of a herdware constitution by using a hardware component device like a printer, a keyboard, etc., as an OS program which clears the interruption generated at application of a power supply. CONSTITUTION:An interruption factor table 33 stores the hardware component device data 331-33n used for the clear processing for each hardware component device. Then the table 33 is stored in an executing medium of an OS 30 together with a clear processing routine 32a which is prepared in common to the hardware component devices regardless of their types. The table 33 and the routine 32a are loaded into a main memory from the executing medium, and then the routine 32a is started. Thus the routine 32a takes the data 331-33n on those hardware component devices out of the table 33 and clears the interruptions. Thus it is possible to easily deal with the addition and the change of the hardware component devices by changing only the table 33.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interrupt clearing method when a computer system is powered on, which clears an interrupt factor generated by a hardware component when the computer system is powered on.

0002

2. Description of the Related Art When a computer system is powered on, not only the system itself but also hardware components such as printers, keyboards, and disk drives execute power-on processing (initialization processing). Some of these hardware components generate an interrupt as a power-on process, for example, to notify the system main body that the hardware component is ready for use and to request a response. Therefore, the initialization processing of the system main body includes processing for clearing interrupt factors caused by power-on processing of such hardware component devices. That is, the interrupt factor for each hardware component is cleared by executing an interrupt clearing processing program for each hardware component that is pre-installed in the operating system (OS). This prevents the hardware component from repeatedly generating interrupts with the same content.

[0003] The interrupt clearing processing program when the power is turned on is executed either by a subroutine call or by generating and starting a task in which the processing program is installed by a supervisor of the OS. In either method, an interrupt factor clearing processing program when the power is turned on exists for each hardware component device.

Next, such a conventional example will be explained using FIGS. 2 and 3. Note that FIG. 2 is a configuration diagram of the computer system, and FIG. 3 is a configuration diagram of initialization processing on the OS.

In FIG. 2, this computer system 10 includes at least a central processing unit 11, an initial program loader ROM (IPLROM) 12, and a memory 13.
, a disk (hereinafter referred to as an execution medium) 14, a display 15, and a keyboard 16.

[0006] When the system is powered on, the IPLR
The initial program loader (IPL) written in the OM 12 is activated, and the central processing unit 11 executes the O file 14a stored in the OS execution medium 14.
Load S into the memory 13. Thus, when the program of the OS 20 shown in FIG. 3 is started, the initialization processing task 22 is started by the supervisor 21. The initialization processing task 22 has interrupt factor clearing processing programs 221 to 22n for each hardware component device (in this case, n pieces) that generates an interrupt factor when the power is turned on, and these interrupt factor clearing processing programs 221
By sequentially executing steps 22n to 22n, the interrupt factor at power-on is cleared. Note that these interrupt factor clear processing programs 221 to 22n are in a hardware interrupt mask state (a state in which a command is given to hardware to suspend interrupts) during system initialization processing.
is executed when

[0007]

[Problem to be Solved by the Invention] However, the conventional interrupt clearing method is a method in which an interrupt factor clearing processing program is prepared for each hardware component that generates an interrupt when the power is turned on. have challenges.

That is, in the computer system 10,
When a hardware component that generates an interrupt when the power is turned on is added, the initialization processing task 22 on the OS 20 must be changed. Since the OS is naturally compiled into machine language, even a relatively simple change such as adding one interrupt factor clearing program can be done easily.
The source program must be modified and changed, and such work requires a great deal of effort and time. Additionally, OSs are complex in nature and may not be easy to modify.

Furthermore, although an OS is originally used for general purposes in computer systems, it is necessary to prepare an OS that is compatible with the computer system depending on the hardware configuration of the computer system. Different disk files 14a are required depending on the hardware configuration of the system, which poses maintenance and management problems and reduces the versatility of the OS.

The present invention has been made in consideration of the above points, and can easily accommodate additions and changes to hardware configuration devices that generate interrupts when the power is turned on. The present invention aims to provide an interrupt clearing method when the power is turned on, which can increase the versatility of the OS section.

[0011]

[Means for Solving the Problem] In order to solve the problem, the present invention provides an interrupt factor table storing data used for interrupt clearing processing at power-on for each hardware component, and an interrupt factor table for each hardware component. A common clear processing routine regardless of the type of computer is stored in the execution medium of the operating system, and when the power is turned on, the interrupt factor table and the clear processing routine are loaded from the execution medium into the memory of the computer system. Start the clear processing routine. and,
The clear processing routine retrieves data for each hardware component from the interrupt factor table and clears the interrupt factor generated by each hardware component.

Here, it is preferable that the above-mentioned operating system is provided with an interrupt factor table editing utility for modifying the interrupt factor table.

[0013]

[Operation] In the present invention, in order to easily respond to additions and changes in hardware components, a clear processing routine, which is a processing program for clearing an interrupt factor generated by a hardware component, is provided to each hardware component. In addition to using a format that can be used in common regardless of differences in devices, the interrupt factor table includes data that differs depending on each hardware configuration device required for interrupt clearing processing. Then, these are stored in the execution medium of the operating system, and when the power is turned on, they are loaded into the memory and the clear processing routine is activated. At this time, the clear processing routine retrieves data for each hardware component from the interrupt factor table and clears the interrupt factor generated by each hardware component.

It is preferable that the operating system is provided with an interrupt factor table editing utility for modifying the interrupt factor table so that the operator can easily change the interrupt factor table.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. Here, FIG. 1 shows the configuration of the initialization process (especially interrupt clearing process) when the OS is powered on according to this embodiment, and FIG. 4 shows the configuration of the interrupt factor table used in the initialization process. be. Further, the computer system according to this embodiment also includes at least the configuration shown in FIG. 2 described above, and FIG. 2 will be used in the following description as necessary.

The OS 30 shown in FIG. 1, which is stored in the execution medium 14 as a file 14a, is loaded into the memory 13 and activated by an initial program loader stored in the IPLROM 12.

As shown in FIG. 1, this OS 30 has a supervisor 31 that controls task execution, and a supervisor 31 that is activated first among various OS tasks when the system is powered on.
The initialization processing task 32 initializes the hardware and software necessary for the operation of S. This initialization processing task 32 executes an interrupt factor table data processing routine 32a that extracts and processes data 331 to 33n for each hardware component stored in an interrupt factor table 33 whose detailed configuration is shown in FIG. have.

In order to create or modify the interrupt factor table 33 used in the initialization processing task 32, the OS 30 includes a file loader 34, an input/output device control task 35, and an interrupt factor table editing utility. It is equipped with 36. The file loader 34 loads the interrupt factor table 33 stored in the execution medium 14 as a file 14a into the memory 13, and loads the interrupt factor table data processing routine 32 into the memory 13.
It is also used when processing a. The input/output device control task 35 controls the input/output devices (keyboard and display) as necessary when modifying the interrupt factor table 33 to realize a man-machine interface with the operator. The interrupt factor table editing utility 36 modifies the interrupt factor table 33 while controlling the file loader 34 and the input/output device control task 35, and updates the modified interrupt factor table 33 to the execution medium 1.
4.

Next, the detailed structure of the interrupt factor table 33 will be explained. As shown in Figure 4, hardware component devices (here, n are assumed) that generate interrupts when the power is turned on.
data blocks 411 to 41n (331 to 3 described above)
3n corresponds to) and data 42 indicating completion of the table data. Each data block 411,..., 41
n is data 411a, ..., 41na indicating whether or not the input/output instruction has been executed (in this embodiment, it is equivalent to whether or not clearing of the interrupt factor has been executed), and the device that executes the input/output instruction. It consists of addresses 411b,..., 41nb, input/output instruction codes (instruction codes instructing to clear interrupt factors) 411c,..., 41nc, and attribute data 411d,..., 41nd of the instructions. Each attribute data 411d, ..., 41nd is, for example, data (INPUT/OUTPUT) indicating whether to clear by accepting data from the hardware component or by outputting data to the hardware component.
data (status judgment) that indicates what conditions (statuses) are met to clear, and data (timer values) that indicates how many seconds after the conditions (status) are met to be cleared. Consisting of

The above-mentioned interrupt factor table data processing routine 32a processes each data block 41 as described later.
The process is repeated every 1, . . . , 41n, that is, for each hardware component device.

FIG. 5 shows the processing of the interrupt factor table editing utility 36, and this processing will be explained below. Note that the initial interrupt factor table 33 for the computer system is stored for the computer system 10 with the minimum configuration shown in FIG.

[0022] Interrupt factor table editing utility 3
6, the OS 30 allows the operator to specify, such as inputting a predetermined utility command name from the keyboard 16.
is activated by the analysis, and starts the processing shown in FIG.

First, the file loader 34 loads the file of the interrupt factor table 33 from the execution medium 14 into the memory 13 (step 500).
). After that, after displaying the current contents of the interrupt factor table 33 using the input/output device control task 16,
Prompts the operator to input data that identifies the processing type,
Accordingly, the processing type input by the operator is imported and determined (step 501). If the type of processing instructed by the operator is table modification processing, the input/output device control task 16 is used to interactively import the changed contents and change the contents of the interrupt factor table 33 in the memory 13 (step 502). ). On the other hand, if the processing type instructed by the operator is table addition processing, the input/output device control task 16 is used to interactively import the additional content and add the content to the interrupt factor table 33 in the memory 13 ( Step 503). In addition, in this case of addition, data is fetched and added in block data units, and this addition causes the storage position of the data 42 indicating completion of table data to be shifted. When the change processing or addition processing is completed in this way, or when neither the change processing nor the addition processing is specified, the interrupt factor table file in the memory 13 is stored on the disk 14, and a series of processing is completed. (Step 504).

In this way, when a new hardware component is added to the computer system, or when the type of an existing hardware component is changed, the contents of the interrupt factor table 33 can be modified accordingly. can. Note that since the process in the case where neither change process nor additional process is specified is included in the series of processes, the interrupt cause table editing utility 3 can be used to simply check the contents of the current interrupt cause table 33.
6 can be used.

FIG. 6 is a flowchart showing the processing of the interrupt factor table data processing routine 32a (interrupt factor clearing process at power-on), and this processing will be explained below.

When the computer system 10 is powered on, the initial program loader (IPL) stored in the IPLROM 12 loads the OS 30 files from the execution medium 14 into the memory 13 and starts the OS 30. This allows Supervisor 3
1 starts the initialization processing task 32, and the initialization processing task 32 uses the file loader 34 to load the interrupt factor table 33 onto the memory 13.

After this, the interrupt factor table data processing routine 32a starts the processing shown in FIG. First, a mask state is set in which interrupts from the hardware component device are suspended, and then data 411a, . A search is made for items indicating an unexecuted state, and it is determined whether or not this search reaches data indicating completion of the table data (steps 600, 601). If a negative result is obtained in this determination, that is, if all interrupt factors have not been cleared, the interrupt factor table 3 in the memory 13
Data 4 indicating whether or not the input/output command in 3 was executed
11a, ..., 41na, extract data groups 411b to 41nb, ..., or 411d to 41nd of one unprocessed data block, and based on the extracted data group, determine the hardware configuration indicated by the data group. Execute processing to clear interrupt factors for the device (step 602,
603). Note that this clearing process includes data 411a indicating whether or not the input/output command of the data block in the interrupt factor table 33 on the memory 13 has been executed;
. . . or a process of updating to indicate that 41na has been executed.

When the clearing process for one hardware component device is completed in this way, the process returns to step 601 described above. By repeating the processing loop consisting of steps 601 to 603, the data block 4 is
The clearing process for each hardware component device for which 11 to 41n are prepared is repeatedly executed, and eventually the clearing process for the interrupt factor for all the hardware component devices that generated an interrupt when the power was turned on is completed, and step 60
1 gives a positive result. At this time, the masked state of the interrupt is canceled and the series of processing is completed (step 60).
4).

FIG. 7 is a timing chart relating to such interrupt clearing processing, and shows an example in which three hardware components generate interrupt factors.

The power supply of the computer system is shown in FIG. 7(A).
When it is turned on as shown in the figure, not only the system itself but also
The hardware component also executes power-on processing (initialization processing), and all or some of the hardware components are shown in FIG.
Interrupts are generated as shown in B) to (D). Immediately before this, the interrupt factor table data processing routine 32a puts the interrupts from the hardware component on hold as shown in FIG. It will be put on hold. For such a plurality of interrupt factors A to C, the interrupt factor table data processing routine 32a processes the interrupt factor table 33.
The clearing process is executed for each data block, and, for example, interrupt causes A, B, and C are cleared in this order. When the clearing process for all interrupt factors A to C is completed, the masked state is released and the series of processes ends.

Therefore, according to the embodiment described above, the interrupt factor clearing process at power-on is performed using the interrupt factor table 3.
3 and the interrupt factor table data processing routine 32a.
Since it is possible to respond to changes or additions to OS30 even if the hardware configuration of the computer system changes.
It is not necessary to change. In practice, changing or adding to the interrupt factor table 33 is a simple operation, but modifying the OS is a complicated or difficult operation, and compared to the past, changes in the hardware configuration of the computer system This has the effect of making it easy to respond to requests.

Furthermore, since there is no need to change the OS 30 as described above, even if the hardware configurations are different, if the minimum hardware configuration for operating the OS (see FIG. 2) is common, different parts can be changed. By absorbing the interrupt factor table 33, the OS can also be used in common. Furthermore, related to this effect,
One type of OS can support multiple computer systems with different hardware configurations, so
Only one type of execution medium storing the OS is required, and there is also the effect that maintenance management of the OS is not required.

Note that the computer system to which the power-on interrupt clearing method according to the present invention can be applied may be one for specific purposes such as a word processor system or a financial terminal system. Further, the execution medium storing the OS is not limited to a disk, but may be another medium such as a ROM.

[0034]

As described above, according to the present invention, there is an interrupt factor table that stores data used for clearing processing for each hardware component that requires clearing, and a table that is common regardless of the type of hardware component. A clear processing routine is provided for each hardware component, and the clear processing routine extracts data from the interrupt cause table and executes clear processing for each hardware component. It is possible to easily respond to additions and changes to the OS, and the versatility of the OS for clearing interrupt factors can be made high.

[Brief explanation of the drawing]

FIG. 1 is a functional block diagram showing an initialization processing configuration when an OS is powered on according to an embodiment of the present invention.

FIG. 2 is a block diagram showing the minimum hardware configuration of the computer system.

FIG. 3 is a functional block diagram showing a conventional method.

FIG. 4 is an explanatory diagram showing a detailed configuration of an interrupt factor table according to the above embodiment.

FIG. 5 is a flowchart showing an interrupt factor table editing process.

FIG. 6 is a flowchart showing clear processing using an interrupt factor table.

FIG. 7 is a timing chart showing a specific example of clearing processing using an interrupt factor table.

[Explanation of symbols]

10... Computer system, 11... Central processing unit, 1
3...Memory, 14...Disk (OS execution medium), 30
...OS (operating system), 31... Supervisor, 32... Initialization processing task, 32a... Interrupt factor table data processing routine, 33... Interrupt factor table, 331 to 33n... Data for each hardware component device of interrupt factor table 33, 36...Interrupt factor table editing utility.

Claims (2)

[Claims] Claim 1: An interrupt factor table in which data used for interrupt clearing processing at power-on is stored for each hardware component, and a clear processing routine provided in common regardless of the type of hardware component, are stored in the operating system. storing the interrupt factor table and the clear processing routine in the execution medium of the system, and when the power is turned on, loads the interrupt factor table and the clear processing routine from the execution medium into the memory of the computer system, and starts the clear processing routine;
An interrupt clearing method upon power-on, characterized in that the clearing processing routine retrieves data for each hardware component from the interrupt factor table and clears the interrupt factor generated by each hardware component. 2. An interrupt clearing method upon power-on, characterized in that the operating system is provided with an interrupt factor table editing utility for modifying the interrupt factor table.