JPH04345246A - Clock extraction circuit - Google Patents

Abstract

PURPOSE:To extract a basic frequency component at all times stably by extracting 1st and 2nd basic frequency components of a clock signal from a direct output of a demodulated base band signals and a multiplication output of the signals respectively and selecting a 2nd extraction component at a prescribed condition. CONSTITUTION:A multiplication output of demodulation base band signals 1 by a multiplier 2 is processed by a BPF 3, from which a basic frequency component of a 1st clock signal is extracted. On the other hand, the signal 1 is processed by a BPF 5 or the like, from which a basic frequency component of a 2nd clock signal is extracted. When a level of the 2nd basic frequency component is in excess of a threshold level set to a comparator 6, the 2nd basic frequency component is outputted while being selected by an output changeover device 8 and a timing recovery clock is not lost even at the transmission of 0,1 alternate codes and the basic frequency component is always extracted stably.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a timing recovery circuit clock extraction section of a GMSK modulated wave demodulator.

0002

2. Description of the Related Art The prior art will be explained with reference to FIG. GM
The SK modulated wave vc(t) is generally expressed by the following equation (1).

[0003]vc(t)=Acos{2πfct+φm
(t)}‥‥‥(1)

[0004] Here, fc is the carrier frequency and φ
m(t) is an instantaneous phase expressed by the following equation (2).

[0005]

[Math 1]

[0006] Here, Δfd is the frequency deviation, and m(
t) is a modulation signal expressed by the following equation (3).

[0007]

[Formula 2] Here, ai is transmission data having a value of +1 or -1, and g(t) is 1 when 0≦t<1, and 0 otherwise.

Therefore, in FIG. 4, the in-phase component vBI and quadrature component vBQ of the demodulated baseband signal 1 of the modulated wave are respectively expressed by the following equations.

[0009] vBI=Cos φm(t) (4
)vBQ=Sin φm(t) ‥‥‥‥‥‥‥‥(
5)

In GMSK modulation, when transmitting a signal close to a random code, the demodulated baseband signal 1 has a component fB/2, which is 1/2 of the fundamental wave component of the reproduced clock, than the fundamental frequency fB of the reproduced clock. Contains a lot. Therefore, a multiplier 2 is used to generate the fB component by multiplying the in-phase component vBI and the quadrature component vBQ of the demodulated baseband signal. This multiplication output is input to a band pass filter 3 having a center frequency fB, and the fundamental wave component fB of the reproduced clock is extracted.

[0011]

In the GMSK modulation system, when transmitting alternating codes of 0 and 1, the demodulated baseband signal does not include a component of fB/2, and the lowest frequency included is fB. Therefore, the above-mentioned prior art had a serious drawback in that it was not possible to extract the fundamental wave component fB of the recovered clock when the received code was an alternating pattern of 0 and 1. The present invention solves this drawback, and even when transmitting alternating codes of 0 and 1, the fundamental wave component fB of the recovered clock is
The purpose of this invention is to provide a clock extraction circuit that can extract the clock.

0012

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a first multiplication output of a demodulated baseband signal 1.
In addition to the means for extracting the fundamental frequency component of the clock signal using a filter, a second band-pass filter is provided that receives the demodulated baseband signal 1 directly and extracts the fundamental frequency component of the clock signal, and the output of this second filter is A switching means is provided for switching the clock extraction from the first filter side to the second filter output side when the clock signal becomes equal to or higher than a reference level.

[0013]

[Operation] As a result, when transmitting 0,1 alternating codes,
Since the demodulated baseband signal is switched to the output of the second band-pass filter which receives the direct input, the fundamental frequency fB of the reproduced clock signal can be stably extracted.

[0014]

[Embodiment] An embodiment of the present invention will be explained below with reference to FIG. During normal random code transmission, the in-phase component vBI and quadrature component vB of the demodulated baseband signal 1 are
Q is multiplied by multiplier 2, and this output is set to the center frequency f
The fundamental wave component fB of the recovered clock is extracted by passing it through the band pass filter 3 of B.

On the other hand, when transmitting an alternating code of 0, 1, or when transmitting a code pattern containing more fB, which is the fundamental wave component of the clock, than fB/2 in the demodulated baseband signal 1, the demodulated baseband signal The output of the second bandpass filter 5, which receives 1 as a direct input and has a center frequency of fB, is larger than that during random code transmission.

The output of the second pass filter 5 is compared with a threshold level 7 by a comparator 6, and if the output is higher than the threshold level 7, an output switching signal 9 is sent to the output switching section 8. In response to this output switching signal 9, the output switching unit 8 switches the output of the first bandpass filter 3 to the output of the second bandpass filter 5. When the output of the bandpass filter 5 becomes smaller than the threshold level 7, the output of the output switching section 8 is switched to the output of the first bandpass filter 3 by the output switching signal 9 of the comparator 6. In FIG. 1, the input to the second band-pass filter 5 is the in-phase component vBI of the demodulated baseband signal 1, but the same effect can be achieved even if the quadrature component vBQ is input.

FIG. 2 shows a second embodiment of the invention. Depending on the transmission pattern, it may be easier to extract the fundamental frequency fB of the recovered clock from either the in-phase component vBI or the orthogonal component vBQ. For this reason, a bandpass filter 5 with a center frequency fB [Hz] is provided for each of the in-phase component vBI and quadrature component vBQ output of the demodulated baseband signal 1,
The respective outputs are compared by an output comparator 10 and the one with a higher level is sent to the comparator 6. Other operations are the same as those of the first embodiment shown in FIG. 1 above.

Next, a third embodiment will be explained using FIG. 3. The in-phase component Cosφ(t) and quadrature component Sinφ(t) of the demodulated baseband signal 1 during 0,1 alternating code transmission have DC components of the same value, and have waveforms with a phase shift of 90° in terms of AC. Therefore, by adding the in-phase component Cosφ(t) and the orthogonal component whose sign is inverted, −Sinφ(t), each DC component is canceled and an output with twice the amplitude is obtained. By using this addition output as an input to the bandpass filter 5, a more stable output can be obtained. Other operations are the same as in the first and second embodiments.

In the first to third embodiments described above, the extracted signal obtained by inputting the demodulated baseband signal 1 to the band-pass filter 5 is compared with the threshold level 7, and if the level is high, it is output from the band-pass filter 3. In addition to the switching means, the same effect can be obtained by directly comparing the output of the band-pass filter 3 and the output of the band-pass filter 5 and selecting the one with a higher level.

[0020]

According to the present invention, even when transmitting 0 and 1 alternating codes, the clock for timing recovery can be stably extracted without running out. Therefore, it is possible to reduce the signal error rate due to the deviation of the timing recovery clock signal particularly during 0, 1 alternating code transmission and immediately thereafter, and the effect is remarkable.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a block diagram showing another embodiment of the invention.

FIG. 3 is a block diagram showing another embodiment of the present invention.

FIG. 4 is a block diagram showing an example of a conventional technique.

[Explanation of symbols]

1 Demodulated baseband signal 2 Multiplier 3 Bandpass filter 5 Bandpass filter 6 Comparator 7 Threshold level 8 Output switching section 9 Output switching signal 10 Comparator

Claims (3)

[Claims] 1. A clock extraction circuit for a GMSK demodulation section that extracts a clock signal for timing recovery from a demodulated baseband signal, the clock extraction circuit comprising: a multiplier that multiplies an in-phase component signal and a quadrature component signal of the demodulated baseband signal; , a first clock extraction circuit comprising a first filter connected to the multiplier output and extracting the fundamental frequency component of the clock signal, and a first clock extraction circuit having the demodulated baseband signal as direct input and extracting the fundamental frequency component of the clock signal. A second clock extraction circuit equipped with a second filter that performs a second clock extraction circuit, and a state in which the output level of the second clock extraction circuit and a reference level are compared, and the output level of the second clock extraction circuit is lower than the reference level. a comparator that generates a switching signal when the state changes from high to low, and when the high state changes to low, the comparator output is connected to the first and second clock extraction circuit outputs, and 1. A clock extraction circuit comprising: a switching circuit that selectively outputs one of the outputs of the first and second clock extraction circuits according to a switching signal of the clock extraction circuit. 2. The second clock extraction circuit receives the in-phase component signal of the demodulated baseband signal as an input.
a third filter that receives the orthogonal component signal as input; a comparator that compares the second and third filter outputs and selectively outputs the filter output with a higher output level;
2. A clock extraction circuit according to claim 1, characterized in that said clock extraction circuit comprises: 3. The second clock extraction circuit includes an adder that adds an in-phase component signal of the demodulated baseband signal and an orthogonal component signal whose sign is inverted, and an adder that is connected to the output of this adder and extracts the basic clock signal. The second to extract the frequency components
2. The clock extraction circuit according to claim 1, further comprising a filter.