JPH04344962A - Terminal control system and terminal equipment - Google Patents

Abstract

PURPOSE:To grasp the operational state of the terminal equipment on the host even when a abnormality is generated in the main circuit of the terminal equipment as for the control system of a terminal equipment and the terminal equipment where main communication path is connected via a separately provided auxiliary communication path. CONSTITUTION:A main circuit 6 to be connected with a main communications path 5a, an operation panel 7 connected with a main data bus 6a of the main circuit 6 and displaying the abnormal information of the terminal equipment 4, and a monitoring circuit 8 operating independently of the main circuit 6, are provided. The monitoring circuit 8 is composed of an abnormal information monitoring register 13 fetching the abnormal information connected to the main data bus 6a of the main circuit 6 and to be displayed on the operation panel 7, a serial/parallel conversion part 14 transferring the abnormal information stored in the abnormal information monitoring register 13 to a host 3 by an auxiliary communications path 5b, and a processor 11 controlling the abnormal information monitoring register 13 and the serial/parallel conversion part 14.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control system for a terminal device connected to a host via a main communication path and an auxiliary communication path provided separately from the main communication path, and a terminal device.

[0002] As computer systems have become larger and wider in recent years, there has been a need for a system that can control and manage a large number of terminal devices connected to remote locations by a host. terminal devices have been proposed.

[0003] In such a system, it is extremely important to ensure the reliability and maintainability of the entire system, so even if an abnormality occurs in the terminal device or the main communication path, the abnormality can be detected on the host side. It is hoped that it will be possible to understand the

0004

[Prior Art] Conventional remote type terminal devices include
Some have only one communication path, and others have two communication paths, a main communication path and an auxiliary communication path.

However, in any of these terminal devices, information regarding the operating state of the terminal device is transmitted to the host under the control of the main circuit (main body of the control device) of the terminal device.

In other words, in order to transmit information regarding the operating state of the terminal device to the host, the main circuit of the terminal device must be operating normally.

[0007]

Therefore, in the conventional terminal device, when an abnormality (error) occurs in the main circuit of the terminal device, the abnormality information cannot be transmitted to the host.

[0008] Therefore, on the host side, if the terminal device is normal, it is possible to know the operating state of the terminal device, but if it becomes abnormal, it is possible to grasp the content of the abnormal state or the fact that it is an abnormal state. This caused problems in terms of system reliability and maintainability.

In view of the above-mentioned problems, the present invention provides a terminal control method and a terminal device that allow the host side to grasp the operating state of the terminal device even if an abnormality occurs in the main circuit of the terminal device. The purpose is to

0010

[Means for Solving the Problems] In order to solve the above-mentioned problems, the system according to the invention of claim 1, as shown in FIG.
This is a system for controlling a terminal device 4 connected to a host 3 via a main communication path 5a and an auxiliary communication path 5b provided separately from the main communication path 5a, Main circuit 6 connected to communication path 5a
A monitoring circuit 8 is provided which operates independently from the main circuit 6, and the monitoring circuit 8 monitors abnormality information of the terminal device 4 outputted onto the main data bus 6a of the main circuit 6, and detects any abnormality obtained. Information is transmitted by the monitoring circuit 8 to the host 3 via the auxiliary communication path 5b.

The device according to the second aspect of the present invention is provided with a monitoring circuit 8 that operates independently of the main circuit 6 connected to the main communication path 5a, and the monitoring circuit 8 operates independently of the main circuit 6 connected to the main communication path 5a. an abnormality information monitoring register 13 for capturing and storing abnormality information of the terminal device 4 connected to the main data bus 6a of the terminal device 6 and output on the main data bus 6a; and a serial-parallel converter 14 for transmitting abnormality information to the host 3 via the auxiliary communication path 5b.

The device according to the third aspect of the present invention includes a main circuit 6 connected to the main communication path 5a, and an operation for displaying abnormality information of the terminal device 4 connected to the main data bus 6a of the main circuit 6. panel 7 and the main circuit 6
The monitoring circuit 8 is connected to the main data bus 6a of the main circuit 6 and is configured to capture and store abnormality information displayed on the operation panel 7. an abnormality information monitoring register 13; a serial-to-parallel converter 14 for transmitting the abnormality information stored in the abnormality information monitoring register 13 to the host 3 via the auxiliary communication path 5b; The processor 11 controls the parallel converter 14.

In the device according to the fourth aspect of the invention, as shown in FIG. 2, the abnormality information monitoring register 13 includes a decoder 21 that detects the abnormality information write signal 7 to the operation panel and outputs a latch signal. and the main data bus 6
The main data bus 6a is connected to the main data bus 6a and has a register 22 that latches the abnormality information outputted onto the main data bus 6a using the latch signal.

[0014]

[Operation] The monitoring circuit 8 monitors the abnormality information generated in the main circuit 6 and the main data bus 6 of the main circuit 6.
It is stored in the abnormality information monitoring register 13 via a.

The abnormality information stored in the abnormality information monitoring register 13 is read by the processor 11 and transmitted to the host 3 via the auxiliary communication path 5b according to its contents.

When storing the abnormality information in the abnormality information monitoring register 13, the decoder 21 detects a write signal of the abnormality information to the operation panel 7 by the main circuit 6, and at the timing of this detection, the register 22 latches the abnormality information. do.

[0017]

[Embodiment] FIG. 1 shows a computer system 1 according to the present invention.
FIG.

The computer system 1 includes a host 3, a terminal device 4, a main communication path 5a connecting the host 3 and the terminal device 4, and an auxiliary communication path 5b.

The terminal device 4 includes a main circuit 6, an operation panel 7, a monitoring circuit 8, and the like.

The main circuit 6 is a circuit for realizing the original functions of the terminal device, and includes a CPU (central processing unit), a main memory, an interface circuit for peripheral devices, and a main communication path 5.
It has a communication control circuit etc. for connection with a. Further, these are connected within the main circuit 6 by a main data bus 6a, a main address bus 6b, and the like.

The operation panel 7 is connected to the main data bus 6a through a suitable interface circuit, and includes operation keys for the operator to give various commands and data to the terminal device 4, and various commands for the operator. A display section 7a is provided for displaying information.

The monitoring circuit 8 is for monitoring abnormality information output onto the main data bus 6a of the main circuit 6, and operates independently of the main circuit 6. In other words, even if the function of the main circuit 6 deteriorates or stops due to an abnormality in the CPU or main memory, the monitoring circuit 8
can be independently processed by the CPU 11 dedicated to the monitoring circuit.

The monitoring circuit 8 includes a CPU 11 consisting of a microprocessor, a memory 12, and an abnormality information monitoring register 13.
, a serial-to-parallel conversion circuit 14, etc., and these are connected to each other by a local data bus 11a.

The memory 12 is composed of a ROM and a RAM, and stores programs for processing by the CPU 11, as well as other programs and data.

The abnormality information monitoring register 13 is connected to the main data bus 6a, the main address bus 6b, etc., and receives and stores abnormality information displayed on the display section 7a of the operation panel 7 from the main data bus 6a.

The serial-parallel conversion circuit 14 is for transmitting the abnormality information stored in the abnormality information monitoring register 13 to the host 3 via the auxiliary communication path 5b.

The CPU 11 performs processing according to the program stored in the memory 12, checks the abnormality information stored in the abnormality information monitoring register 13 at appropriate intervals, and
In addition to transmitting the abnormality information to the host 3 via the serial-parallel conversion circuit 14 and the auxiliary communication path 5b as necessary, it also controls the entire monitoring circuit 8.

The main communication path 5a is a transmission line for transmitting various data between the host 3 and the main circuit 6. The auxiliary communication path 5b is an auxiliary transmission path provided separately from the main communication path 5a, and carries abnormality information of the terminal device 4, information regarding control of the power supply circuit of the terminal device 4, etc.
For example, it is transmitted using an HDLC procedure.

FIG. 2 is a block diagram showing an example of the configuration of the abnormality information monitoring register 13.

The abnormality information monitoring register 13 includes a main side decoder 21, a main side register 22, a local side decoder 23, a local side register 24, and the like.

The main side decoder 21 includes a main circuit 6
A main address bus 6b and a main write signal S1 are connected, and when the main circuit 6 writes abnormal information to be displayed on the display section 7a to the operation panel 7, it detects it and outputs a latch signal S2. do.

The main side register 22 is connected to the main data bus 6a, and latches the abnormality information outputted onto the main data bus 6a using a latch signal S2 from the main side decoder 21.

For example, when the abnormality information is 3-byte code data for displaying 3-digit alphanumeric characters, the main-side register 22 is composed of flip-flops in a number equal to the total number of bits.

The local decoder 23 includes a monitoring circuit 8
A local address bus 11b and a local read signal S4 are connected, and when the CPU 11 issues a command to read the local decoder 23, it detects it and outputs an enable signal S3.

The local side register 24 is a register having the same configuration as the main side register 22, and after the abnormality information is latched in the main side register 22, the abnormality information is directly transferred from the main side register 22 and stored. Ru. The abnormality information stored in the local register 24 is read onto the local data bus 11a by an enable signal S3 from the local decoder 23.

[0036] The CPU 11 uses the local data bus 11a.
The content of the abnormality information read from the local register 24 is determined through the auxiliary communication path 5b, and transmitted to the host 3 via the auxiliary communication path 5b as necessary.

The abnormality information includes, for example, a defect in the main memory of the main circuit 6, an abnormality in an external storage device connected to the main circuit 6, and the like. Normally, when these abnormalities are detected, the main circuit 6 transmits the abnormality information to the host 3 via the main communication path 5a and displays it on the display section 7a of the operation panel 7. At this time, also in the monitoring circuit 8, the CPU 11
3. Import the contents via 3.

Therefore, if the content of the abnormality information is an abnormality in the main circuit 6 itself, an abnormality in the main communication path 5a, etc., and therefore the abnormality information cannot be transmitted to the host 3 by the normal processing of the main circuit 6. When the CPU 11 determines that this is the case, the CPU 11 compiles the abnormality information into an appropriate format and transmits it to the host 3 via the auxiliary communication path 5b.

Since such abnormality information is relatively simple data as described above, even if the main circuit 6 is in an abnormal state, the data can be displayed on the display section 7a and the abnormality information monitoring register 13. In many cases, there is no problem with the uptake of

Therefore, according to the above embodiment, even if an abnormality occurs in the main circuit 6 of the terminal device 4, the abnormality information can be transmitted to the host 3 by the monitoring circuit 8, and the host 3 side can transmit the abnormality information to the host 3. The operating state of the device 4 can be grasped at all times.

Therefore, even if the terminal device 4 is installed in a remote location, the operating status of the terminal device 4 can always be known on the host 3 side, and maintenance can be performed quickly, thereby increasing the reliability of the system. It is possible to improve sexual performance.

In the above-described embodiment, the main circuit 6 sends abnormality information to be displayed on the display section 7a to the main data bus 6.
When writing via the main data bus 6a, the abnormality information is taken into the abnormality information monitoring register 13, but even if the display section 7a is not provided, the main data bus 6a
The abnormality information outputted to the abnormality information monitoring register 13 may be taken into the abnormality information monitoring register 13.

In the above embodiment, the CPU 11 periodically checks the contents of the local register 24, but a detection circuit is provided to detect when new abnormality information is written to the local register 24. The detection circuit may interrupt the CPU 11.

In the above embodiment, two pieces of abnormality information are held using two registers, the main side register 22 and the local side register 24, but another register may be added between them or It is also possible to hold three or more pieces of abnormality information by increasing the capacity of the register.

In the embodiments described above, the configurations of the terminal device 4, the monitoring circuit 8, or the abnormality information monitoring register 13, or the configurations of their respective parts, can be modified in various ways other than those described above.

The present invention can also be applied to terminal devices having only specific functions, such as magnetic tape devices, magnetic disk devices, printer devices, or filing devices.

[0047]

According to the present invention, even if an abnormality occurs in the main circuit of the terminal device, the operating state of the terminal device can be grasped on the host side.

According to the third aspect of the present invention, since the abnormality information displayed on the operation panel 7 is taken into the abnormality information monitoring register 13 by the main circuit 6, the main circuit 6
It is possible to easily import abnormality information from.

According to the fourth aspect of the invention, the abnormality information outputted to the main data bus 6a can be easily latched by the register 22 with a simple circuit configuration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a computer system using a terminal device according to the present invention.

FIG. 2 is a block diagram showing an example of the configuration of an abnormality information monitoring register.

[Explanation of symbols]

3 Host 4 Terminal device 5a Main communication path 5b Auxiliary communication path 6 Main circuit 6a Main data bus 7 Operation panel 8 Monitoring circuit 11 CPU (processor) 13 Abnormality information monitoring register 14 Serial to parallel conversion circuit

Claims (4)

[Claims] Claim 1: A main communication path (5a) and the main communication path (5a).
A system for controlling a terminal device (4) connected to a host (3) by an auxiliary communication path (5b) provided separately from a), A monitoring circuit (8) that operates independently of the main circuit (6) connected to the communication path (5a) is provided, and the monitoring circuit (8) controls the main data bus (6) of the main circuit (6). 6a) Monitor the abnormality information of the terminal device (4) output on the terminal device (4), and send the obtained abnormality information to the monitoring circuit (4).
8) is connected to the host (
3) A terminal control method characterized by transmitting data. Claim 2: A main communication path (5a) and the main communication path (5a).
A terminal device (4) connected to the host (3) by an auxiliary communication path (5b) provided separately from the main communication path (5a), and a main circuit (6) connected to the main communication path (5a).
) is provided, the monitoring circuit (8) is connected to the main data bus (6a) of the main circuit (6), and the monitoring circuit (8) is connected to the main data bus (6a) of the main circuit (6). An abnormality information monitoring register (
13), and a serial-to-parallel converter (14) for transmitting the abnormality information stored in the abnormality information monitoring register (13) to the host (3) via the auxiliary communication path (5b). A terminal device characterized by: Claim 3: A main communication path (5a) and the main communication path (5a).
A terminal device (4) connected to the host (3) by an auxiliary communication path (5b) provided separately from the main communication path (5a), and a main circuit (6) connected to the main communication path (5a).
) and the main data bus (6a) of the main circuit (6).
), the operation panel (7) displays abnormality information of the terminal device (4), and the monitoring circuit (8) operates independently of the main circuit (6). 8
) is the main data bus (6a) of the main circuit (6).
) for capturing and storing abnormality information displayed on the operation panel (7);
13), a serial-to-parallel converter (14) for transmitting the abnormality information stored in the abnormality information monitoring register (13) to the host (3) via the auxiliary communication path (5b), and the abnormality information monitoring register (13); A terminal device comprising a register (13) and a processor (11) that controls the serial-to-parallel converter (14). 4. The abnormality information monitoring register (13) includes a decoder (21) that detects the abnormality information write signal (7) to the operation panel and outputs a latch signal, and the main data bus (6a). 4. The terminal device according to claim 2 or 3, further comprising a register (22) that is connected to the main data bus (6a) and latches the abnormality information outputted onto the main data bus (6a) using the latch signal. .