JPH04341004A - Offset correction circuit - Google Patents

Abstract

PURPOSE:To surely suppress an offset voltage by comparing an offset component with a reference voltage and feeding back the obtained voltage to an input side. CONSTITUTION:A signal inputted from a terminal A is amplified inversely at a 1st operational amplifier 1 and the result is inputted to an inverting input terminal of a 2nd operational amplifier 2, the output is divided by resistors R5, R6 and a signal whose level is set to a reference voltage by a 3rd operational amplifier 3 is inputted to a noninverting input terminal of the amplifier 2 and the signal is inversely amplified. Thus, the AC component of the signal including an offset is eliminated by a low pass filter 3 comprising a resistor R, a capacitor C1 and a buffer BF and only the DC component increased or decreased due to the effect of the offset is inputted to an inverting input terminal of a comparator CP1 via the filter 3. Moreover, a reference voltage is inputted to a noninverting input terminal and the voltage through the filter 3 is compared with the reference voltage. When the input at the inverting input terminal is higher than the reference voltage, the output reaches a negative maximum value and when lower, the output reaches a positive maximum value, the result is inputted to a counter D and the result is inputted to a decoder E, in which the signal is decoded.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an offset correction circuit for suppressing offset, which is the most problematic among the direct current characteristics of operational amplifiers.

0002

2. Description of the Related Art FIG. 3 shows a conventional offset correction circuit. In the figure, A is an input terminal, 1 is a resistor R1, R2,
and a first operational amplifier OP1;
2 is an inverting amplifier composed of resistors R3, R4, and a second operational amplifier OP2, OP3 is a third operational amplifier that divides resistors R5 and R6 to obtain a reference voltage, and OP4 is the output of the third operational amplifier OP3. B is the output terminal of the fourth operational amplifier whose input is B. The first and second operational amplifiers OP1 and OP2 are connected in negative feedback via resistors R2 and R4.

Among the DC properties of an OP amplifier, the most problematic property is offset voltage. This is because a very small error voltage occurs between the + and - inputs of the OP amplifier (hereinafter, the error voltage is referred to as input offset voltage), and the output is approximately this input offset voltage multiplied by the circuit gain. This appears as an output offset and is a problem. For this reason, every operational amplifier is designed to have this input offset voltage of 0, but the current situation is that some deviations occur due to the configuration of the input circuit.

A conventional offset correction circuit shown in FIG. 3 can quantitatively suppress this offset voltage. The operation of this circuit will be explained. First, a signal input from input terminal A is amplified by inverting amplifier 1 constituted by resistors R1, R2 and first operational amplifier OP1. At this time, the input offset voltage is also included and amplified. This is because an input offset voltage is generated between the signal which is voltage-divided by the resistors R5 and R6 and the reference voltage is taken by the third operational amplifier OP3 and the signal input from the input terminal A. Therefore, in the wafer process, by designing operational amplifiers OP1 and OP4 to be close to each other and parallel to each other, the output signal values of operational amplifiers OP1 and OP4, which are the two input signals of operational amplifier OP2, can be made to have closer values. be able to. Due to this, the 2 of operational amplifier OP2
An amplified signal is output from output terminal B after reducing the influence of offset between the two inputs.

[0005]

[Problems to be Solved by the Invention] In order to suppress the influence of the offset between the two inputs of the amplifier as described above, the conventional offset correction circuit is designed to suppress the influence of the offset between the two inputs of the amplifier. The two operational amplifiers are placed close to each other and parallel to each other. This has the problem that offset can only be suppressed quantitatively, and as a result, some offset always occurs.

The present invention was made to solve the above-mentioned problems, and aims to more reliably suppress offset voltage, which is a characteristic of operational amplifiers and is the most problematic.

[0007]

[Means for Solving the Problems] The present invention provides inverting amplifiers 1 and 2 comprising first and second operational amplifiers OP1 and OP2 connected in negative feedback between an input terminal A and an output terminal B, respectively.
a third operational amplifier OP3 having a reference voltage inputted to its +input side; a comparator CP1 for comparing the signal on the output terminal side with the output reference voltage of the third operational amplifier OP3; and this comparator CP1. a counter D that counts the output of the counter D, a decoder E that decodes the counted value, a plurality of resistive elements R provided for the output bits of the decoder E, and connected in series between the power supply and the ground. It is equipped with a voltage divider circuit K consisting of an analog switch AS connected between both ends of the resistor element R and opened and closed by the output of the decoder E, and the output of the voltage divider circuit K is connected to the above-mentioned inverter on the input terminal A side. This is supplied to the + input side of amplifier 1. Furthermore, a low-pass filter 3 is inserted before the third operational amplifier OP3 to remove AC components from the input terminal A.

[0008]

[Operation] A signal input from the input terminal A is amplified by the first operational amplifier OP1 and the second operational amplifier OP2. At this time, the offset voltage is included and amplified. The alternating current component of the signal containing this offset is removed by the low-pass filter 3, and only the offset component is output. This output and a reference voltage are compared by a comparator CP1, the resulting output is counted by a counter D, and the counted value is decoded by a decoder E. Analog switch AS is opened and closed according to this decoded signal, and resistive voltage division is performed. The voltage divided here is fed back to the first operational amplifier OP1, thereby correcting the offset that has occurred.

[0009]

[Example] Fig. 1 shows Example 1 (Claim 2) according to the present invention.
FIG. 3 is a circuit diagram of an offset correction circuit. Note that the same components as in FIG. 3 are designated by the same reference numerals. 3 is a low-pass filter consisting of resistor R7, capacitor C1, and operational amplifier BF, CP1 is a comparator, C is a clock signal, D is a counter, E is a decoder, AS is an analog switch, B is an output terminal, and K is a plurality of resistance elements. This is a voltage divider circuit composed of R and a plurality of analog switches AS. The resistive elements R are provided for the output bits of the decoder E and are connected between the power supply and the ground, the analog switch AS is provided at both ends of each resistive element, and the output of the voltage dividing circuit K is connected to the inverting amplifier 1. It is supplied to the +input side of operational amplifier OP1.

Next, the operation of the first embodiment will be explained with reference to FIG.

First, a signal input from the input terminal A is inverted and amplified by the first operational amplifier OP1, enters the negative input of the second operational amplifier OP2, is voltage-divided by resistors R5 and R6, and is referenced by the third operational amplifier OP3. The voltage signal enters the + side input of the second operational amplifier OP2. Here, it is also inverted and amplified. At this time, the input offset voltage is included and amplified. Only the alternating current component of the signal containing this offset is removed by the low-pass filter 3 consisting of a resistor R7, a capacitor C1, and a buffer BF. Only the DC component that has risen or fallen due to the influence of the offset passes through the low-pass filter 3 and enters the - side input of the comparator CP1. Further, a reference voltage is input to the + side input of the comparator CP1. The voltage passed through the low-pass filter 3 and the reference voltage are compared by a comparator CP1. If the - side input is higher than the reference voltage, the output will fall to the negative maximum, and if it is lower than the reference voltage, the output will rise to the positive maximum. This output then enters counter D. In counter D, if the output signal is negative, the count is d
It will be owned, and if it is positive, it will be uploaded. This counted value is input to a 4 to 16 decoder E and decoded. This decoded signal enters the analog switch AS, which together with the resistive element R constitutes a resistive voltage divider circuit K. Here, since the analog switch AS performs resistance voltage division, it is possible to select a voltage appropriate to the value compared by the comparator CP1. That is, the number of analog switches AS corresponding to the output of the low-pass filter 3 is turned on, and a predetermined divided voltage is obtained. This selected voltage is input to the + side of the first operational amplifier OP1. Then, as before, it is inverted and amplified. If there is no effect of the offset on the signal output to the output terminal B, this is the end; however, if there is an effect, the above operation is repeated until the effect of the offset disappears.

FIG. 2 shows an offset correction circuit according to a second embodiment (claim 1) in which the signal inputted from the input terminal A does not contain an alternating current component, and removes the alternating current component in the first embodiment. This eliminates the need for the low-pass filter 3.

Embodiment 2 shown in FIG. 2 is applied when the signal input from input terminal A does not contain an alternating current component. In the first embodiment described above, the AC component of the signal including the offset is removed by the low-pass filter 3 consisting of the resistor R7, the capacitor C1, and the buffer BF in FIG. Since it is an offset correction circuit, the low-pass filter 3 consisting of the resistor R7, capacitor C1, and buffer BF shown in FIG. 1 is not required. Therefore, in this embodiment, the offset correction circuit can be reduced in size compared to the first embodiment.

[0014]

[Effects of the Invention] As described above, according to the present invention, the offset component and the reference voltage are compared and the voltage corresponding to the comparison result is fed back to the input side, so that the offset voltage can be determined more reliably. This has the effect of suppressing the Furthermore, when a low-pass filter is provided, alternating current components contained in the input signal can be removed.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an offset correction circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing an offset correction circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a conventional offset correction circuit.

[Explanation of symbols]

1 Inverting amplifier 1 2 Inverting amplifier 2 3 Low pass filter 3 CP1 Comparator D Counter E Decoder AS analog switch OP1 1st operational amplifier OP2 2nd operational amplifier A Input terminal B Output terminal R7 resistance C1 Capacitor BF buffer OP3 3rd operational amplifier R Resistance element K　Voltage divider circuit

Claims (2)

[Claims] [Claim 1] A series circuit of an inverting amplifier consisting of a first and a second operational amplifier each connected with negative feedback is provided between an input terminal and an output terminal, and a third operational amplifier is provided with a reference voltage input to the positive input side. , a comparator that compares the output of the output terminal side with the output reference voltage of the third operational amplifier, a counter that counts the output of this comparator, a decoder that decodes the counted value, and an output bit of this decoder. and a voltage divider circuit consisting of a plurality of resistive elements connected in series between the power source and the ground, and an analog switch connected between both ends of each resistive element and opened and closed by the output of the decoder. , an offset correction circuit characterized in that the output of the voltage dividing circuit is supplied to the +input side of the inverting amplifier on the input terminal side. 2. The offset correction circuit according to claim 1, further comprising a low-pass filter provided before the third operational amplifier.