JPH01183908A - Filter circuit - Google Patents
Filter circuitInfo
- Publication number
- JPH01183908A JPH01183908A JP894188A JP894188A JPH01183908A JP H01183908 A JPH01183908 A JP H01183908A JP 894188 A JP894188 A JP 894188A JP 894188 A JP894188 A JP 894188A JP H01183908 A JPH01183908 A JP H01183908A
- Authority
- JP
- Japan
- Prior art keywords
- filter
- output
- circuit
- detecting circuit
- interruption frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 22
- 239000003990 capacitor Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Networks Using Active Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はフィルタの遮断周波数の無調整化に関し、特に
集積回路に内蔵した複数のフィルタの遮断周波数を自動
的に調整制御することにより無調整化を行ったフィルタ
回路に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to eliminating the need for adjustment of the cut-off frequency of a filter, and in particular, eliminates the need for adjustment by automatically controlling the cut-off frequency of a plurality of filters built into an integrated circuit. The present invention relates to a filter circuit that has undergone conversion.
第３図を用いて従来使用されているフィルタ回路につい
て説明する。A conventionally used filter circuit will be explained with reference to FIG.
従来、２つのフィルタ４，５を内蔵するフィルタ回路１
３は、入力端６と出力端７と遮断周波数制御入力端を有
するフィルタ４と、同様に入力端８と出力端９と遮断周
波数制御入力端を有するフィルタ５、各フィルタ４，５
の遮断周波数制御入力端を電圧制御回路１４の出力と接
続し、電圧制御回路１４の制御入力端から可変抵抗１５
を介して基準電位に接続して構成していた。Conventionally, a filter circuit 1 has two built-in filters 4 and 5.
3 is a filter 4 having an input end 6, an output end 7, and a cut-off frequency control input end, a filter 5 having an input end 8, an output end 9, and a cut-off frequency control input end; each of the filters 4, 5;
The cut-off frequency control input terminal of the voltage control circuit 14 is connected to the output of the voltage control circuit 14, and the variable resistor 15 is connected to the control input terminal of the voltage control circuit 14.
It was constructed by connecting to a reference potential via a.
この構成のフィルタ４，５は電圧（又は電流）を可変し
て遮断周波数を変える電圧（又は電流）制御型フィルタ
で、可変抵抗１５を変化させることで電圧制御回路１４
の出力の電圧を変え、電圧制御回路１４の出力に接続さ
れているフィルタ４．５の遮断周波数制御入力端の電圧
も同様に変化させ各フィルタ４，５の遮断周波数の調整
を行う。The filters 4 and 5 having this configuration are voltage (or current) controlled filters that change the cutoff frequency by varying the voltage (or current), and by changing the variable resistor 15, the voltage control circuit 14
The cutoff frequency of each of the filters 4 and 5 is adjusted by changing the output voltage of the filter 1 and the voltage at the cutoff frequency control input terminal of the filter 4.5 connected to the output of the voltage control circuit 14.
第４図は、従来使用しているフィルタ回路の具体例であ
る。FIG. 4 shows a specific example of a conventionally used filter circuit.
第４図の構成は、入力端６からＮＰＮ）ランジスタ（以
下ＮＰＮＴｒと略す）１６のベースに接続シ、コレクタ
をＰＮＰＴｒ ２４のベース・コレクタとＰＮＰＴｒ２
５のベースに接続し、ＰＮＰＴｒ２５のコレクタをＮＰ
ＮＴｒ １７のコレクタとＮＰＮＴｒ１９のベースとコ
ンデンサ３３の一端に接続し、ＮＰＮＴ’ｒ１９のエミ
ッタはＮＰＮＴｒ １７（Ｄベースと抵抗２９の一端と
出力端７に接続し、ＮＰＮＴｒ １６．ｌ ７のエミッ
タとＮＰＮＴｒ１８のコレクタを接続し、ＮＰＮＴｒ
１８のエミッタから抵抗２８を介して低電位端に接続し
、ＰＮＰＴｒ２４，２５のエミッタとＮＰＮＴｒ １９
のコレクタを高電位端に接続し、コンデンサ３３の他端
と抵抗２９の他端を低電圧端に接続して成るフィルタ４
と、フィルタ４と同一構成のフィルタ５と高電位端より
抵抗３２と可変抵抗１５を介して低電位端に接続して成
る電圧制御回路１４、抵抗３２と可変抵抗１５の接続点
よりフィルタ４のＮＰＮＴｒ １８のベースとフィルタ
５ＯＮＰＮＴｒ２２のベースに接続して構成している。In the configuration shown in FIG. 4, the input terminal 6 is connected to the base of an NPN transistor (hereinafter abbreviated as NPNTr) 16, and the collector is connected to the base and collector of the PNPTr 24 and the PNPTr 24.
Connect to the base of PNPTr25 and connect the collector of PNPTr25 to the base of PNPTr25.
The collector of NTr 17 is connected to the base of NPNTr 19 and one end of capacitor 33, and the emitter of NPNTr 17 is connected to NPNTr 17 (D base and one end of resistor 29 and output terminal 7, and the emitter of NPNTr 16.l 7 is connected to one end of capacitor 33. Connect the collector of NPNTr
The emitter of PNPTr 18 is connected to the low potential end via a resistor 28, and the emitter of PNPTr 24, 25 and NPNTr 19
A filter 4 has a collector connected to a high potential end, and the other end of the capacitor 33 and the other end of the resistor 29 are connected to a low voltage end.
A filter 5 having the same configuration as the filter 4 is connected from the high potential end to the low potential end via the resistor 32 and the variable resistor 15. The filter 5 is connected to the base of the NPNTr 18 and the base of the filter 5ONPNTr 22.
次にフィルタ４の遮断周波数ｆＬ（４）は、コンデンサ
３３；Ｃ３３、抵抗３２，２８：Ｒ３□、Ｒ２１、可変
抵抗１５：Ｒ＋ｓ、高電位端と低電位端間の電位＋ Ｖ
ｃｃ、Ｎ Ｐ Ｎ Ｔ ｒ Ｑ ｒｅのペースエミッタ
間電圧： Ｖ Ｂ Ｅ （Ｃ＋＋）電子の電荷；ｇ、ポ
ルツマン定数；に１絶対源度；Ｔ、相互コンダクタンス
；ｇ。Next, the cutoff frequency fL(4) of the filter 4 is determined by the capacitor 33; C33, the resistors 32 and 28: R3□, R21, the variable resistor 15: R+s, and the potential between the high potential end and the low potential end +V.
cc, N P N T r Q re pace emitter voltage: V B E (C++) electron charge; g, Portzmann constant; 1 absolute source; T, transconductance; g.
で表わせ、可変抵抗１５を変えることで相互コンダクタ
ンスピアが変化し、その結果フィルタ４の遮断周波数ｆ
Ｌ（４，が変化する。By changing the variable resistor 15, the mutual conductance spear changes, and as a result, the cutoff frequency f of the filter 4
L(4, changes.
又、フィルタ４とフィルタ５はコンデンサ３３．３４や
抵抗２８．３０を変えることで遮断周波数の異なるフィ
ルタが得られる。Filters 4 and 5 can have different cut-off frequencies by changing the capacitors 33, 34 and resistors 28, 30.
上述した従来のフィルタ回路は、複数のフィルタの内ど
れか一つのフィルタの遮断周波数に着目し、その希望周
波数に成る様に可変抵抗を調整する必要があり、自動的
に遮断周波数の調整が出来なかった。In the conventional filter circuit described above, it is necessary to focus on the cutoff frequency of one of the multiple filters and adjust the variable resistor so that the desired frequency is achieved, and the cutoff frequency cannot be adjusted automatically. There wasn't.
本発明のフィルタ回路は、電圧（又は電流）を可変して
フィルタの遮断周波数を変える複数の電圧（又は電流）
制御型フィルタ（以下フィルタ４．５と略す）を有し、
発振器の出力から上記複数のフィルタの内−つのフィル
タを介して検波回路の第１の入力に接続し、バイアス電
源１２を電圧比較回路の第一入力に接続し、検波回路の
出力を上記電圧比較回路の第２の入力に接続し、該電圧
比較回路の出力を複数のフィルタ総ての遮断周波数制御
入力端に接続していることを有している。The filter circuit of the present invention uses a plurality of voltages (or currents) to change the cut-off frequency of the filter by varying the voltages (or currents).
It has a control type filter (hereinafter abbreviated as filter 4.5),
The output of the oscillator is connected to the first input of the detection circuit through one of the plurality of filters, the bias power supply 12 is connected to the first input of the voltage comparison circuit, and the output of the detection circuit is connected to the voltage comparison circuit. The voltage comparator circuit has an output connected to a second input of the circuit, and an output of the voltage comparator circuit is connected to a cutoff frequency control input terminal of all of the plurality of filters.
又、前記バイアス電源の代わりに、発振器の出力を検波
回路１０を介して電圧比較回路の第一入力に接続してい
ることを有している。Furthermore, instead of the bias power supply, the output of the oscillator is connected to the first input of the voltage comparison circuit via the detection circuit 10.
次に、本発明について第１図を用いて説明する。 Next, the present invention will be explained using FIG. 1.
本発明のフィルタ回路は、発振器１の出力をフィルタ２
と検波回路３を介して電圧比較回路１１の第二入力に接
続し、該電圧比較回路１１の出力をフィルタ２，４．５
の遮断周波数制御入力端に接続し、電圧比較回路１１の
第１入力にバイアス電源１２を接続する構成で、発振器
１の発振周波数ｆ０よりフィルタ２の遮断周波数ｆ Ｌ
、。The filter circuit of the present invention converts the output of the oscillator 1 into the filter 2.
is connected to the second input of the voltage comparison circuit 11 via the detection circuit 3, and the output of the voltage comparison circuit 11 is connected to the filter 2, 4.5.
The cut-off frequency f L of the filter 2 is connected to the cut-off frequency control input terminal of the oscillator 1, and the bias power supply 12 is connected to the first input of the voltage comparison circuit 11.
,.
（フィルタ２がローパスフィルタの場合）は低く設定す
る。その結果発振器１の出力信号がフィルタ２の周波数
特性で減衰（６ｄＢ１０ｃｔ）１．次段の検波回路３の
入力に入る。(When filter 2 is a low-pass filter) is set low. As a result, the output signal of the oscillator 1 is attenuated by the frequency characteristics of the filter 2 (6dB10ct)1. It goes into the input of the detection circuit 3 at the next stage.
検波回路３へ入った信号は、検波回路３にて信号レベル
に応じた直流信号として出力する。この検波した直流信
号とバイアス電源１２は電圧比較回路１１に入力され、
その直流レベル差を増幅して電圧比較回路１１の出力よ
りフィルタ２，４゜５の遮断周波数制御入力端へ供給す
る。The signal that has entered the detection circuit 3 is output by the detection circuit 3 as a DC signal according to the signal level. This detected DC signal and the bias power supply 12 are input to the voltage comparison circuit 11,
The DC level difference is amplified and supplied from the output of the voltage comparison circuit 11 to the cutoff frequency control input terminal of the filter 2, 4.5.
フィルタ２と検波回路３と電圧比較回路１１から成る制
御ループはバイアス電源１２（バイアス電源１２の電位
は、発振器１の出力信号フィルタ２を介さず直接検波回
路３で検波した出力より低く設定する）と検波回路３の
出力が一致する様、フィルタ２の遮新局を制御し、発振
器１と検波回路３間のフィルタ２で減衰量を制御する。A control loop consisting of a filter 2, a detection circuit 3, and a voltage comparison circuit 11 is connected to a bias power supply 12 (the potential of the bias power supply 12 is set lower than the output directly detected by the detection circuit 3 without going through the output signal filter 2 of the oscillator 1). The shielding station of the filter 2 is controlled so that the output of the detection circuit 3 coincides with the output of the detection circuit 3, and the amount of attenuation is controlled by the filter 2 between the oscillator 1 and the detection circuit 3.
この時のフィルタ２の遮断周波数とフィルタ４．５の遮
断周波数との関係は、従来例で説明したフィルタ４，５
の遮断周波数の関係と同様にフィルタ２，４．５も同じ
ことがいえ、フィルタ２の遮断周波数が制御されると同
時にフィルタ４．５の遮断周波数も制御される。At this time, the relationship between the cutoff frequency of filter 2 and the cutoff frequency of filter 4.5 is as follows.
The same holds true for filters 2 and 4.5 as well as the relationship between the cutoff frequencies of filter 2 and filter 4.5, and the cutoff frequency of filter 2 and filter 4.5 are controlled at the same time.
又、バイアス電源１２を用いない場合の構成を他の実施
例として第２図で説明する。Further, a configuration in which the bias power supply 12 is not used will be described as another embodiment with reference to FIG.
バイアス電源１２の代わりに、発振器１の出方を検波回
路１０を介して電圧比較回路１１の第一入力に接続する
。バイアス電源１２以外は第三図と同じである。Instead of the bias power supply 12, the output of the oscillator 1 is connected to the first input of the voltage comparison circuit 11 via the detection circuit 10. The components other than the bias power supply 12 are the same as in FIG.
検波回路１０は検波回路３より変換利得を下げることに
て上記バイアス回路１２（バイアス電源１２の電位は発
振器１の出力信号をフィルタ２を介さず直接検波回路３
で検波した出方より低く設定）と同様な機能を有する。The detection circuit 10 lowers the conversion gain than the detection circuit 3 so that the bias circuit 12 (the potential of the bias power supply 12 is set so that the output signal of the oscillator 1 is directly transmitted to the detection circuit 3 without passing through the filter 2).
(set lower than the output detected by).
以上説明した様に本発明は、発振器１とフィルタ２と検
波回路３と電圧比較回路１１とバイアス電源１２（又は
検波回路１０）を用いることで、従来可変抵抗１５でフ
ィルタ４，５の遮断周波数の調整を行っていたが、その
調整を自動調整にて実施出来る様になった。As explained above, the present invention uses the oscillator 1, the filter 2, the detection circuit 3, the voltage comparator circuit 11, and the bias power supply 12 (or the detection circuit 10). However, this adjustment can now be performed automatically.
第１図は本発明の一実旅例の構成図、第２図は本発明の
他の実施例の構成図、第３図は従来の構成図、第４図は
従来の具体的実施例である。
１・・・・・・発振器、２，４．５・・・・・・フィル
タ、３゜１０・・・・・・検波回路、６，８・・・・・
・フィルタの入力、７．９・・・・・・フィルタの出力
、１１・・・・・・電圧比較回路、１２・・・・・・バ
イアス電源、１３・・・・・・従来のフィルタ回路、１
４・・・・・・電圧制御回路、１５・・・・・・可変抵
抗、１６，１７，１８，１９，２０，２１，２２゜２３
−・−ＮＰＮＴ ｒ、 ２４．２５．２６．２７−ＰＮ
ＰＴｒ、２８，２９，３０，３１．３２−＝・−抵抗、
３３゜３４・・・・・・コンデンサ。
代理人 弁理士 内 原 音
！ｆ５１図
だ
万２図Fig. 1 is a block diagram of one practical example of the present invention, Fig. 2 is a block diagram of another embodiment of the present invention, Fig. 3 is a conventional block diagram, and Fig. 4 is a conventional specific embodiment. be. 1...Oscillator, 2,4.5...Filter, 3゜10...Detection circuit, 6,8...
・Filter input, 7.9...Filter output, 11...Voltage comparison circuit, 12...Bias power supply, 13...Conventional filter circuit ,1
4... Voltage control circuit, 15... Variable resistor, 16, 17, 18, 19, 20, 21, 22゜23
-・-NPNT r, 24.25.26.27-PN
PTr, 28, 29, 30, 31.32-=・-resistance,
33゜34... Capacitor. Agent patent attorney Oto Uchihara! f51 diagram, man 2 diagram
Claims (2)
ルタを有し、発振器の出力を上記複数の制御型フィルタ
の一つを介して第一の検波回路の入力に接続し、バイア
ス電源を電圧比較回路の第一入力に接続し、上記第一の
検波回路の出力を上記電圧比較回路の第二入力に接続し
、上記電圧比較回路の出力を上記複数の制御型フィルタ
の遮断周波数制御入力端に接続したことを特徴とするフ
ィルタ回路。(1) It has a plurality of controlled filters whose cut-off frequencies change, the output of the oscillator is connected to the input of the first detection circuit via one of the plurality of controlled filters, and the bias power supply is used for voltage comparison. The output of the first detection circuit is connected to the second input of the voltage comparison circuit, and the output of the voltage comparison circuit is connected to the cutoff frequency control input terminal of the plurality of controlled filters. A filter circuit characterized in that:
、上記発振器４の出力を第二の検波回路を介して上記電
圧比較回路の第一入力に接続したことを特徴とする特許
請求の範囲第１項記載のフィルタ回路。(2) Instead of the bias power supply in the controlled filter, the output of the oscillator 4 is connected to the first input of the voltage comparison circuit via a second detection circuit. The filter circuit described in item 1.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP894188A JPH01183908A (en) | 1988-01-18 | 1988-01-18 | Filter circuit |
| US07/297,426 US5023491A (en) | 1988-01-18 | 1989-01-17 | Filter circuit arrangements with automatic adjustment of cut-off frequencies |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP894188A JPH01183908A (en) | 1988-01-18 | 1988-01-18 | Filter circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01183908A true JPH01183908A (en) | 1989-07-21 |
Family
ID=11706695
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP894188A Pending JPH01183908A (en) | 1988-01-18 | 1988-01-18 | Filter circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01183908A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006074435A (en) * | 2004-09-02 | 2006-03-16 | Fujitsu Ltd | Filter circuit enabling adjustment of cutoff frequency |
| JP2007251942A (en) * | 2006-03-14 | 2007-09-27 | Princeton Technology Corp | Calibration loop capable of automatically calibrating central frequency of filter, filter circuit and associated methods |
| US7860192B2 (en) | 2006-03-14 | 2010-12-28 | Princeton Technology Corporation | FSK demodulator, FM demodulator, and related method with a build-in band-pass filter |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60214617A (en) * | 1984-04-11 | 1985-10-26 | Hitachi Ltd | Filter integrated circuit |
| JPS61281613A (en) * | 1985-05-20 | 1986-12-12 | Sanyo Electric Co Ltd | Automatic adjusting device for active filter |
-
1988
- 1988-01-18 JP JP894188A patent/JPH01183908A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60214617A (en) * | 1984-04-11 | 1985-10-26 | Hitachi Ltd | Filter integrated circuit |
| JPS61281613A (en) * | 1985-05-20 | 1986-12-12 | Sanyo Electric Co Ltd | Automatic adjusting device for active filter |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006074435A (en) * | 2004-09-02 | 2006-03-16 | Fujitsu Ltd | Filter circuit enabling adjustment of cutoff frequency |
| JP4723215B2 (en) * | 2004-09-02 | 2011-07-13 | 富士通セミコンダクター株式会社 | Filter circuit that enables adjustment of cut-off frequency |
| JP2007251942A (en) * | 2006-03-14 | 2007-09-27 | Princeton Technology Corp | Calibration loop capable of automatically calibrating central frequency of filter, filter circuit and associated methods |
| US7860192B2 (en) | 2006-03-14 | 2010-12-28 | Princeton Technology Corporation | FSK demodulator, FM demodulator, and related method with a build-in band-pass filter |
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