JPH04340588A - Picture synthesizing and display device - Google Patents

Abstract

PURPOSE:To display a picture by matching the display speeds of image signals having different systems and synthesizing the image signals. CONSTITUTION:Program data for converting to the display speed of the highly minute image signal is obtained by a microprocessor 17, a clock for controlling the display speed of an NTSC picture is decided by a clock generation circuit 19 based on the program data, and a control signal, whose phase is corrected by the clock, for converting to the display speed of the highly minute image signal is obtained by a PLL circuit 21, so that the NTSC picture is displayed based on the control signal.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image synthesis display device for synthesizing and displaying a plurality of images.

0002

2. Description of the Related Art In recent years, with the diversification of information media, workstations that handle these media have become rapidly popular. Furthermore, there is a high demand for workstations that can process various types of media in a combined manner. For example, when handling image media, new image information is obtained by combining a plurality of images of different formats into one. For example, it is already common practice to combine a high-definition graphic image obtained at a workstation with an externally input NTSC image and display the composite image simultaneously on the high-definition screen of the workstation. There are roughly two methods for the above-mentioned image synthesis.

[0003] As a first method, external input, for example, NT
This is a method of importing an SC image into the memory area of a host computer in a workstation, and using a graphics controller inside the computer to combine it with a high-definition image and display it.

The second method is to output a high-definition image signal from the computer without having any relationship with the host computer, and to combine it with an NTSC image and display it externally.

The first method has the advantage that the combined image can be freely manipulated by a computer. However, since it occupies the internal memory of the computer and performs a write operation, it has the disadvantage that it affects the processing of other running applications. Furthermore, it becomes necessary to incorporate dedicated software for image processing.

On the other hand, the second method has the disadvantage of requiring hardware outside the computer. However, since it does not occupy the memory of the host computer and does not perform compositing processing, there is no reduction in computer processing speed. Furthermore, it does not affect the processing of other applications. For these reasons, the second method is advantageous because it does not degrade the functionality of the workstation system. Furthermore, since the image display speeds of high-definition images and NTSC images are different, when these images are combined and displayed, the display speeds must be matched.

[0007]

[Problems to be Solved by the Invention] When realizing an image synthesis display device using the second method described above, the clock of the device must be changed depending on each workstation. That is, each workstation has a different display speed. Therefore, the display speed of high-definition images is NTS
In order to match the display speed of the C image, there was a problem in that it was necessary to replace the unit and change the clock at each workstation.

[0008]The present invention was made to solve the above problems.In the same unit, a clock according to the type of workstation is obtained, the display speed of the NTSC image is controlled, and the NTSC image can be enhanced. It is an object of the present invention to provide an image synthesis display device that can display images in finer detail.

[0009]

[Means for Solving the Problems] An image synthesis display device according to the present invention receives first and second image signals of different formats, and converts the first and second image signals into image signals of the same format. an image signal processing means for converting, an image memory for storing an image output of at least one of the image signal processing means, and a control signal generation for obtaining a control signal for displaying the first and second image signals at the same display speed. and an image synthesizing means that reads out the image outputs of the image memory in response to the control signal and synthesizes them so that they are displayed on the same screen.

0010

[Operation] According to the above means, a control signal is obtained according to image signals having different display speeds, and the image signals are read out from the memory based on this control signal, so images having the same display speed are combined and displayed. can.

[0011]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows an embodiment of an image synthesis display device according to the present invention.

A high-definition image signal output from a workstation computer is input to the input terminal 11. The input terminal 13 has an N signal to be synthesized with the high-definition image.
A TSC image signal is input.

[0013]The NTSC image signal is processed by the EDTV processing unit 1.
5 is input. The EDTV processing unit 15 converts the NTSC image signal into a non-interlaced signal to eliminate flicker, and also performs noise reduction using digital noise reduction. Furthermore, brightness/color separation is performed using motion adaptive processing to prevent cross color interference and dot interference.

The output of the EDTV processing unit 15 is input to an image memory 23. At the control end of the image memory 23, P
A control output from an LL (phase locked loop) circuit 21 is input. The PLL circuit 21 outputs a control signal according to the display speed of the high-definition image signal, and is connected to the microprocessor 17 and clock generation circuit 1 described below.
Together with 9, it forms a control signal generating means.

A program for determining the display speed is stored in the microprocessor 17. Based on this program, the microprocessor 17 inputs program data for determining the clock input to the PLL circuit 21 to the clock generation circuit 19. The clock generation circuit 19 determines the oscillation frequency based on the program data and inputs the clock to one end of the PLL circuit 21 .

The other end of the PLL circuit 21 receives the horizontal synchronization signal of the high-definition image signal. The PLL circuit 21 inputs a control signal whose phase is matched with the horizontal synchronization signal of the high-definition image signal to the control end of the image memory 23 based on a clock controlled to correspond to each workstation.

The image memory 23 reads out the NTSC image signal subjected to the EDTV conversion process using the phase-corrected control signal. The output of the image memory 23 and the high-definition image signal are
Each is input to the image synthesis circuit 25.

The image synthesis circuit 25 combines high-definition images and NTS
C image is combined and input to the display unit 27. As a result, the NTSC image is combined with the high-definition image and displayed. As described above, it is possible to control the display speed of NTSC images for each workstation having different display speeds and perform composite display. However, it is not necessary to make the display speeds exactly the same. For example, if the frame ratio of an NTSC image changes significantly due to display speed conversion, the display speed is brought as close to the same state as possible to maintain the picture frame ratio in a normal state.

[0019]

[Effects of the Invention] According to the image synthesis and display device described above, a single unit can obtain a clock corresponding to each workstation, control the display speed of NTSC images, and perform synthesis display with higher definition. can.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an image synthesis display device according to the present invention.

[Explanation of symbols]

11, 13...Input terminal, 15...EDTV processing unit, 17
...Microprocessor, 19...Clock generation circuit, 21
...PLL circuit, 23...image memory, 25...image composition circuit, 27...display section.

Claims (2)

[Claims] 1. Image signal processing means for receiving first and second image signals of different formats and converting the first and second image signals into image signals of the same format; an image memory for storing at least one image output; a control signal generating means for obtaining a control signal for displaying the first and second image signals at the same display speed; and controlling the image output of the image memory using the control signal. 1. An image synthesis and display device comprising: image synthesis means for reading and composing images so that they are displayed on the same screen. 2. The control signal generation means includes a clock generation means for generating a clock according to a display speed of the first image signal, and a clock generation means for generating a clock according to a display speed of the first image signal; 2. The image synthesis and display device according to claim 1, further comprising a phase locked loop for obtaining the control signal in which the control signals are combined.